Patents Assigned to Linear Technology
  • Patent number: 5705919
    Abstract: Circuits and methods are provided for low drop-out operation of switching regulator circuits that include a switching transistor and an output circuit adapted to supply current at a regulated voltage to a load. The circuits and methods generate a limiting signal that allows the switching transistor to remain in a continuous conductive state for a predetermined number of oscillator cycles. The predetermined number of oscillator cycles is preferably set by a counter that initiates a signal that turns the switching transistor OFF.
    Type: Grant
    Filed: September 30, 1996
    Date of Patent: January 6, 1998
    Assignee: Linear Technology Corporation
    Inventor: Milton E. Wilcox
  • Patent number: 5672988
    Abstract: A drive circuit for a high-speed integrated circuit, bipolar switching regulator is disclosed. The circuit runs at megahertz frequencies, yet is efficient as previously available bipolar integrated circuit switching regulators operating at much lower frequencies. The circuitry provides three switch drive currents: a first (nominal) current that is provided while the switch is off in order to conserve power; a second (boosted) current, provided while the switch is transitioning from off to on in order to increase the speed at which the switching element switches on; and a third (drive) current, provided after the switch has turned on for maintaining the switch at a desired point in saturation. The drive current, additionally, varies as a function of the load on the switch in order, again, to conserve power. Additional circuitry increases the speed at which the switch turns off, by momentarily boosting base discharge current during the on-to-off transition period of the switch.
    Type: Grant
    Filed: April 15, 1994
    Date of Patent: September 30, 1997
    Assignee: Linear Technology Corporation
    Inventors: Carl T. Nelson, Robert Essaff
  • Patent number: 5668493
    Abstract: Circuits and methods are provided for increasing the turn-off switching speed of a high-speed integrated circuit, bipolar switching regulator. The regulator The circuit runs at megahertz frequencies, yet is efficient as previously available bipolar integrated circuit switching regulators operating at much lower frequencies. The increased speed switch turn-off circuitry prevents the switch from spending too much time in a high power state (which would slow the switch down), increases the stability of the switch as compared with previously known designs. In a preferred embodiment, the circuitry includes a PNP transistor and a diode-connected transistor with their base-emitter circuits coupled to form a loop with the base-emitter circuit of a NPN transistor and the base-collector circuit of the switch to limit the on state voltage of the switch and control its depth of saturation.
    Type: Grant
    Filed: June 7, 1995
    Date of Patent: September 16, 1997
    Assignee: Linear Technology Corporation
    Inventors: Carl T. Nelson, Robert Essaff
  • Patent number: 5656965
    Abstract: Circuits and methods are provide for improving the turn-off switching speed of a high-speed integrated circuit, bipolar switching regulator. The regulator runs at megahertz frequencies, yet is efficient as previously available bipolar integrated circuit switching regulators operating at much lower frequencies. The turn-off circuitry increases the speed at which the switch turns off by momentarily providing additional current to boost the base discharge current during the on-to-off transition period of the switch. In a preferred embodiment, the circuitry includes a capacitor for storing a charge, a resistor for limiting the amount of additional current provided, and a diode for delivering the additional current to the base of an NPN transistor, the collector of which is coupled to the switch's base, for boosting that transistors collector current and the switch's base discharge current. The diode then blocks current during the off-to-on transition period of the switch.
    Type: Grant
    Filed: June 7, 1995
    Date of Patent: August 12, 1997
    Assignee: Linear Technology Corporation
    Inventors: Carl T. Nelson, Robert Essaff
  • Patent number: 5650357
    Abstract: A capacitor is provided including first and second electrodes formed from portions of the lead frame structure used in conventional integrated circuit packaging. The electrodes are encapsulated with dielectric molding material which provides dielectric insulation between the electrodes. A low power capacitively-coupled digital isolator circuit is also provided. The circuit employs a pair of the lead frame capacitors of the present invention and includes differential driver and receiver circuits. The receiver can also include an optional filter for increasing noise and glitch immunity.
    Type: Grant
    Filed: March 8, 1995
    Date of Patent: July 22, 1997
    Assignee: Linear Technology Corporation
    Inventors: Robert C. Dobkin, Robert L. Reay
  • Patent number: 5627486
    Abstract: Current mirror circuits and methods, and an amplifier using same, are provided in which the output of the current mirror is reduced to zero when the input current falls below a predetermined threshold. An offset current is subtracted from the input (or reference) current at input currents below the threshold. Otherwise, the offset current source is turned off. Thus, the output current can be reduced to zero, even if there is a small input current, without distorting the input-output relationship over the majority of the range of operation of the current mirror. An amplifier with two current-feedback complementary input stages (or fader circuit) is also provided which includes a gain control circuit that uses the current mirror circuits of the present invention to ensure that each input can be fully attenuated.
    Type: Grant
    Filed: June 7, 1995
    Date of Patent: May 6, 1997
    Assignee: Linear Technology Corporation
    Inventor: William H. Gross
  • Patent number: 5617015
    Abstract: A switching voltage regulator is described which provides multiple independently regulated outputs. A switch control independently monitors two or more voltage outputs and generates control signals for driving a main switch and two or more auxiliary switches to charge selective ones of the outputs which have fallen below their target voltages. Time sequencing techniques are utilized to control the switching of the auxiliary switches such that energy stored in an inductor is transferred to the appropriate voltage outputs. The switching voltage regulator may be implemented as an integrated circuit and may have various topologies, such as boost, buck, flyback or SEPIC.
    Type: Grant
    Filed: June 7, 1995
    Date of Patent: April 1, 1997
    Assignee: Linear Technology Corporation
    Inventors: Dimitry Goder, Hendrik Santo
  • Patent number: 5610557
    Abstract: Circuitry is provided for a precision integrated circuit operational amplifier having a complementary pair of differential amplifiers in the input stage. Each differential amplifier is operable over a portion of the common-mode input range to provide a common-mode input range that includes both positive and negative power supply voltages. Methods are provided for trimming the operational amplifier to reduce the input offset voltage of each input stage differential amplifier which reduces the input offset voltage for the operational amplifier as a whole.
    Type: Grant
    Filed: June 7, 1995
    Date of Patent: March 11, 1997
    Assignee: Linear Technology Corporation
    Inventor: William B. Jett, Jr.
  • Patent number: 5606277
    Abstract: Transimpedance amplifier circuits and methods are provided in which the break frequency of the amplifier is adjusted through a single interface point to the amplifier circuit. At frequencies below the break frequency, the amplifier circuit provides an error current which effectively nulls the output of the transimpedance amplifier so that no output is produced. At frequencies above the break frequency, the break frequency setting element is essentially a short circuit that results in the frequency dependent voltage being substantially zero. This causes the transimpedance amplifier to convert current-to-voltage without signal degradation. The circuit also enables a user to adjust the break frequency without affecting the overall operation of the amplifier. Thus, the amplifier may be coupled to different output circuits for operations in accordance with different communication standards.
    Type: Grant
    Filed: June 23, 1995
    Date of Patent: February 25, 1997
    Assignee: Linear Technology Corporation
    Inventor: George F. Feliz
  • Patent number: 5589709
    Abstract: A capacitor is provided including first and second electrodes formed from portions of the lead frame structure used in conventional integrated circuit packaging. The electrodes are encapsulated with dielectric molding material which provides dielectric insulation between the electrodes. A low power capacitively-coupled digital isolator circuit is also provided. The circuit employs a pair of the lead frame capacitors of the present invention and includes differential driver and receiver circuits. The receiver can also include an optional filter for increasing noise and glitch immunity.
    Type: Grant
    Filed: March 8, 1995
    Date of Patent: December 31, 1996
    Assignee: Linear Technology Inc.
    Inventors: Robert C. Dobkin, Robert L. Reay
  • Patent number: 5589761
    Abstract: A dual polarity voltage regulator circuit that is capable of regulating either positive or negative voltages is disclosed. The regulator circuitry of the present invention provides dual polarity regulation while requiring only one additional pin over a single polarity regulator. The present invention utilizes a single error amplifier, a negative feedback network, and an overshoot recovery circuit in providing dual polarity regulation. One advantage of the negative feedback network of the present invention is that the regulator circuit uses the same error amplifier (i.e., only one error amplifier) to regulate both positive and negative input voltages. The negative feedback network actively affects signals input into the error amplifier during negative regulation, but is essentially disabled during positive regulation.
    Type: Grant
    Filed: June 7, 1995
    Date of Patent: December 31, 1996
    Assignee: Linear Technology Corporation
    Inventors: Carl T. Nelson, Robert Essaff
  • Patent number: 5581252
    Abstract: An analog-to-digital converter circuit (ADC) is described which comprises capacitor based digital-to-analog converter circuits (CDACs) coupled to the inputs of a voltage comparator wherein a reference voltage of one CDAC section has been scaled with respect to a reference voltage of another CDAC section such that one CDAC section adds additional resolution to the other CDAC section. The invention may be applied to single input ADCs as well as to differential ADCs with either type operating in either unipolar or bipolar mode. Also described are various known approaches to both single input and differential CDAC-based successive approximation ADCs, as well as a novel technique of capacitive input voltage attenuation for differential ADCs.
    Type: Grant
    Filed: October 13, 1994
    Date of Patent: December 3, 1996
    Assignee: Linear Technology Corporation
    Inventor: David M. Thomas
  • Patent number: 5552695
    Abstract: A synchronously rectified buck-flyback converter is described which provides multiple synchronous regulated outputs. A synchronous buck converter provides the main output and a synchronous flyback converter, utilizing the primary inductor of the buck converter, provides the secondary output. The converter utilizes a split-feedback signal, whereby each of the regulated outputs provides a component of the signal and a switch controller synchronously activates and deactivates rectification switches based on the feedback signal, required output levels and load. The switches are synchronously controlled such that a power input switch is operated in anti-phase to a control switch for each regulated output.
    Type: Grant
    Filed: March 22, 1994
    Date of Patent: September 3, 1996
    Assignee: Linear Technology Corporation
    Inventor: Peter H. Schwartz
  • Patent number: 5548189
    Abstract: A power-supply and control circuit is provided for driving a fluorescent lamp from a low-voltage DC power source such as a battery. In typical lamp-driving circuits, a step-up transformer is used to apply well known magnetic techniques to achieve the low-to-high voltage conversion required by the lamp. The present invention uses a new approach, applying piezoelectric characteristics of certain ceramic materials to replace the magnetic transformer. Resonant characteristics of such ceramic materials permit them to be self-resonated. A DC-to-AC converter coupled to a switching regulator converts low DC voltage into a higher AC voltage for driving the fluorescent lamp. In one embodiment, the lamp is included in a feedback loop which includes a circuit for producing a feedback signal indicative of the magnitude of current conducted by the lamp. The feedback signal is applied to the switching regulator to produce in the lamp a regulated current and, hence, a regulated lamp intensity.
    Type: Grant
    Filed: June 7, 1995
    Date of Patent: August 20, 1996
    Assignee: Linear Technology Corp.
    Inventor: James M. Williams
  • Patent number: 5537078
    Abstract: This invention relates to operational amplifiers (opamps) which use junction field effect transistors (JFETs) for the differential input pair to achieve a low input bias current. More particularly, the present invention relates to opamps wherein each input of the opamp drives directly only one gate of its corresponding JFET to further reduce the input bias current. In one embodiment of the present invention, the bottom gate of each JFET of the differential input pair is directly coupled to the common source node of the differential input pair. In another embodiment of the present invention, the bottom gate of each JFET of the differential input pair is directly coupled to the common source node and a resistor is coupled in series with the top gate of each JFET. In the preferred embodiment of the present invention, the bottom gate of each JFET of the differential input pair is coupled to the common source node through a resistor.
    Type: Grant
    Filed: March 31, 1995
    Date of Patent: July 16, 1996
    Assignee: Linear Technology Corporation
    Inventor: Alexander M. Strong
  • Patent number: 5517143
    Abstract: Current mirror circuits and methods, and an amplifier using same, are provided in which the output of the current mirror is reduced to zero when the input current falls below a predetermined threshold. An offset current is subtracted from the input (or reference) current at input currents below the threshold. Otherwise, the offset current source is turned off. Thus, the output current can be reduced to zero, even if there is a small input current, without distorting the input-output relationship over the majority of the range of operation of the current mirror. An amplifier with two current-feedback complementary input stages (or fader circuit) is also provided which includes a gain control circuit that uses the current mirror circuits of the present invention to ensure that each input can be fully attenuated.
    Type: Grant
    Filed: November 29, 1994
    Date of Patent: May 14, 1996
    Assignee: Linear Technology Corporation
    Inventor: William H. Gross
  • Patent number: 5485109
    Abstract: A three terminal control circuit for a low dropout voltage regulator having a PNP pass transistor is provided. The control circuit is capable of pulling the base-drive point down to a voltage of 3.0 volts or less to permit a current limiting resistor to be inserted between the base drive point and the base of the PNP pass transistor. The control circuit includes a pair of small-valued capacitors for providing stable operation with different output capacitors. The control circuit can also be used with p-channel FET pass transistors.
    Type: Grant
    Filed: May 12, 1994
    Date of Patent: January 16, 1996
    Assignee: Linear Technology Corporation
    Inventors: Robert C. Dobkin, Carl T. Nelson, Dennis P. O'Neill
  • Patent number: 5485024
    Abstract: An ESD protection circuit which provides protection for CMOS devices against ESD potentials of up to about 10 kV is provided. The ESD protection circuit is able to provide protection against both positive-going and negative-going high energy electrical transients, and is able to maintain a high impedance state when driven to a voltage beyond the supply rails of CMOS integrated circuit, but less than tile breakdown voltage of the ESD protection circuit. The ESD protection circuit routes currents associated with ESD potentials to a predetermined arbitrary point which may be selected during the fabrication process to meet the needs of a particular application. The structure of the ESD protection circuit permits the holding current to be adjusted to accommodate the current capacity of various external circuits.
    Type: Grant
    Filed: December 30, 1993
    Date of Patent: January 16, 1996
    Assignee: Linear Technology Corporation
    Inventor: Robert L. Reay
  • Patent number: RE35221
    Abstract: The high impedance state of a tri-state CMOS transistor output circuit is enhanced by serially connecting first and second Schottky diodes with the P-channel transistor and the N-channel transistor whereby in the high impedance state reverse bias of the substrate/source-drain diodes of the two transistors is prevented when the output of the circuit is taken beyond the supply voltage potentials of the output circuit.
    Type: Grant
    Filed: May 13, 1993
    Date of Patent: April 30, 1996
    Assignee: Linear Technology Corporation
    Inventor: Robert L. Reay
  • Patent number: RE35261
    Abstract: A differential input amplifier stage having improved frequency compensation. Frequency compensation is achieved by cancelling one-half of the signal output of a differential error amplifier in the input stage, such that all error signals must pass through a "current-mirror" type load circuit in which a resistor-capacitor network is provided to roll of gain of the input stage.
    Type: Grant
    Filed: December 12, 1994
    Date of Patent: June 4, 1996
    Assignee: Linear Technology Corporation
    Inventor: Carl T. Nelson