Patents Assigned to LSI
  • DISK-BASED STORAGE DEVICE HAVING READ CHANNEL MEMORY THAT IS SELECTIVELY ACCESSIBLE TO DISK CONTROLLER
    Publication number: 20130107391
    Abstract: A hard disk drive or other disk-based storage device comprises a storage disk, a read/write head configured to read data from and write data to the storage disk, and control circuitry coupled to the read/write head and configured to process data received from and supplied to the read/write head and to control positioning of the read/write head relative to the storage disk. The control circuitry comprises a disk controller and read channel circuitry, with the read channel circuitry comprising a read channel memory. The control circuitry is further configured to selectively permit the disk controller to access the read channel memory. For example, the disk controller may be permitted to access the read channel memory only when the read channel circuitry is not performing a read operation.
    Type: Application
    Filed: October 31, 2011
    Publication date: May 2, 2013
    Applicant: LSI Corporation
    Inventors: David M. Springberg, Jefferson E. Singleton
  • LUMINAIRES AND LIGHTING STRUCTURES
    Publication number: 20130107528
    Abstract: A luminaire is disclosed comprising one or more side members having one or more light modules associated therewith and defining a recess. The light module having one or more light sources, one or more light directing members, and a lens enclosing the light sources and directing members in the module. The light directing members redirecting light emitted from at least one of the one or more light sources to be perpendicular to the lens. One or more of the light directing members can be a reflector or an optic lens. The light modules can be configured to cast different light distributions to combine to form the desired light distribution. The light modules can be designed or exchanged to create any desired light distribution from the same side members. The light module can comprise a tray such that the lens is sealed to the tray keeping moisture from entering the module.
    Type: Application
    Filed: February 1, 2012
    Publication date: May 2, 2013
    Applicant: LSI Industries, Inc.
    Inventors: John D. Boyer, James G. Vanden Eynden, Larry Akers
  • DIGITAL INPUT DETECTOR AND ASSOCIATED ADAPTIVE POWER SUPPLY
    Publication number: 20130107392
    Abstract: Interface circuitry of a storage device or other type of processing device comprises a digital input detector and an adaptive power supply. The digital input detector comprises an input transistor. The adaptive power supply provides a variable supply voltage to the digital input detector that varies with a threshold voltage of the input transistor. In one embodiment, the variable supply voltage provided to the digital input detector by the adaptive power supply varies with the threshold voltage of the input transistor about a set point value determined as a function of an expected logic level of an input signal. For example, the set point value may be determined as a function of a minimum expected logic high input signal level. In such an arrangement, the input transistor is biased at or close to the threshold voltage for an input signal having the minimum expected logic high input signal level.
    Type: Application
    Filed: November 1, 2011
    Publication date: May 2, 2013
    Applicant: LSI Corporation
    Inventor: Jonathan H. Fischer
  • LUMINAIRES AND LIGHTING STRUCTURES
    Publication number: 20130107518
    Abstract: A luminaire is disclosed comprising one or more side members having one or more light modules associated therewith and defining a recess. The light module having one or more light sources, one or more light directing members, and a lens enclosing the light sources and directing members in the module. The light directing members redirecting light emitted from at least one of the one or more light sources to be perpendicular to the lens. One or more of the light directing members can be a reflector or an optic lens. The light modules can be configured to cast different light distributions to combine to form the desired light distribution. The light modules can be designed or exchanged to create any desired light distribution from the same side members. The light module can comprise a tray such that the lens is sealed to the tray keeping moisture from entering the module.
    Type: Application
    Filed: November 1, 2011
    Publication date: May 2, 2013
    Applicant: LSI Industries, Inc.
    Inventors: John D. Boyer, James G. Vanden Eynden, Larry Akers
  • SCAN ENABLE TIMING CONTROL FOR TESTING OF SCAN CELLS
    Publication number: 20130111286
    Abstract: An integrated circuit comprises scan test circuitry and additional circuitry subject to testing utilizing the scan test circuitry. The scan test circuitry comprises at least one scan chain having a plurality of scan cells. The scan test circuitry further comprises scan enable timing control circuitry coupled between a scan enable input of the scan test circuitry and scan enable inputs of respective ones of the scan cells. The scan enable timing control circuitry is operative to control timing of a transition between a scan shift configuration of the scan cells and a functional data capture configuration of the scan cells so as to permit testing of the scan cells in the scan shift configuration.
    Type: Application
    Filed: October 28, 2011
    Publication date: May 2, 2013
    Applicant: LSI Corporation
    Inventor: Ramesh C. Tekumalla
  • OPTICALLY-BASED CONTROL FOR DEFROSTING SOLAR PANELS
    Publication number: 20130105456
    Abstract: A solar energy system comprising a defrosting module. The defrosting module includes a first light sensor configured to be located on a solar panel and to produce a first signal which is proportional to the intensity of sunlight reaching the solar panel. The defrosting module includes a second light sensor configured to be located proximate to the solar panel and configured to produce a second signal which is proportional to the intensity of ambient sunlight in the vicinity of the solar panel. The defrosting module includes a control circuit configured to compare the first signal and the second signal and to produce an activation signal when the difference between the first signal and the second signal reaches a threshold value, wherein the activation signal is configured to activate a heater module coupled to the solar panel.
    Type: Application
    Filed: November 1, 2011
    Publication date: May 2, 2013
    Applicant: LSI Corporation
    Inventors: Roger A. Fratti, Arlen R. Martin, Cathy L. Hollien
  • METHODS AND APPARATUS FOR INCREASING DEVICE ACCESS PERFORMANCE IN DATA PROCESSING SYSTEMS
    Publication number: 20130111181
    Abstract: A data processing system comprises a device and device access circuitry. The device is mapped to a first mapped address region and to a second mapped address region. The device access circuitry, in turn, is operative to access the device in accordance with a first set of memory attributes when addressing the device within the first mapped address region and to access the device in accordance with a second set of memory attributes when addressing the device within the second mapped address region. The first set of memory attributes is different from the second set of memory attributes.
    Type: Application
    Filed: October 31, 2011
    Publication date: May 2, 2013
    Applicant: LSI CORPORATION
    Inventors: Srinivasa Rao Kothamasu, George Wayne Nation, Krishna Venkanna Bhandi
  • SCAN TEST CIRCUITRY COMPRISING SCAN CELLS WITH FUNCTIONAL OUTPUT MULTIPLEXING
    Publication number: 20130111285
    Abstract: An integrated circuit comprises scan test circuitry and additional circuitry subject to testing utilizing the scan test circuitry. The scan test circuitry comprises at least one scan chain having a plurality of scan cells, with the scan chain being configured to operate as a serial shift register in a scan shift mode of operation and to capture functional data from at least a portion of the additional circuitry in a functional mode of operation. At least a given one of the scan cells of the scan chain comprises multiplexing circuitry configured to select one of multiple data lines of the scan cell for application to a functional output of the scan cell. For example, the multiplexing circuitry may comprise an output multiplexer configured to select between data outputs of master and slave flip-flops for connection to the functional output of the scan cell responsive to a test mode select.
    Type: Application
    Filed: October 27, 2011
    Publication date: May 2, 2013
    Applicant: LSI Corporation
    Inventors: Sreejit Chakravarty, Cam Luong Lu
  • Oversampled Data Processing Circuit With Multiple Detectors
    Publication number: 20130106637
    Abstract: Various embodiments of the present invention provide apparatuses and methods for processing data in an oversampled data processing circuit with multiple detectors. For example, an apparatus for processing data is disclosed that includes a first analog to digital converter operable to sample a continuous signal at a first sampling phase to yield a first digital output, a second analog to digital converter operable to sample the continuous signal at a second sampling phase to yield a second digital output, wherein the second sampling phase is different from the first sampling phase, a first detector operable to process the first digital output to yield a first detector output, and a second detector operable to process the second digital output and the first detector output to yield a detected output.
    Type: Application
    Filed: July 10, 2012
    Publication date: May 2, 2013
    Applicant: LSI Corporation
    Inventors: Yu Liao, Nayak Ratnakar Aravind
  • METHODS AND APPARATUS FOR VALIDATING DETECTION OF RRO ADDRESS MARKS
    Publication number: 20130107687
    Abstract: Methods and apparatus are provided for validating a detection of RRO address marks. After a potential RRO address mark is detected, a disclosed RROAM validation metric evaluates the energy of the remaining RRO data bits in the servo sector, relative to a predefined energy threshold. In addition, the number of remaining RRO data bits in the servo sector is compared to an expected value. The detected RRO address mark is validated in an exemplary embodiment if the RROAM validation metric satisfies the predefined energy threshold and the proper number of remaining RRO data bits is detected in the servo sector. The potential RRO address mark can optionally be discarded if the potential RRO address mark is not validated.
    Type: Application
    Filed: October 26, 2011
    Publication date: May 2, 2013
    Applicant: LSI CORPORATION
    Inventors: Viswanath Annampedu, Xun Zhang, Jeffrey P. Grundvig
  • Solid state lighting, driver circuits, and related software
    Patent number: 8432108
    Abstract: LED lighting fixtures, or luminaires, related components, driver circuit, methods, and software/firmware are described that can provide for among other things, ambient environment sensing, thermal self-monitoring, sensor-based power management, communications, and/or programmability. Driver and lighting circuits configured for electrical loads such as series arrangements of light emitting diodes are also described. Embodiments of PFC stages and driver stages can be combined for use as a power supply, and may be configured on a common circuit board. Power factor correction and driver circuits can be combined with one or more lighting elements as a lighting apparatus. Methods of hysteretic power factor correction start-up are also described.
    Type: Grant
    Filed: October 20, 2009
    Date of Patent: April 30, 2013
    Assignee: LSI Industries, Inc.
    Inventors: Kevin Allan Kelly, John D. Boyer, Martin Brundage
  • PVT consistent PLL incorporating multiple LCVCOs
    Patent number: 8432229
    Abstract: In described embodiments, a wide toning-range (WTR) inductive-capacitive (LC) phase locked loop (PLL) provides for a large range of differing oscillation frequencies with a set of individual LC voltage controlled oscillator (VCO) paths. The output of each individual wide range LCVCO path is provided to a multiplexor (MUX), whose output is selected based on a control signal from, for example, a device controller. Each of the set of individual wide range LCVCO paths includes a switch that couples the LCVCO to a loop filter of a voltage tuning module, wherein each switch also receives the control signal to disable or enable the LCVCO path when providing the output signal from the MUX. Each switch is configured so as to minimize leakage current drawn by the LCVCO when disabled, and to reduce or eliminate effects of input capacitance of each dormant LCVCO to the loop dynamics of the PLL.
    Type: Grant
    Filed: July 11, 2011
    Date of Patent: April 30, 2013
    Assignee: LSI Corporation
    Inventors: Yikui Jen Dong, Freeman Y. Zhong
  • Process variation based microchip identification
    Patent number: 8432250
    Abstract: An apparatus comprising a multiplexer circuit, a plurality of bit generation circuits, and a control circuit. The multiplexer circuit may be configured to generate an intermediate signal in response to (i) a plurality of input bits and (ii) a control signal. The plurality of bit generation circuits may each be configured to generate one of the plurality of input bits. The control circuit may be configured to generate the control signal.
    Type: Grant
    Filed: March 31, 2008
    Date of Patent: April 30, 2013
    Assignee: LSI Corporation
    Inventor: Erik V. Chmelar
  • Fine-grained clock skew tuning in an integrated circuit
    Patent number: 8432210
    Abstract: An apparatus for controlling clock skew in an integrated circuit (IC) includes timing circuitry operative to generate a clock signal for distribution in the IC and at least one buffer circuit operative to receive the clock signal, or a signal indicative of the clock signal, and to generate a delayed version of the clock signal as an output thereof. The buffer circuit includes at least first and second inverter stages and a resistive-capacitive (RC) loading structure. An output of the first inverter stage is connected to an input of the second inverter stage via the RC loading structure. The buffer circuit has a delay associated therewith that is selectively varied as a function of one or more adjustable characteristics of the RC loading structure. Clock skew in the IC is controlled as a function of the delay of the buffer circuit.
    Type: Grant
    Filed: November 2, 2010
    Date of Patent: April 30, 2013
    Assignee: LSI Corporation
    Inventors: Jeffrey S. Brown, Mark Franklin Turner
  • OPTICAL DISK PLAYBACK DEVICE WITH THREE-DIMENSIONAL PLAYBACK FUNCTIONALITY
    Publication number: 20130100788
    Abstract: An optical disk playback device comprises one or more lasers, an optical assembly, an optical detector, and controller circuitry coupled to the optical detector. The optical assembly is configured to direct incident light from the one or more lasers so as to form first and second scanning spots on a surface of an optical disk, and is further configured to direct corresponding reflected light from the first and second scanning spots on the surface of the optical disk to the optical detector. The optical detector is configured to process the reflected light from the first and second scanning spots to generate respective first and second data streams, and the controller circuitry is configured to generate a three-dimensional image signal from the first and second data streams.
    Type: Application
    Filed: October 24, 2011
    Publication date: April 25, 2013
    Applicant: LSI Corporation
    Inventors: Joseph Michael Freund, Diego P. deGarrido
  • TRAIN SPEED MEASURING DEVICE AND METHOD
    Publication number: 20130103225
    Abstract: Provided are a train speed measuring device and method. The train speed measuring device includes: at least one first tachometer disposed at an axle of a trailer car and for outputting a pulse signal according to a wheel revolution of the trailer car; at least one second tachometer disposed at an axle of a motor car and for outputting a pulse signal according to a wheel revolution of the motor car; at least one speed measuring unit for measuring speed values on the basis of pulse signals outputted from the at least one first tachometer and the at least one second tachometer; and a speed calculating unit for calculating the speed of the train on the basis of the measured speed values.
    Type: Application
    Filed: October 16, 2012
    Publication date: April 25, 2013
    Applicant: LSIS CO., LTD.
    Inventor: LSIS CO., LTD.
  • DYNAMIC CLOCK DOMAIN BYPASS FOR SCAN CHAINS
    Publication number: 20130103994
    Abstract: An integrated circuit comprises scan test circuitry and additional circuitry subject to testing utilizing the scan test circuitry. The scan test circuitry comprises at least one scan chain having a plurality of sub-chains associated with respective distinct clock domains, and clock domain bypass circuitry configured to selectively bypass one or more of the sub-chains. The scan chain is configurable in a scan shift mode of operation to form a serial shift register that includes fewer than all of the sub-chains with at least a remaining one of the sub-chains being bypassed by the clock domain bypass circuitry so as to not be part of the serial shift register in the scan shift mode. By selectively bypassing portions of the scan chain associated with particular clock domains, the clock domain bypass circuitry serves to reduce test time and power consumption during scan testing.
    Type: Application
    Filed: October 25, 2011
    Publication date: April 25, 2013
    Applicant: LSI Corporation
    Inventors: Ramesh C. Tekumalla, Priyesh Kumar
  • Memory device with trimmable power gating capabilities
    Patent number: 8427886
    Abstract: A memory device includes at least one memory cell including a storage element electrically connected with a source potential line. A drive strength of the storage element is controlled as a function of a voltage level on the source potential line. The memory device further includes a clamp circuit electrically connected between the source potential line and a voltage source. The clamp circuit is operative to regulate the voltage level on the source potential line relative to the voltage source. A control circuit of the memory device is connected with the source potential line. The control circuit is operative to adjust the voltage level on the source potential line as a function of an operational mode of the memory device. A coarseness by which the voltage level on the source potential line is adjusted is selectively controlled as a function of at least a first control signal.
    Type: Grant
    Filed: July 11, 2011
    Date of Patent: April 23, 2013
    Assignee: LSI Corporation
    Inventors: Ankur Goel, Venkateswara Reddy Konudula, Sathisha Nanjunde Gowda
  • Methods and apparatus for computing a probability value of a received value in communication or storage systems
    Patent number: 8429500
    Abstract: Methods and apparatus are provided for computing a probability value of a received value in communication or storage systems. A probability value for a received value in a communication system or a memory device is computed by obtaining at least one received value; identifying a segment of a function corresponding to the received value, wherein the function is defined over a plurality of segments, wherein each of the segments has an associated set of parameters; and calculating the probability value using the set of parameters associated with the identified segment.
    Type: Grant
    Filed: March 31, 2010
    Date of Patent: April 23, 2013
    Assignee: LSI Corporation
    Inventors: Erich F. Haratsch, Nenad Miladinovic, Andrei Vityaev
  • Lighting fixture
    Patent number: D680676
    Type: Grant
    Filed: November 28, 2012
    Date of Patent: April 23, 2013
    Assignee: LSI Industries, Inc.
    Inventors: John D. Boyer, James G. Vanden Eynden, Larry Akers, Vincent Charles Anthony DiCola