Patents Assigned to LSI
  • Patent number: 8347167
    Abstract: A parity unit circuit for use in a parallel, pipelined, low density parity check (LDPC) decoder that implements an iterative, min-sum, message passing LDPC algorithm. The parity unit provides a memory logic block for storing information relating to a current and next iteration of the LDPC computations and includes a “compute 1” logic block for computing a parity message (with sign) for application to related bit nodes and a “compute2” logic block for updating the data stored in the memory logic block for a next iteration of the LDPC decoder.
    Type: Grant
    Filed: December 19, 2008
    Date of Patent: January 1, 2013
    Assignee: LSI Corporation
    Inventors: Alexander Andreev, Vojislav Vukovie, Igor Vikhliantsev
  • Patent number: 8345373
    Abstract: Various embodiments of the present invention provide systems and methods for phase offset based spectral aliasing compensation. For example, a circuit for spectral aliasing reduction is disclosed that includes a phase shift circuit operable to phase shift an analog input signal and to provide a phase shifted analog signal; a first analog to digital converter circuit operable to provide a first series of digital samples corresponding to the analog input signal at a sampling frequency; a second analog to digital converter circuit operable to provide a second series of digital samples corresponding to the phase shifted analog signal at the sampling frequency; and an averaging circuit operable to average the first series of digital samples with the second series of digital samples to yield an average output.
    Type: Grant
    Filed: August 16, 2010
    Date of Patent: January 1, 2013
    Assignee: LSI Corporation
    Inventors: George Mathew, Yuan Xing Lee, Hongwei Song
  • Patent number: 8345369
    Abstract: Various embodiments of the present invention provide systems and methods for identifying a reproducible location on a storage medium. As an example, a circuit is discussed that includes a data storage circuit, a pattern comparison circuit, and a threshold comparison circuit. The data storage circuit is operable to store a first set of data samples corresponding to a region of interest. The pattern comparison circuit is operable to compare a subset of the first set of data samples with a subset of a second set of data samples corresponding to the region of interest. The pattern comparison circuit is operable to yield a match value corresponding to a degree of similarity between the first set of data samples with the subset of a second set of data samples. The threshold comparison circuit is operable to indicate an anchor point based at least in part on the magnitude of the match value relative to a threshold value.
    Type: Grant
    Filed: September 21, 2010
    Date of Patent: January 1, 2013
    Assignee: LSI Corporation
    Inventors: Haitao Xia, Shaohua Yang, George Mathew
  • Patent number: 8347304
    Abstract: A method of resource allocation failure recovery is disclosed. The method generally includes steps (A) to (E). Step (A) may generate a plurality of resource requests from a plurality of driver modules to a manager module executed by a processor. Step (B) may generate a plurality of first calls from the manager module to a plurality of allocation modules in response to the resource requests. Step (C) may allocate a plurality of resources to the driver modules using the allocation modules in response to the first calls. Step (D) may allocate a portion of a memory pool to a particular recovery packet using the manager module in response to the allocation modules signaling a failed allocation of a particular one of the resources. Step (E) may recover from the failed allocation using the particular recovery packet.
    Type: Grant
    Filed: February 26, 2009
    Date of Patent: January 1, 2013
    Assignee: LSI Corporation
    Inventors: Jose K. Manoj, Chennakesava R. Arnoori, Atul Mukker
  • Patent number: 8346990
    Abstract: methods and systems for monitoring data activity may include various operations, including, but not limited to: modifying a value of at least one counter in response to one or more input/output requests directed to at least one data storage region during a first time interval; storing a first cumulative value of the counter modified in response to one or more input/output requests directed to at least one data storage region during the first time interval following the expiration of the first time interval; modifying a value of at least one counter in response to one or more requests directed to the at least one data storage region during a second time interval; storing a second cumulative value of the counter modified in response to one or more requests directed to the at least one data storage region during the second time interval following the expiration of the second time interval; and computing at least one activity index for the at least one data storage region from at least the first cumulative value
    Type: Grant
    Filed: January 31, 2011
    Date of Patent: January 1, 2013
    Assignee: LSI Corporation
    Inventors: Brian McKean, Donald Humlicek, James Lynn, Timothy Snider
  • Publication number: 20120330324
    Abstract: A uterine manipulator includes a sound and a body. The sound has a selectively actuatable anchor disposed proximate a distal end and an operating mechanism spaced from the anchor for controlling actuation of the anchor. The body has a passage therethrough adapted to receive the sound passed proximally through the body to a position in which the operating mechanism is accessible proximally of the body and the anchor extends distally.
    Type: Application
    Filed: June 21, 2011
    Publication date: December 27, 2012
    Applicant: LSI SOLUTIONS, INC.
    Inventor: Jude S. Sauer
  • Publication number: 20120327972
    Abstract: Provided is a low power consuming, highly precise, wide-range temperature sensor. The temperature sensor includes a current mirror, a first MOS transistor, and a second MOS transistor. The current mirror generates a first reference current in response to a particular current applied by a power voltage and a second reference current in response to the first reference current so as to output the first and second reference currents. The first MOS transistor includes a drain terminal D1 receiving the first reference current and a gate terminal G1 receiving a bias voltage. The second MOS transistor includes a drain terminal D2 receiving the second reference current, and the second MOS transistor generates an output voltage.
    Type: Application
    Filed: June 26, 2012
    Publication date: December 27, 2012
    Applicant: LSIS CO., LTD.
    Inventor: Jong SEON
  • Publication number: 20120325979
    Abstract: Provided is a train sensor unit for sensing a radio communication based train to transmit train sensing information to a control unit, which includes a sensor unit, a controller unit, and a communication unit. The sensor unit obtains environmental information about an environment in which the train travels. The controller unit determines whether the train is present, based on the obtained environmental information. The communication unit wirelessly transmits the train sensing information to the control unit if the train is present.
    Type: Application
    Filed: June 26, 2012
    Publication date: December 27, 2012
    Applicant: LSIS CO., LTD.
    Inventor: Young Hwan Yoon
  • Publication number: 20120331181
    Abstract: Methods and systems for improved update of firmware for components in a storage system/network. A storage network comprising one or more initiator components coupled through one or more switching components to one or more target components may be updated by generating and distributing a package buffer comprising portions where each portion comprises firmware for a corresponding type of component. Switching and/or initiator components in the system locate a portion of the package buffer for each target component directly coupled to it and transmits the located, corresponding portion (comprising firmware) to each target component. Each initiator/switching component then also forwards the entire package buffer to each other switching component coupled with it and the process repeats until all components have received updated firmware.
    Type: Application
    Filed: June 21, 2011
    Publication date: December 27, 2012
    Applicant: LSI CORPORATION
    Inventors: Nilesh S. Govande, Rakesh Verma, Vishal R. Thakkar
  • Publication number: 20120326674
    Abstract: Provided are a switching device for an electric vehicle and a method of controlling the switching device. The switching device includes a switch, a signal selection part, an inverter, and a controller. The switch generates a first or second switching signal according to an operation mode. The signal selection part receives the first or second switching signal, and selects the first or second switching signal according to the operation mode to output the selected switching signal. The inverter performs a direct current/alternating current conversion process on power according to the switching signal output from the signal selection part, and outputs the power. The controller determines the operation mode, and generates a control signal according to the operation mode such that the signal selection part selects the first or second switching signal.
    Type: Application
    Filed: June 19, 2012
    Publication date: December 27, 2012
    Applicant: LSIS CO., LTD.
    Inventors: Chun Suk YANG, Byung Woon JANG
  • Publication number: 20120330587
    Abstract: A local monitoring apparatus, a power distribution monitoring system of a digital protective relay, and a method using the same are disclosed herein. According to the embodiments of the present disclosure, a power distribution monitoring system of the digital protective relay may be configured with a local monitoring program and a self function of the digital protective relay, thereby reducing a cost burden due to the installation of a remote monitoring system. It may be connected to one or more digital protective relays through a remote monitoring connection line to transmit and receive data using a local monitoring dedicated protocol, thereby easily processing various data contained in the digital protective relay. Furthermore, according to the present disclosure, various setting values required for a plurality of digital protective relays, respectively, may be accessed and downloaded once, thereby enhancing the user's convenience and increasing management efficiency.
    Type: Application
    Filed: June 20, 2012
    Publication date: December 27, 2012
    Applicant: LSIS CO., LTD.
    Inventor: Byung Jin LEE
  • Publication number: 20120327541
    Abstract: The present disclosure relates to a digital protection relay and an operation method of the digital protection relay for enhancing the operation of a frequency change rate relay element (81R) thereof, and the digital protection relay and an operation method thereof may calculate a plurality of different frequency change rates from the measured frequency and use a value of the frequency change rate selected based on a predetermined criteria in the control of a relay operation, thereby providing an effect of enhancing reliability for the operation of the frequency change rate relay element.
    Type: Application
    Filed: March 20, 2012
    Publication date: December 27, 2012
    Applicant: LSIS CO., LTD.
    Inventor: Jong Jin JUNG
  • Publication number: 20120325778
    Abstract: An electrode assembly for a vacuum interrupter is configured such that supporting members can support most of a contact electrode plate and a supporting electrode plate in an axial direction with coil conductors interposed therebetween. Accordingly, an impact generated between electrode assemblies upon a closing operation of the vacuum interrupter may be evenly distributed onto the supporting members, which may result in preventing each of the electrode plates and the coil conductors from being deformed. Also, the supporting members are inserted into the electrode plates and the coil conductors, thereby effectively preventing a current from flowing via the supporting members. In addition, the supporting member may be wide and large so as to simplify an assembly operation and reduce an assembly time.
    Type: Application
    Filed: June 19, 2012
    Publication date: December 27, 2012
    Applicant: LSIS CO., LTD.
    Inventor: Jae Seop RYU
  • Publication number: 20120325633
    Abstract: A circuit breaker includes: a bimetal bent by heat generated from a conductive current; a pressing member coupled to an upper part of the bimetal; a cross bar spaced from the pressing member by a prescribed gap, and configured to contact the pressing member and to rotate by being pressed when the bimetal is bent; and a switching mechanism operated by rotation of the cross bar, and configured to separate a movable contactor from a fixed contactor, wherein a coupling hole for coupling the pressing member is provided at an upper part of the bimetal, and wherein the pressing member is bonded to the coupling hole after a prescribed gap between the pressing member and the cross bar has been determined by apply of a current when the pressing member is in a state of being freely movable in the coupling hole.
    Type: Application
    Filed: June 20, 2012
    Publication date: December 27, 2012
    Applicant: LSIS CO., LTD.
    Inventor: Woong Jae Kim
  • Publication number: 20120327939
    Abstract: A gateway device is provided. The gateway device for relaying communication between an automotive network communication device and an industrial field bus communication device includes: a Controller Area Network (CAN) input unit for receiving a CAN input data frame from an external; and a conversion unit for converting the received CAN input data frame into a Modbus output data frame according to a predetermined method.
    Type: Application
    Filed: June 22, 2012
    Publication date: December 27, 2012
    Applicant: LSIS CO., LTD.
    Inventor: Sung Jin JANG
  • Publication number: 20120327948
    Abstract: In one embodiment, a network processor services a plurality of queues having data using weighted round robin scheduling. Each queue is assigned an initial weight based on the queue's priority. During each cycle, an updated weight is generated for each queue by adding the corresponding initial weight to a corresponding previously generated decremented weight. Further, each queue outputs as many packets as it can without exceeding its updated weight. As each packet gets transmitted, the updated weight is decremented based on the number of blocks in that packet. If, after those packets are transmitted, the decremented weight is still positive and the queue still has data, then one more packet is transmitted, no matter how many blocks are in the packet. When a decremented weight becomes negative, the weights of the remaining queues are increased to restore the priorities of the queues as set by the initial weights.
    Type: Application
    Filed: June 22, 2011
    Publication date: December 27, 2012
    Applicant: LSI Corporation
    Inventors: Govindarajan Mohandoss, Santosh Narayanan, Rayesh Kashinath Raikar, Prabhakar Ballapalle
  • Publication number: 20120326745
    Abstract: A differential buffer circuit having increased output voltage swing includes a differential input stage including at least first and second transistors, the first and second transistors being operative to receive first and second signals, respectively. The buffer circuit further includes a bias stage connected between the differential input stage and a first voltage source. The bias stage is operative to generate a quiescent current as a function of a third signal supplied to the bias stage. A load circuit is connected between a second voltage source and the differential input stage, first and second differential outputs of the buffer circuit being generated at a junction between the load circuit and the differential input stage. The load circuit includes first and second switching elements coupled with the first and second transistors, respectively.
    Type: Application
    Filed: June 21, 2011
    Publication date: December 27, 2012
    Applicant: LSI CORPORATION
    Inventors: Makeshwar Kothandaraman, Pankaj Kumar, Paul K. Hartley, John Christopher Kriz
  • Publication number: 20120326768
    Abstract: A compensation circuit for controlling a variation in output impedance of at least one buffer circuit includes a monitor circuit and a control circuit coupled with the monitor circuit. The monitor circuit includes a pull-up portion including at least one PMOS transistor and a pull-down portion comprising at least one NMOS transistor. The monitor circuit is configured to track an operation of an output stage of the buffer circuit and is operative to generate at least a first control signal indicative of a status of at least one characteristic of corresponding pull-up and pull-down portions in the output stage of the buffer circuit over variations in PVT conditions to which the buffer circuit may be subjected. The control circuit is operative to generate a set of digital control bits as a function of the first control signal. The set of digital control bits is operative to compensate the pull-up and pull-down portions in the output stage of the buffer circuit over prescribed variations in PVT conditions.
    Type: Application
    Filed: June 21, 2011
    Publication date: December 27, 2012
    Applicant: LSI CORPORATION
    Inventors: Dipankar Bhattacharya, Ashish V. Shukla, John Christopher Kriz, Makeshwar Kothandaraman, Pankaj Kumar, Pramod Parameswaran
  • Publication number: 20120324715
    Abstract: Disclosed is a method for controlling a gap in a circuit breaker, the circuit breaker configured to interrupt a circuit by separating a movable contactor from a fixed contactor as a cross bar is pressed to be rotated by a pressing member due to bending of a bimetal, the method including: a gap forming step of bending the bimetal by apply of a set current, in a state where the pressing member is coupled to a coupling hole so as to be freely-movable, the coupling hole formed at an upper part of the bimetal; and a gap fixing step of interrupting the set current when a prescribed time has lapsed, and of welding the pressing member to the bimetal.
    Type: Application
    Filed: June 20, 2012
    Publication date: December 27, 2012
    Applicant: LSIS CO., LTD.
    Inventor: Woong Jae KIM
  • Patent number: 8341350
    Abstract: A method for metadata management in a storage system may include providing a metadata queue of a maximum size; determining whether the metadata for a particular sub-LUN is held in the metadata queue; updating the metadata for the particular sub-LUN when the metadata for the particular sub-LUN is held in the metadata queue; inserting the metadata for the particular sub-LUN at the head of the metadata queue when the metadata queue is not full and the metadata is not held in the metadata queue; replacing an entry in the metadata queue with the metadata for the particular sub-LUN and moving the metadata to the head of the metadata queue when the metadata queue is full and the metadata is not held in the metadata queue; and controlling the number of sub-LUNs in the storage system to manage data accessed with respect to an amount of available data storage.
    Type: Grant
    Filed: February 3, 2011
    Date of Patent: December 25, 2012
    Assignee: LSI Corporation
    Inventors: Martin Jess, Brian McKean