Abstract: Methods and apparatus for improved performance in communications between a SAS/STP initiator device and a plurality of SATA storage devices coupled with the initiator through an enhanced switching device. The switching device is enhanced in accordance with features and aspects hereof to receive a DMA SETUP FIS from a SATA storage device and to transmit multiple modified DMA SETUP FISs to the initiator where each modified DMA SETUP FIS comprises a subcount less than the maximum count in the received DMA SETUP FIS.

Abstract: A signal detector includes a summation unit connected to offset first and second input signals representing a differential input signal into two offset pairs of first and second signals. The signal detector also includes a detection unit connected to select the first signal from one of the offset pairs of first and second signals and the second signal from the other of the offset pairs in an overlap portion of the first and second signals to form a complementary pair of overlap signals and provide a differentially peak-detected output signal from the complementary pair of overlap signals. Additionally, the signal detector includes a comparator connected to provide a detection output signal corresponding to the differentially peak-detected output signal and a reference signal. A method of operating a signal detector is also included.

Abstract: Methods and apparatus for improved performance in communications with a SATA target device. Features and aspects hereof provide for continuing DMA transfers from a storage controller (e.g., a SATA host or a SAS/STP initiator) to a SATA target device without regard to receipt of DMA ACTIVATE Frame Information Structures (FIS). Logic to implement these features may be provided by bridge logic within an enhanced SAS expander coupled with an enhanced SAS/STP initiator or may be provided by suitable logic in an enhanced SATA host coupled directly with an enhanced SATA target device. By continuing DMA transfer of data from the initiator/host to the SATA target device without regard to receipt of a DMA ACTIVATE FIS, more of the available bandwidth of the SAS/SATA communication link may be utilized. Other standard features of the SAS/SATA protocols provide for flow control to prevent overrun of the SATA target device's buffers.

Abstract: Methods and apparatus are provided for pseudo asynchronous testing of receive paths in serializer/deserializer (SerDes) devices. A SerDes device is tested by applying a source of serial data to a receive path of the SerDes device during a test mode. The receive path substantially aligns to incoming data using a bit clock. A phase is adjusted during the test mode of the bit clock relative to the source of serial data to evaluate the SerDes device. The source of serial data may be, for example, a reference clock used by a phase locked loop to generate the bit clock. The phase of the bit clock can be directly controlled during the test mode, for example, by a test phase control signal, such as a plurality of interpolation codes that are applied to an interpolator that alters a phase of the bit clock.

Abstract: An apparatus comprises a summer suitable for subtracting a filtered feedback signal from an input; a symbol decision device suitable for receiving an output from the summer; a feedback filter suitable for filtering an output from the symbol decision device and for sending the filtered feedback signal to the summer, the feedback filter comprising an adjustable swing amplifier and an adjustable pole filter; and an adaptation algorithm suitable for simultaneously adapting both a pole setting and a swing setting based upon a least mean squared error criteria. The summer, the symbol decision device, and the feedback filter form a feedback circuit utilized to reconstruct an electrical signal distorted during transmission.

Abstract: An inverter/charger integrated device is provided. The inverter/charger integrated device includes: a three-phase motor; a rectifying unit configured to rectify AC power for charging a battery and output the rectified AC power to a neutral point of the three-phase motor; a rectifier/inverter integrated unit configured to be connected to the rectifying unit and charge the battery; and a control unit configured to control the charging of the battery and an operation of the three-phase motor.

Abstract: Disclosed is a parameter copy method and keypad having parameter copy function by recognizing software versions and inverter types. The keypad according to the present disclosure includes a communication unit transmitting data to a plurality of inverters and receiving data from the plurality of inverters; and a controller determining whether type of a first inverter received from the communication unit is same as that of a second inverter, and performing a parameter copy if the type of a first inverter received from the communication unit is same as that of the second inverter, whereby parameters can be copied regardless of types and program versions of inverter, and parameter copy in a plurality of inverters each having a different type can be easily performed.

Abstract: Provided is a pump system. The pump system includes an AC (alternating current) electric motor, a converter, a smoothing unit, an inverter, a volt/hertz pulse width-modulation controller, and a main controller. The AC electric motor operates a pump which is a load. The converter receives AC power and converts the AC power into DC (direct current) power. The smoothing unit smoothes a DC voltage converted by the converter. The inverter converts the DC voltage output from the smoothing unit into an AC voltage. The volt/hertz pulse width-modulation controller applies switching voltage to a semiconductor switching device of the inverter. The main controller changes an operating frequency according to a load detected when the Ac electric motor is in operation and puts the AC electric motor to a sleep mode after determining a load operation status.

Abstract: An apparatus for detecting a partial discharge (PD) signal capable of detecting a PD signal of a power device includes: a partial discharge (PD) coupler connected to a ground side of a power device and configured to cancel a low frequency noise component including a commercial frequency from an AC component flowing through the ground side of the power device when a partial PD signal is generated from the power device, and to allow a high frequency component including a PD signal included in the AC component to pass therethrough to generate a PD analog signal; and a PD detection unit configured to cancel a noise signal from the PD analog signal generated by the PD coupler to detect only the PD signal.

Abstract: Apparatus and method for managing power consumption of circuits within a Serial Attached SCSI (SAS) device. A SAS device having a plurality of PHY logic circuits includes a queue manager and a power manager. The queue manager is operable to determine a current workload based on queued entries for the plurality of PHY logic circuits. Based on the current workload, the power manager is operable to set identified ones of the plurality of PHY logic circuits into a low power mode. In some embodiments, PHY logic circuits may be restored to full power operation responsive to changes in the current workload and/or responsive to receipt of a signal from another SAS device coupled to the SAS device. In other embodiments the power manager is further operable to manage power consumption of link and/or DMA logic circuits of the SAS device.

Abstract: An electromagnetic switch includes: a stationary contact; a movable contact movably provided with respect to the stationary contact; a coil configured to move the movable contact to a side of the stationary contact by means of current conduction; and a shaft provided inside the coil such that the movable contact is provided at an end portion thereof, wherein a snap-fit portion having a pair of hooks disposed to face each other is provided at an end portion of the shaft, and the movable contact is fixed between the end portion of the shaft and the hook.

Abstract: A technique for enhancing substrate bias of grounded-gate NMOS fingers (ggNMOSFET's) has been developed. By using this technique, lower triggering voltage of NMOS fingers can be achieved without degrading ESD protection in negative zapping. By introducing a simple gate-coupled effect and a PMOSFET triggering source with this technique, low-voltage triggered NMOS fingers have also been developed in power and I/O ESD protection, respectively. A semiconductor device which includes a P-well which is underneath NMOS fingers. The device includes an N-well ring which is configured so that the inner P-well underneath the NMOS fingers is separated from an outer P-well. The inner P-well and outer P-well are connected by a P-substrate resistance which is much higher than the resistance of the P-wells. A P+-diffusion ring surrounding the N-well ring is configured to connect to VSS, i.e., P-taps.

Abstract: Methods and apparatus are provided for framing synchronization control for a framer/mapper/multiplexor (FMM) device with 1+1 and equipment protection. FMM device are disclosed that synchronize one or more internal signals by changing a phase of the one or more internal signals without changing a frequency of the one or more internal signals based on a desired phase at a destination of each of the one or more internal signals. A programmable synchronization signal may optionally be employed for the synchronization.

Abstract: A system and method for clock optimization to achieve timing signoff in an electronic circuit and an EDA tool that embodies the system or the method. In one embodiment, the system includes: (1) a clock cell identifier/sorter configured to identify at least some clock cells in a clock network associated with an electronic circuit design and sort the cells according to breadth, (2) a slack analyzer associated with the clock cell identifier/sorter and configured to identify flops that are downstream of the cells and determine a worst setup and hold timing slack thereof and (3) a clock cell delay adjuster associated with the slack analyzer and configured to adjust delays of the cells subject to the worst setup and hold timing slack.

Abstract: An apparatus/method is provided. The power conversion apparatus includes: a rectifying unit including a silicon-controlled rectifier thyristor (SCR) for rectifying single-phase power externally inputted; a power factor correcting unit configured to correct a power factor of the power rectified by the rectifying unit; and a control signal generating unit configured to detect a zero-crossing point based on the single-phase power inputted and generate a pulse single of which a width increases as time elapses based on the detected zero-crossing point. The rectifying unit rectifies the single-phase power by using the pulse signal inputted to a gate terminal of the SCR.

Abstract: The present disclosure enables comparison of an energy consuming propensity of each energy consumer with that of other energy consumers. To this end, energy usage information of each energy consumer and comparison conditions (size of house, the number of families, energy consuming regions) are collected, and energy consuming propensities of other energy consumers are compared with energy consuming propensity of each energy consumer similar in terms of living environment, and the comparison is shown. A variety of statistical information for comparison is provided through an IHD (In-Home Display) installed at each house, whereby the energy consumers can easily and conveniently evaluate his own energy consuming propensity. An objective evaluation of his or her position related to energy consumption of other energy consumers promotes more active energy conservation and more rational energy consumption by being stimulated by the energy consumption of other energy consumers.

Abstract: Provided is a data transfer apparatus according to an embodiment of the present invention including: a power supply unit supplying operation power; a communication unit connected with an external apparatus and downloading inverter control data from the external apparatus; a memory storing the inverter control data downloaded by the communication unit; a connection unit connected to an inverter, transferring the inverter control data stored in the memory to the inverter, and supplying the operation power supplied through the power supply unit to the inverter; and a control unit allowing the operation power to be supplied to the inverter and allowing the inverter control data to be transferred to the inverter whenever the inverter is connected.

Abstract: A lighting apparatus is shown and described. In one aspect, the lighting apparatus includes a light source, a plate, and frame. The light source can include one or more lighting elements that are in thermal communication with the light source. The plate can have a dissipative portion extending outward from a point of thermal communication between the plate and the light source. The frame can at least partially enclose the light source and may also be in thermal communication therewith.

Abstract: The present invention introduces a location determining system. The location determining system includes a reader array and a location determining engine server. The reader array includes three readers, where each reader includes a plurality of reader groups that receives a tag information signal transmitted from the tag, generates a PN code generated from inside, correlation and standard deviation of the correlation, and bypasses the tag information signal, in a case a ratio of correlation and standard deviation of the correlation is greater than a predetermined critical value. The location determining engine server determines a final location value relative to the tag, using the tag information signal having a time difference of tag information signals received from the three readers forming each reader group among the tag information signals bypassed by the plurality of reader groups smaller than a predetermined marginal time difference.