Abstract: A display device can include a substrate having a plurality of first sub pixels and a plurality of second sub pixels, a plurality of first light emitting diodes disposed in the plurality of first sub pixels and configured to emit light to one surface of the substrate, and a plurality of second light emitting diodes disposed in the plurality of second sub pixels and configured to emit light to an opposite surface to one surface of the substrate. The plurality of first light emitting diodes and the plurality of second light emitting diodes are alternately disposed on the plane. Accordingly, light is emitted to opposite surfaces of the substrate to display images on the opposite surfaces of the substrate.

Abstract: An organic electroluminescent device, including at least one functional light-emitting layer. In a first target current density interval not greater than 0.01 mA/cm2, an electron mobility VE and a hole mobility VH of the functional light-emitting layer satisfy the requirements of |VE?VH|>1×10?8 cm2/Vs. The organic electroluminescent device has a relatively low luminous efficiency under a low gray scale, thereby exhibiting relatively excellent display quality. Also disclosed is a display apparatus.

Abstract: A display device may include a substrate including an emission area and a non-emission area, a bank structure positioned on the emission area of the substrate and having an undercut shape, a pixel electrode positioned on the bank structure, a first light emitting layer positioned on the pixel electrode, a first cathode electrode positioned on the first light emitting layer, a first capping layer positioned on the first cathode electrode, a connection electrode positioned on the first capping layer, a pixel defining layer positioned on the non-emission area of the substrate and defining a first opening, an inorganic layer positioned on the pixel defining layer and defining a second opening, and an organic layer positioned on the inorganic layer.

Abstract: An atomizer and an electronic atomization device are provided, The atomizer includes: a housing; a first sealing member, arranged inside the housing, and defining, with an inner wall of the housing, a liquid storage cavity used for storing a liquid substrate, a first opening used for guiding an airflow to pass through being defined on the first sealing member; a base configured to support the first sealing member; and an atomization element held on the first sealing member and configured to atomize the liquid substrate. The atomization element includes a porous body and a heating element integrated on the porous body. The porous body spans the first opening, and at least part of the porous body abuts against a surface of a side of the first sealing member facing the liquid storage cavity, to prevent the liquid substrate from entering the first opening through the liquid storage cavity.

Abstract: Provided is a wig including a planting net divided into a plurality of planting nets, the planting net including a front planting net, one pair of side planting nets, and a rear planting net. The front planting net is manufactured as a wig fabric by knotting wig fibers, a loop pattern with a certain shape prepared in advance is provided as a plurality of portions on the one pair of side planting nets and the rear planting net, and an ornamental hairpiece in a certain shape is connected to the loop pattern, and the front planting net, the one pair of side planting nets, and the rear planting net are sewn together so that a user is able to create a more natural look when wearing the wig.

Abstract: An air fryer with air suction on a side portion includes a machine body, a cooking chamber arranged in the machine body, a hot air circulation system arranged on a side portion of the cooking chamber, communicating with the cooking chamber, and a frying basket arranged in the cooking chamber and having a top opening. A food tray with a through hole is suspended in the frying basket, a ventilation hole is formed in a side wall of the frying basket below the food tray, and the circulating heat flow generated by the hot air circulation system enters the cooking chamber, and then is adapted to enter the frying basket from the top opening of the frying basket, penetrate through the food tray from an upper space of the food tray to enter a lower space of the food tray, and then flow out of the ventilation hole.

Abstract: A system may include a power inductor electrically coupled to the plurality of switches, and a flying capacitor coupled to the plurality of switches, wherein the plurality of switches are controllable among a plurality of switch configurations in order to generate an output voltage from an input voltage received by the multi-level power converter. The system may also include a flying capacitor voltage control loop configured to, based on an error signal between a measurement of a flying capacitor voltage across terminals of the flying capacitor and a flying capacitor reference voltage, generate switch control signals for switching among the plurality of switch configurations in order to regulate the flying capacitor voltage and a compensator configured to apply compensation to the flying capacitor reference voltage based on a measurement of the input voltage.

Abstract: A scanning control circuit is connected to a gate driving module and is connected to at least one P-type transistor in a pixel circuit, and the scanning control circuit is configured to receive both an enable control signal and an initial scanning signal from the gate driving module, and output a target scanning signal to the connected P-type transistor according to the enable control signal and the initial scanning signal. In a case where the enable control signal is in a first level state, a level state of the target scanning signal is the same as that of the initial scanning signal. In a case where the enable control signal is in a second level state, the level state of the target scanning signal is a high level state, and the first level state is different from the second level state.

Abstract: A display apparatus includes: a display panel including a plurality of subpixels; a control printed circuit board including a first driving voltage line, a power management circuit, and at least one first feedback driving voltage line electrically connected to the power management circuit; a source printed circuit board electrically connected between the display panel and the control printed circuit board, the source printed circuit board including at least one second driving voltage line electrically connected to at least one of the subpixels; and at least one flexible flat cable connected between the source printed circuit board and the control printed circuit board. The first driving voltage line may be electrically connected to the at least one second driving voltage line through the at least one flexible flat cable, and the at least one first feedback driving voltage line may be electrically connected to the at least one flexible flat cable.

Abstract: A display panel includes first and second sub-pixels, a 2a-th power line, and a 2b-th power line. The first sub-pixel is configured to emit light in a first range of wavelengths. The second sub-pixel is positioned in a first direction from the first sub-pixel and is configured to emit light in a second range of wavelengths. The 2a-th power line extends in the first direction and respectively overlaps the first and the second sub-pixels in a third direction. The 2a-th power line includes a bridge pattern extending from the 2a-th power line in a second direction. The 2a-th power line is electrically connected to the first sub-pixel through the bridge pattern. The 2b-th power line bypasses the bridge pattern and extends in the first direction. The 2b-th power line respectively overlaps the first and the second sub-pixels in the third direction and is electrically connected to the second sub-pixel.

Abstract: A gate driving circuit and a display panel are provided by the present application. An Nth stage gate driving circuit unit includes a first pull-up controlling module, a second pull-up controlling module, and a pull-up module. During a forward scanning, the first pull-up controlling module is configured to render the pull-up module to be turned on at the beginning of a scanning, and is further configured to pulled down a potential of the output terminal of the Nth stage gate driving circuit unit to a low potential at the end of the scanning. During a reverse scanning, the second pull-up controlling module is further configured to render the pull-up module to be turned on at the beginning of a scanning, and is configured to pull down a potential of the output terminal of the Nth stage gate driving circuit unit to a low potential at the end of the scanning.

Abstract: A memory circuit includes a first memory cell operatively accessible through a first access line and a second access line; a first read pass-gate transistor and a second read pass-gate transistor coupled to the first access line and second access line, respectively; a first sense amplifier coupled to the first access line and the second access line; a first read enable control circuit configured to generate a first read enable signal based on a clock signal; and a second read enable control circuit configured to generate a second read enable signal. The first read enable signal selectively transitions to a different logic state based on a first sense enable signal. The second read enable signal is configured to activate or deactivate both the first and second read pass-gate transistors, and the first sense enable signal is configured to activate or deactivate the first sense amplifier.

Abstract: A method of operating a memory device is provided, including operations: generating, based on at least one weight stored in a first memory, a weight feature to be stored in a second memory different from the first memory, wherein the weight feature is associated with a number of repetitious bits, that are in neighbor positions of and the same as a most significant bit, in the at least one weight; and accessing, according to the weight feature and an address of the at least one weight, the first memory and the second memory to transmit the at least one weight to a multiply and accumulate circuit for a first neural network layer operation.

Abstract: Embodiments of this application provide a communications device. The communications device is a first device, the first device includes a processor and a memory, the memory is configured to store a computer program, and the processor is configured to invoke the computer program stored from the memory and run the computer program, to cause the first device to perform transmitting a first message to a second device, where the first message includes first artificial intelligence AI/machine learning ML related capability information, the first AI/ML related capability information is associated with the first device, the first AI/ML related capability information comprises M pieces of information, and M is a positive integer.

Abstract: Embodiments of this disclosure provide a communication method, a network device, a storage medium, and a program product. In the communication method, a network device of a core network receives an access request from a non-3rd generation partnership project (3GPP)-technology-based access point, where the access request is used to enable a terminal device connected to the non-3GPP access point to access the core network. The network device performs authentication on the terminal device based on the access request; and if the network device determines that the authentication succeeds, the network device sends a connection identifier to a non-3GPP access device. The connection identifier is used to determine an L2 or L3 connection between the non-3GPP access point and the non-3GPP access device. The terminal device connected to the non-3GPP access point gains access to the core network without a non-3GPP access gateway.

Abstract: A method for selecting a cell in a non-terrestrial network (NTN) The method includes: user equipment queries whether there is first prestored information and determines a frequency for preferential searching based on the first prestored information. The user equipment then determines values of a first decision factor, a second decision factor, a first weighting coefficient, and a second weighting coefficient in a first decision criterion. The user equipment searches for a cell according to the determined first decision criterion and selects a cell with the largest value of the first decision criterion is largest to camp.

Abstract: The disclosure aims to provide a fluororesin for use in electrochemical device binders which enables formation of an electrode mixture sheet with high strength, and an electrochemical device binder, an electrode mixture, an electrode, and a secondary battery. Provided is a fluororesin for use in electrochemical device binders, the fluororesin including a tetrafluoroethylene unit and a hexafluoropropylene unit and being expandable.

Abstract: Provided is a battery cell stacking jig for stacking a plurality of battery cells of a secondary battery. Additionally, the battery cell stacking jig can include a fork supporting both ends of the battery cells so that the plurality of battery cells are seated therein, and the fork is disposed in a plurality at a certain distance apart with respect to a horizontal direction. The battery cell stacking jig can further include a gripper movably provided on an upper portion of the fork, and disposed in a plurality with respect to the horizontal direction, and being configured to load a battery cell perpendicularly to the fork such that the battery cell is seated in the fork, and a transfer connected to the plurality of grippers and configured to move the grippers to the upper portion of the fork.

Abstract: In a method of manufacturing a semiconductor device, a fin structure including a lower fin structure and an upper fin structure disposed over the lower fin structure is formed, wherein the upper fin structure includes dielectric layers and multi-film layers alternately stacked, each of the multi-film layers includes a channel layer, a first protection layer and a second protection layer, and the channel layer is between the first protection layer and the second protection layer. A sacrificial gate structure is formed over the upper fin structure. A source/drain epitaxial layer is formed over a source/drain region of the fin structure after forming the sacrificial gate structure over the upper fin structure. The sacrificial gate structure is removed after forming the source/drain epitaxial layer. The dielectric layers are removed after removing the sacrificial gate structure. A gate structure is formed around the multi-film layers.

Abstract: A thin-film transistor array substrate and a display device including the same are discussed. The thin-film transistor array substrate can include a buffer layer disposed over a base substrate and a thin-film transistor. Parasitic capacitance is minimized by minimizing the area where the gate electrode overlaps the conductorization region. The breakdown characteristics of the thin-film transistor are improved by minimizing the overlapping area and improving the thickness uniformity of the gate insulating layer. The resolution and performance of the display device are improved by reducing the size of the thin-film transistor disposed in the display device while improving the characteristics of the thin-film transistor. The process steps and the masks are reduced and the process optimization is achieved. Further, the resistance of the gate electrode is reduced, the switching speed of the thin-film transistor is improved, and the power loss is reduced, thereby contributing to low power consumption.