Abstract: A method for making a chirped grating device capable of a broad bandwith for optical communication systems is disclosed. An intrinsically-chirped optical grating is externally strained to alter the range of chirping. The external strain may be induced by a gradient-generating body bonded onto the length of the fiber grating that may be latchably strained so that the grating characteristics may be changed or tuned while avoiding use of a continuous power supply. Various optical networking applications using such dispersion compensating devices are also disclosed.

Abstract: A method is for cleaning via openings during manufacturing of integrated circuits. The method preferably comprises the steps of sputter cleaning the via opening at least once, and exposing the via opening to a reducing atmosphere at least once. The method may include alternatingly repeating the sputter cleaning and exposing steps. The step of sputter cleaning is preferably performed prior to the step of exposing, and a sputter cleaning may be performed after a last step of exposing the via opening to the reducing atmosphere. In one embodiment, the exposed metal portion comprises a metal compound, such as an oxide. Accordingly, the step of sputter cleaning removes at least a portion of the metal oxide, and the step of exposing comprises reducing at least a portion of the metal oxide. The invention is particularly applicable when the metal interconnection layer is a copper, as copper readily oxides at its exposed surface.

Abstract: A generalized analysis-by-synthesis method and apparatus are disclosed. A plurality of trial original signals are generated based on an original signal for coding. The trial original signals are constrained to be perceptually similar to the original signal. Trial original signals are coded to produce one or more parameters representative thereof. Estimates of the trial original signals are synthesized from these parameters. Errors between the trial original signals and the synthesized estimates are determined. A coded representation of the original signal is determined which comprises parameters of the trial original signal having an associated error which satisfies an error evaluation process. Trial original signals may be generated by application of time-warps or time-shifts to the original signal. Coding of a trial original signal may be performed with conventional analysis-by-synthesis coding such as code-excited linear prediction coding (CELP).

Abstract: An AAL2/SSCS packet voice system multiplexes various forms of voice-band traffic including voice packets, fax packets, and data packets into a virtual circuit (VC). This AAL2/SSCS packet voice system executes a dynamic call admission algorithm that takes into account call type in deciding whether to admit a new call to the VC. In particular, this approach takes into account different bandwidth needs for different call types. The AAL2/SSCS packet voice system also performs bit or block dropping on voice packets to mitigate the effects of traffic congestion. The bit or block dropping is done based on the packet queue fill value exceeding at least one queue threshold. Further, the AAL2/SSCS packet voice system also dynamically varies a queue threshold as a function of capacity.

Abstract: This invention uses a computer program to mine preexisting hardware equipment configuration data located in a variety of preexisting source hardware equipment configuration databases. The computer program either creates a new hardware equipment configuration database from parts of existing hardware equipment configuration databases or modifies an existing hardware equipment configuration database. The computer program replaces the current system's reliance upon manual data entry by data engineers to configure the operation of a new telecommunication switch or replace the software in a telecommunication switch that was damaged or requires a new hardware equipment configuration data configuration.

Abstract: A system for adhering a plurality of parts to a support film is provided. The parts are positioned between a support base with a heater and a cover membrane. The cover membrane is located beneath a sealed chamber. The chamber has an inlet through which gas is input. A downward force caused by gas pressure in the chamber causes the cover membrane to contact the parts and presses the plurality of parts against the film. A heating device heats the film to cause the parts to adhere to the film.

Abstract: A method of fabricating a novel split gate memory cell comprises forming a tunnel oxide layer on a silicon substrate, forming a first conductive layer over said tunnel oxide layer, etching a trench in said conductive layer to divide said conductive layer into two separate layers with a space therebetween, one such layer to become a first gate electrode and the other separate layer to become a floating gate electrode of the device, forming a dielectric layer over the exposed surfaces, and depositing a second conductive layer which will become a second control gate electrode over said dielectric layer.

Abstract: A VCSEL comprises separate current and optical guides that provide unique forms of drive current and transverse mode confinement, respectively. In one embodiment, the optical guide comprises an intracavity high refractive index mesa disposed transverse to the cavity resonator axis and a multi-layered dielectric (i.e., non-epitaxial) mirror overlaying the mesa. In another embodiment, the current guide comprises an annular first electrode which laterally surrounds the mesa but has an inside diameter which is greater than that of an ion-implantation-defined current aperture. The current guide causes current to flow laterally from the first electrode along a first path segment which is essentially perpendicular to the resonator axis, then vertically from the first segment along a second path segment essentially parallel to that axis, and finally through the current aperture and the active region to a second electrode.

Abstract: A method for making an integrated circuit capacitor includes forming an interconnection line adjacent a substrate, forming a first dielectric layer on the interconnection line, forming a first opening in the first dielectric layer, and forming a second opening in the interconnection line aligned with the first opening and having an enlarged width portion greater than a width of the first opening. The method further includes filling the first and second openings with a conductive metal to define a metal plug having a body portion and an anchor portion adjacent lower portions of the first dielectric layer. The method also includes forming a trench in the first dielectric layer adjacent the body portion of the metal plug, forming a first electrode lining the trench and contacting the metal plug, forming a second dielectric layer on the first electrode, and forming a second electrode on the second dielectric layer.

Abstract: A selectable compatibility electrical connector assembly has a high performance jack and a high performance plug for mating with the jack to form a high performance electrical connection. The jack is adapted to receive low performance plugs and has a movable member therein for altering the transmission loss characteristic of the connector by introducing or removing circuit elements into or from the connector circuit depending upon whether a low performance plug or the high performance plug is inserted in the jack. The plug is adapted to be inserted into a low performance jack and has a movable member therein for altering the transmission loss characteristic of the connector by introducing or removing circuit elements into or from the connector circuit depending upon whether the plug is inserted into or removed from a low performance jack.

Abstract: The invention discloses an insulation displacement connector terminal having a snap type retention mechanism which securely retains the terminal within its cooperative housing. The terminal has a plurality of flexible tabs protruding from the surface of the terminal. While the terminal is being inserted into its housing, the tabs deflect to pass through the entry slot of the housing. Upon full insertion of the terminal within its housing, the tabs snap back to its original protruded position, wedging the terminal against the entry slot.

Abstract: An improved method of integrated circuit fabrication is described with a photolithographic step involving pattern decomposition. A desired final pattern is decomposed into two or more component patterns for photoresist imaging, leading to improvements in image fidelity.

Abstract: For use with a power supply having first and second circuit protection devices, a detection circuit, a method of monitoring the protection devices and a power supply employing the circuit or the method. In one embodiment, the detection circuit includes (1) a bridge circuit coupled to the first and second circuit protection devices, (2) a resistor parallel-coupled across one of the first and second circuit protection devices and (3) a sensing circuit, coupled to the bridge circuit and the resistor, that senses an imbalance in the bridge circuit and develops therefrom a failure signal when at least one of the first and second circuit protection devices becomes inoperable.

Abstract: A shielding and grounding assembly for conductive jacketed cables routed out of electronic equipment includes a conductive enclosure surrounding the equipment with circular openings to allow the cables to pass therethrough. Each circular opening is surrounded by a cylindrical flange. A flexible sheet formed of a conductive material is wrapped around the bundle of cables passing through each opening. The sheet is secured at a first end to the flange and at a second end to the bundle of cables.

Abstract: A method for reducing the level of an undesired signal, generated through a frequency converter device, by implementing a local oscillator (hereinafter "LO") leak cancellation circuit. A feedback correction loop, for a radio frequency (RF) transmitter or receiver, reduces an undesired local oscillator leak generated through a single input frequency converter device, such as a mixer, by a unique detection circuit. A unique nulling circuit is also implemented for a multiple input frequency converter device, such as a quadrature modulator.

Abstract: A service provider accesses the customer premises equipment of an end user via a broad based data network such as the Internet. Security precautions are described for insuring that alias users cannot access the customer premises equipment. Advantageously, a service provider may provide service over a very wide area without incurring excessive telecommunications services charges. Advantageously, many service providers can readily access the customer premises equipment of a single end user.

Abstract: A protector cartridge circuit arrangement which permits more robust line protection. The circuit arrangement has high-capacity and large-sized components staggered across the surface of a printed circuit board such that high-capacity components can be used in the cartridge to protect plural, adjacent lines. Such devices cannot be used in pair-at-a-time protectors because of space constraints. A preferred industrial application is the protection of communication lines.

Abstract: A buffer design for use in digital signal processing for providing parallel shifting of digital data and serial output of the shifted data. The buffer includes an input shift register for receiving and shifting an input digital word, and one or more parallel shift registers connected to the input shift register for receiving and parallel shifting the shifted digital word output by the input shift register. An output shift register is connected to the parallel shift registers for shifting and serially outputting the shifted data word. The use of parallel shift registers in the inventive buffer allows for a more efficient use of chip surface area in the buffer design, thereby increasing overall chip yield and reducing chip cost.

Abstract: An integrated transconductor circuit has an active load element and two parallel sets of transconductor stages. The active load element provides a high impedance without requiring a large area within the integrated transconductor circuit, and provides linear impedance when the active load devices are biased in the triode region of their respective characteristic curves. The multiple transconductor stages prevent saturation from reducing the dynamic range available at the output of the transconductor circuit. The parallel sets of transconductor stages are used to improve output linearity by reducing the differences between the threshold voltages of the serially-connected transconductor stages.

Abstract: Testing time of interconnections is reducted by splitting up the collection of connection paths to be tested into two or more groups. A set of test vectors, which is applied to each of the groups concurrently, is arranged to insure that the two adjacent connections that are assigned to different groups are not tested concurrently. The user can select the number of groups, and the number of connection paths within each group (which need not be the same for all groups). The disclosed algorithm increases the number of connection paths that are tested with each concatenated test vector, and consequently the number of required test vectors is reduced.