Abstract: The invention comprises curing polyamic acid solutions into polyimide solutions by adding a hydrophilic reagent to a polyamic acid solution. The hydrophilic reagent is selected to have little or no reactivity with amines or carboxylic acids, and is of the type that will react with water to form by-products that shift the equilibrium between polyamic acid as a reactant and polyimide and water as products toward the production of polyimide.

Abstract: A multichip module having high density optical and electrical interconnections between integrated circuit chips. An optically transparent substrate is positioned overlying an array of integrated circuit chips mounted on a mounting substrate. The mounting substrate may include a heat sink to remove excess heat from the integrated circuit chips. The multichip module includes integrated circuit chips having optical detectors and optical transmitters to establish optical interconnections therebetween. A hologram is positioned in the optical path between the optical transmitters and the optical detectors. A planar mirror is preferably positioned opposite the hologram to direct the optical beams. The optically transparent substrate also includes an array of electrical contact pads to establish electrical connections with corresponding electrical contact pads on the underlying integrated circuit chips.

Abstract: A microelectromechanical transducer including a plurality of strips arranged in an array and maintained in a closely spaced relation by a plurality of spacers. An electrically conductive layer on portions of the strips and spacers distributes electrical signal within the transducer to cause adjacent portions of the strips to move together. The strips and spacers may be formed from a common dielectric layer using microelectronic fabrication techniques. Two transducers may be coupled at an angle offset from parallel for two-dimensional micropositioning. A photodetector and Fresnel lens may be combined with the micropositioner using the transducers for optical scanning microscopy.

Abstract: A novel process for the selective deposition of solid-phase materials is disclosed, which process requires only the modulation of a single auxiliary gas within a suitable reactor assembly. According to the disclosed method, selective area deposition can be obtained on any desired microelectronic substrate by the creation of a vapor-phase chemical equilibrium system capable of deposition and etching the material to be deposited. The vapor-phase system is designed around a single reversible reaction wherein the material to be deposited equilibrates between that solid phase and its vapor-phase constituent species. By modulating an auxiliary gas flow into the reactor assembly, alternating deposition and etching processes can be obtained to yield an overall process which results in net overall selective and uniform deposition.

Abstract: An electroluminescent display device including a semiconductor substrate having a phosphor layer on one face thereof, and a space charge removing means in the semiconductor substrate. The space charge removing means continuously removes carriers, typically electrons, from the space charge barrier region formed during device operation, to thereby reduce space charge barrier related brightness limitations. The space charge removing means may comprise a doped region in the semiconductor substrate adjacent the phosphor layer, which is DC biased to continuously remove electrons from the space charge region. Alternatively, the doped region in the substrate adjacent the phosphor layer may inject electrons into the phosphor layer, with space charge removal being accomplished by a DC biased substrate contact.

Abstract: A method of forming a high density semiconductor structure including one or more buried metal layers. One or more metal layers may be formed on a first semiconductor substrate, with the metal layer or layers being insulated from one another and from the substrate. One or more metal layers may be formed on the surface of a second substrate which may or may not be a semiconductor substrate. The topmost metal layers, either or both of which may have an insulating layer thereon, are placed in contact and heated in an oxidizing ambient atmosphere to form a bond therebetween. One or more vias connect the buried metal layers to the active devices in the substrates. The buried metal layers may form buried power and ground planes and buried metallization patterns for device interconnection.

Abstract: The base of solder bumps is preserved by converting the under-bump metallurgy between the solder bump and contact pad into an intermetallic of the solder and the solderable component of the under-bump metallurgy prior to etching the under-bump metallurgy. The intermetallic is resistant to etchants which are used to etch the under-bump metallurgy between the contact pads. Accordingly, minimal undercutting of the solder bumps is produced, and the base size is preserved. The solder may be plated on the under-bump metallurgy over the contact pad through a patterned solder dam layer having a solder accumulation region thereon. The solder dam is preferably a thin film layer which may be accurately aligned to the underlying contact pad to confine the wetting of the molten solder during reflow. Misalignment between the solder bump and contact pad is thereby reduced. The solder bumps so formed include an intermetallic layer which extends beyond the bump to form a lip around the base of the bump.

Abstract: An apparatus and method for producing a more uniform processing rate in a plasma processing magnetron. A pair of opposing spaced apart plasma barriers, preferably made of a non-magnetic material, are positioned on a substrate holder, such as an electrode for generating an electric field in the magnetron. The inner surfaces of the barriers are oriented transverse to the magnetic field of the magnetron and define a narrower spacing therebetween adjacent a predetermined portion of a substrate surface. The barriers may preferably be elongate rectangular bodies canted from parallel to each other to define a narrower spacing therebetween so that a more uniform processing rate is obtained across the entire substrate surface. The inherent non-uniformity of the magnetron may be detected by observing visual color bands appearing across a thin film on the substrate surface as it is being plasma processed.

Abstract: A thermally activated method of depositing a metal on a localized microscopic portion of a substrate, that can be carried out at relatively low process temperatures, and that is particularly useful for depositing metals in an amount and purity sufficient for electrical conductivity on substrates containing microelectronic circuits and devices or their respective precursors.

Abstract: A load lock removes particulate contamination during microelectronic manufacturing. The load lock may have a single door or two doors, or a single door and a funnel valve. A passageway is defined through the load lock when the door or doors, or the funnel valve, are opened. The particulate contamination is removed from the load lock by providing a laminar flow of gas through the passageway. The source for generating the laminar flow may be external to the load lock or internal to the load lock.

Abstract: A microelectronic field emitter includes a horizontal emitter electrode and a vertical extraction electrode on the horizontal face of a substrate. An end of the horizontal emitter electrode and the end of the vertical extraction electrode form an electron emission gap therebetween. The emitter electrode may be formed on an insulating layer which is formed on a substrate. The insulating layer also includes a sidewall, and the extraction electrode may be formed on the sidewall with one thereof extending adjacent the emitter electrode to form an electron emission gap therebetween. A vertical collector electrode may also be formed on the sidewall of a second insulating layer spaced from the first sidewall. The field emitter may be cylindrical, planar, or of various other shapes. multiple emitters, extractors and collectors may be stacked on one another.

Abstract: A method of fabricating electron field emitters is disclosed. In this method, a semiconductor substrate is provided with at least one set of alternating conductor and insulator layers formed thereon. An etch is then performed through the at least one set of alternating conductor and insulator layers to form an aperture. An etch resistant layer is formed on the area exposed from the previous etch at the base of the aperture. An etch is performed forming the electron emitter in the one face aligned to the exposed area. The emitter is thereby self-aligned to the overlying conductor and insulator layers. The conductor and insulator layers need not be aligned to an underlying emitter.

Abstract: A socket for grippingly engaging the polygonal portion of a threaded fastener having deteriorated head surfaces and for transferring a moment from a tool to the fastener to turn the fastener. The socket includes a socket body, a receptacle for mating with a drive end of tool, a polygonal receptacle for receiving the polygonal portion of a fastener, and at least one set screw mounted in the socket body for urging a fastener received within the polygonal receptacle against a wall segment of the polygonal receptacle. A wrench for turning the socket is also disclosed.

Abstract: An alternating cyclic (A.C.) method for selectively depositing materials, on the surface of a substrate without depositing the material on an adjacent mask layer. A gas of a reducible compound of the material and a reducing gas, preferably hydrogen, are simultaneously flowed through a reaction chamber to deposit the material on the substrate surface and to a lesser extent on the mask layer. Then, the flow of reducing gas is interrupted to cause the reducible compound gas to etch the material which forms on the mask layer in a disproportionation reaction. The deposition and etch steps are repeated in an alternating cyclic fashion until the requisite thickness is deposited. The process may take place in a single reaction chamber, using only the reducible compound gas and pulsed flow of the reducing gas.

Abstract: Ceramic parts may be bonded by forming bonding layers of silicon dioxide, silicon, metal or metal oxide on the parts, placing the bonding layers adjacent one another and heating in an oxidizing ambient atmosphere to form an oxide bond therebetween. Pressure may be applied between the ceramic parts to aid in bonding. A reliable bonded ceramic structure is thereby provided.

Abstract: A method for anisotropically hardening a protective coating to provides a well defined edge thereon for forming features which may be smaller than the resolution limit of the exposure equipment, for the purpose of integrated circuit manufacture. The method includes the steps of forming a non-planar coating on a substrate with a photoresist material having a sensitivity ot incident flux that varies as a function of the angle of the incidence of the flux upon the coating. The coating is anisotropically hardened by exposing it to flux to which it has a relatively high sensitivity so that portions for which the flux is incident at one angle are more hardened than those portions where the flux is incident at a different angle. Narrow trenches or studs may thereby be formed.

Abstract: The internal grain boundaries and intergranular spaces of polycrystalline semiconductor material may be passivated with an amorphous material, to substantially eliminate the dangling bonds at the internal grain boundaries. The passivated polycrystalline material of the present invention exhibits a lower electrically active defect density at the grain boundaries and intergranular space compared to unpassivated polycrystalline material. Moreover, large classes of amorphous passivating materials may be used for each known semiconductor material so that the passivating process may be readily adapted to existing process parameters and other device constraints. Passivated polycrystalline material may be employed to form the well or low energy bandgap layer of a quantum well device or superlattice, while still maintaining the required tunneling effect.

Abstract: A method and apparatus for magnetron gas discharge processing of substrates using a remote plasma source provides a uniform magnetic field (B) created across the surface of a substrate in an evacuable chamber. An electric field (E) is created perpendicular to the substrate by an electrically powered cathode located beneath the substrate. The magnetic and electric fields interact with the plasma to create an E.times.B electron drift region adjacent to the surface of a substrate. A remote plasma source is provided and oriented so that the plasma stream from the remote source is coupled to the E.times.B region adjacent to the substrate surface parallel to the magnetic field with minimal movement of the plasma stream perpendicular to the magnetic field to thereby provide a high density plasma stream into the E.times.B drift region.

Abstract: A high precision weighted random pattern generation system generates any desired probability of individual bits within a weighted random bit pattern. The system includes a circular memory having a series of weighting factors stored therein, with each weighting factor representing the desired probability of a bit in the weighted random pattern being binary ONE. The random bits from a random number generator and a weighting factor are combined to form a single weighted random bit. The random bits and weighting factor are combined in a series of interconnected multiplexor gates. Each multiplexor gate has two data inputs, one being a bit from the weighting factor, the other being the output of the preceding multiplexor gate. The random number bit controls the output of the multiplexor. For example, when the control input (random bit) is high, the multiplexor output is the weighting factor bit. When the control input (random bit) is low, the multiplexor output is the output of the preceding multiplexor.

Abstract: A Maximum Areal Density Recessed Oxide Isolation (MADROX) process for forming semiconductor devices, in which forms an insulating layer is formed on a monocrystalline silicon substrate and a patterned polycrystalline silicon-containing layer is formed on the insulating layer. The substrate is then subjected to a low temperature plasma assisted oxidation to form recessed oxide isolation areas in the exposed regions of the substrate, with minimal encroachment under the patterned polycrystalline silicon-containing layer. The patterned polycrystalline silicon-containing layer acts as a mask, without itself being oxidized. Low temperature recessed oxide isolation regions may thereby be formed, without "bird's beak" formation. Maximum Areal Density Bipolar and Field Effect Transistor (MADFET) devices may be formed, using the patterned polycrystalline silicon-containing layer as a device contact if desired.