Patents Assigned to MCNC
  • Patent number: 5037775
    Abstract: An alternating cyclic (A.C.) method for selectively depositing single element semiconductor materials, on the surface of a substrate without depositing the material on an adjacent mask layer. A gas of a reducible compound of the material and a reducing gas, preferably hydrogen, are simultaneously flowed through a reaction chamber to deposit the material on the substrate surface and to a lesser extent on the mask layer. Then, the flow of reducing gas is interrupted to cause the reducible compound gas to etch the material which forms on the mask layer in a disproportionation reaction. The deposition and etch steps are repeated in an alternating cyclic fashion until the requisite thickness is deposited. The process may take place in a single reaction chamber, using only the reducible compound gas and pulsed flow of the reducing gas.
    Type: Grant
    Filed: September 5, 1989
    Date of Patent: August 6, 1991
    Assignee: MCNC
    Inventor: Arnold Reisman
  • Patent number: 5025304
    Abstract: A method of forming a high density semiconductor structure including one or more buried metal layers. One or more metal layers may be formed on a first semiconductor substrate, with the metal layer or layers being insulated from one another and from the substrate. One or more metal layers may be formed on the surface of a second substrate which may or may not be a semiconductor substrate. The topmost metal layers, either or both of which may have an insulating layer thereon, are placed in contact and heated in an oxidizing ambient atmosphere to form a bond therebetween. One or more vias connect the buried metal layers to the active devices in the substrates. The buried metal layers may form buried power and ground planes and buried metallization patterns for device interconnection.
    Type: Grant
    Filed: November 29, 1988
    Date of Patent: June 18, 1991
    Assignees: MCNC, Northern Telecom Limited
    Inventors: Arnold Reisman, Iwona Turlik
  • Patent number: 5009360
    Abstract: A method and resulting structure is disclosed in which a metal-to-metal bond is formed by heating the surfaces to be bonded in an oxidizing ambient atmosphere until the desired bond is achieved. Heating takes place at 700.degree. C.-1200.degree. C. and bonding may be enhanced by applying pressure between the surfaces while heating.
    Type: Grant
    Filed: February 27, 1990
    Date of Patent: April 23, 1991
    Assignee: MCNC
    Inventors: Arnold Reisman, Deepak Nayak, Iwona Turlik
  • Patent number: 5001082
    Abstract: A self-aligned salicide process produces small dimensioned semiconductor devices, for example metal oxide semiconductor (MOS) devices. An electrode is formed on the face of a semiconductor substrate, the electrode having a top and a sidewall and an insulating coating on the sidewall. Then a silicon layer and a refractory metal layer are formed on the face, top and sidewall, with one of the layers being continuous, and the other layer having a break on the sidewall. In a preferred embodiment the silicon layer is directionally applied, to form thick portions on the face and top and thin portion on the sidewall. The thin portion on the sidewall is removed and a metal layer is uniformly deposited. The substrate is heated to convert at least part of the silicon and metal layers to silicide. The silicide layer on the face is planar and does not consume the substrate at the face, allowing shallow source and drain regions to be formed.
    Type: Grant
    Filed: April 12, 1989
    Date of Patent: March 19, 1991
    Assignee: MCNC
    Inventor: Scott H. Goodwin-Johansson
  • Patent number: 5001594
    Abstract: An electrostatic handling device for a wafer having a pair of faces, includes a dielectric region having a top face which is adapted to accept one of the pair of wafer faces thereagainst. Conductors are positioned in the dielectric region. The conductors are arranged in the dielectric region to generate electrostatic force between the conductors and the wafer to hold the wafer against the top face of the dielectric region. The conductors are further arranged in the dielectric region to generate substantially no net electrostatic force at the opposite one of the pair of wafer faces to thereby reduce electrostatic force interference thereat.
    Type: Grant
    Filed: September 6, 1989
    Date of Patent: March 19, 1991
    Assignee: MCNC
    Inventor: Stephen M. Bobbio
  • Patent number: 4968582
    Abstract: The invention is a modified organic photoresist which is resistant to etching in oxygen-containing plasmas and therefore particularly useful for masking and etching organic polymer materials in VLSI and advanced packaging applications. The invention comprises adding a phosphorous-containing compound to a conventional photoresist. The phosphorous-containing compound is of a type and in an amount effective to substantially prevent etching of the modified photoresist in an oxygen-containing plasma without substantially adversely affecting the photosensitivity of the photoresist or the elasticity or the adhesion of the etch resistant film formed during oxygen-containing plasma exposure to an underlying material to be patterned and etched.
    Type: Grant
    Filed: June 28, 1988
    Date of Patent: November 6, 1990
    Assignee: MCNC and University of NC at Charlotte
    Inventors: Farid M. Tranjan, Thomas D. DuBois, Rudolf G. Frieser, Stephen M. Bobbio, Susan K. S. Jones