Abstract: This invention is directed to a novel process for the preparation of a silicon wafer comprising a surface having an epitaxial layer deposited thereon. In one embodiment, an epitaxial layer is deposited onto a surface of a silicon wafer. The wafer is also heated to a temperature of at least about 1175° C. This heat treatment begins either during or after the epitaxial deposition. Following the heat treatment, the heated wafer is cooled for a period of time at a rate of at least about 10° C./sec while (a) the temperature of the wafer is greater than about 1000° C., and (b) the wafer is not in contact with a susceptor. In this process, the epitaxial deposition, heating, and cooling are conducted in the same reactor chamber.

Abstract: A crystal puller and method for growing monocrystalline silicon ingots includes first and second electrical resistance heaters in the crystal puller in longitudinal, closely spaced relationship with each other to radiate heat toward the ingot as the ingot is pulled upward within the housing. In one embodiment, the first heater is powered when the ingot is pulled upward to a first axial position above the surface of the molten silicon and the second heater is powered when the ingot is pulled upward to a second axial position above the first axial position. In another embodiment the first and second heaters are powered until the ingot is separated from the molten silicon and then the heating power output of the first and second heaters is reduced to substantially increase the cooling rate at which the ingot is cooled. An adapter mounting the heaters may also be provided for adapting existing crystal pullers to incorporate the heaters.

Abstract: A process for heat-treating a single crystal silicon wafer to influence the precipitation behavior of oxygen in the wafer in a subsequent thermal processing step is disclosed. The wafer has a front surface, a back surface, and a central plane between the front and back surfaces. In the process, the wafer is subjected to a heat-treatment to form crystal lattice vacancies, the vacancies being formed in the bulk of the silicon. The heat-treated wafer is then oxidized by heating in the presence of an oxygen-containing atmosphere in order to establish a vacancy concentration profile within the wafer. The oxidized wafer is then cooled from the temperature of said oxidizing heat treatment at a rate which allows some, but not all, of the crystal lattice vacancies to diffuse to the front surface to produce a wafer having a vacancy concentration profile in which the peak density is at or near the central plane with the concentration generally decreasing in the direction of the front surface of the wafer.

Abstract: A process for controlling the amount of insoluble gas trapped by a silicon melt is disclosed. After a crucible is charged with polycrystalline silicon, a gas comprising at least about 10% of a gas having a high solubility in silicon is used as the purging gas for a period of time during melting. After the polycrystalline silicon charge has completely melted, the purge gas may be switched to a conventional argon purge. Utilizing a purge gas highly soluble in silicon for a period of time during the melting process reduces the amount of insoluble gases trapped in the charge and, hence, the amount of insoluble gases grown into the crystal that form defects on sliced wafers.

Abstract: A process for growing a single crystal silicon ingot having an axially symmetric region substantially free of agglomerated intrinsic point defects. The ingot is grown generally in accordance with the Czochralski method; however, the manner by which the ingot is cooled from the temperature of solidification to a temperature which is in excess of about 900° C. is controlled to allow for the diffusion of intrinsic point defects, such that agglomerated defects do not form in this axially symmetric region. Accordingly, the ratio v/G0 is allowed to vary axially within this region, due to changes in v or G0, between a minimum and maximum value by at least 5%.

Abstract: A modified susceptor for use in an epitaxial deposition apparatus and process is disclosed. The modified susceptor has an inner annular ledge capable of supporting a semiconductor wafer and has a plurality of holes in the surface to allow cleaning gas utilized during an epitaxial deposition process to pass through the susceptor and contact substantially the entire back surface of the semiconductor wafer and remove a native oxide layer. Also, the plurality of holes on the susceptor allows dopant atoms out-diffused from the back surface during the epitaxial deposition process to be carried away from the front surface in an inert gas stream and into the exhaust such that autodoping of the front surface is minimized.

Abstract: A method for calibrating a semiconductor wafer drying apparatus including a heater and a vessel containing a solvent and capable of receiving semiconductor wafers comprises selecting a test heater temperature and a test processing time. A first set of wafers is placed in the vessel and the heater is operated at the test heater temperature so that a solvent vapor cloud is created in the vessel. The first set of wafers is monitored for substantial envelopment by the vapor cloud during the test processing time. Based on the monitoring step, at least one of the test heater temperature and the test processing time is adjusted to establish at least one operating parameter of an operating heater temperature parameter and an operating processing time parameter for processing successive sets of wafers so as to promote substantial vapor cloud envelopment of each set of wafers dried in the drying apparatus.

Abstract: Epitaxial wafers comprising a single crystal silicon substrate comprising agglomerated vacancy defects and having an axially symmetric region in which silicon self-interstitials are the predominant intrinsic point defect and which is substantially free of agglomerated defects, and an epitaxial layer which is deposited upon a surface of the substrate and which is substantially free of grown-in defects caused by the presence of agglomerated intrinsic point defects on the substrate surface upon which the epitaxial layer is deposited.

Abstract: A method for revealing agglomerated intrinsic point defect. The method comprising coating a sample with a metal capable of decorating agglomerated intrinsic point defects, heat-treating the coated sample to decorate any agglomerated intrinsic point defects, cooling the sample, etching the surface of the cooled sample without delineating the decorated agglomerated intrinsic point defects and etching the etched surface with a delineating etchant to reveal the decorated intrinsic point defects.

Abstract: A process for heat-treating a single crystal silicon wafer to influence the precipitation behavior of oxygen in the wafer in a subsequent thermal processing step. The wafer has a front surface, a back surface, and a central plane between the front and back surfaces. In the process, the wafer is subjected to a heat-treatment to form crystal lattice vacancies, the vacancies being formed in the bulk of the silicon. The wafer is then cooled from the temperature of said heat treatment at a rate which allows some, but not all, of the crystal lattice vacancies to diffuse to the front surface to produce a wafer having a vacancy concentration profile in which the peak density is at or near the central plane with the concentration generally decreasing in the direction of the front surface of the wafer.

Abstract: The present invention relates to a process for growing a single crystal silicon ingot, which contains an axially symmetric region having a predominant intrinsic point defect and which is substantially free of agglomerated intrinsic point defects in that region. The process comprising cooling the ingot from the temperature of solidification to a temperature of less than 800° C. and, as part of said cooling step, quench cooling a region of the constant diameter portion of the ingot having a predominant intrinsic point defect through the temperature of nucleation for the agglomerated intrinsic point defects for the intrinsic point defects which predominate in the region.

Abstract: A process for heat treating a silicon wafer to dissolve B-type agglomerated interstitial defects present therein. The process includes heating the silicon wafer at a temperature for a time sufficient to dissolve B-defects, the wafer being heated to said temperature at a rate sufficient to prevent B-defects from becoming stabilized such that these defects are rendered incapable of being dissolved.

Abstract: The present invention is directed to a single crystal Czochralski-type silicon wafer, and a process for the preparation thereof, which has a non-uniform distribution of crystal lattice vacancies therein, the peak concentration being present in the wafer bulk between an imaginary central plane and a surface of the wafer, such that, upon being subjected to the heat treatment cycles of essentially any arbitrary electronic device manufacturing process, the wafer forms oxygen precipitates in the wafer bulk and a thin or shallow precipitate-free zone near the wafer surface.

Abstract: The present invention relates to an epitaxial wafer comprising single crystal silicon substrate and an epitaxial layer deposited thereon. The substrate comprises an axially symmetric region which is free of agglomerated intrinsic point defects and wherein silicon self-interstitials are the predominant intrinsic point defect in the axially symmetric region. The present invention further relates to a process for producing such an epitaxial wafer.

Abstract: An apparatus for slicing semiconductor wafers from a single-crystal ingot includes a web of wire for slicing the ingot into wafers and a frame having a head for supporting the ingot during slicing. The apparatus further includes a controller and a temperature sensor disposed in the head and operable to send a signal to the controller indicating head temperature. The controller is operable to control temperature of a fluid directed to the head in response to the signal thereby to control the head temperature. Methods of slicing wafers are also disclosed.

Abstract: A method for estimating the likely waviness of a wafer after polishing based upon an accurate measurement of the waviness of the wafer in an as-cut condition, before polishing. The method measures the thickness profile of an upper and lower wafer surface to construct a median profile of the wafer in the direction of wiresaw cutting. The median surface is then passed through an appropriate Gaussian filter, such that the warp of the resulting profile estimates whether the wafer will exhibit unacceptable waviness in a post-polished stage.

Abstract: A method for estimating the likely waviness of a wafer after polishing based upon an accurate measurement of the waviness of the wafer in an as-cut condition, before polishing. The method measures the thickness profile of an upper and lower wafer surface to construct a median profile of the wafer in the direction of wiresaw cutting. The median surface is then passed through an appropriate Gaussian filter, such that the warp of the resulting profile estimates whether the wafer will exhibit unacceptable waviness in a post-polished stage.

Abstract: This invention is directed to a novel process for the preparation of a silicon wafer comprising a surface having an epitaxial layer deposited thereon. In one embodiment, an epitaxial layer is deposited onto a surface of a silicon wafer. The wafer is also heated to a temperature of at least about 1175° C. This heat treatment begins either during or after the epitaxial deposition. Following the heat treatment, the heated wafer is cooled for a period of time at a rate of at least about 10° C./sec while (a) the temperature of the wafer is greater than about 1000° C., and (b) the wafer is not in contact with a susceptor. In this process, the epitaxial deposition, heating, and cooling are conducted in the same reactor chamber.

Abstract: A granular semiconductor material transport system capable of continuous, non-contaminating transfer of granular semiconductor material from a large source vessel to a smaller and more manageable target vessel. Movement of the granular material is induced by flowing transfer fluid. The system includes a source vessel, a feed tube, a process vessel, a target vessel and a vacuum source, or mover. The source vessel contains a bulk supply of granular material to be transported. A feed tube received within the source vessel transfers the granular material entrained in a transfer fluid from the source vessel to the process vessel. The process vessel separates the granular material from any dust particles and deposits the granular material in the more manageable target vessel. The vacuum source sealably connects to the process vessel to evacuate the process vessel to set the granular polysilicon in motion within the system.

Abstract: The present invention relates to a single crystal silicon, in wafer and ingot form, which contains an axially symmetric region which is free of agglomerated intrinsic point defects. The region extends from a circumferential edge of the wafer or constant diameter region of an ingot, axially inwardly toward a central axis such that the entire wafer, a constant diameter portion of the ingot, or an annular-shaped portion of wafer or ingot is free of agglomerated intrinsic point defects. The present invention further relates to these axially symmetric regions wherein silicon self-interstitials are the predominant intrinsic point detect.