Patents Assigned to MEMC Electronic Materials, Inc.
  • Low defect density, ideal oxygen precipitating silicon
    Patent number: 7229693
    Abstract: The present invention is directed to a silicon wafer which, during the heat treatment cycles of essentially any arbitrary electronic device manufacturing process, may form an ideal, non-uniform depth distribution of oxygen precipitates and may additionally contain an axially symmetric region which is substantially free of agglomerated intrinsic point defects.
    Type: Grant
    Filed: February 16, 2005
    Date of Patent: June 12, 2007
    Assignee: MEMC Electronic Materials, Inc.
    Inventors: Robert J. Falster, Joseph C. Holzer, Marco Cornara, Daniela Gambaro, Massimiliano Olmo, Steve A. Markgraf, Paolo Mutti, Seamus A. McQuaid, Bayard K. Johnson
  • Controlling melt-solid interface shape of a growing silicon crystal using a variable magnetic field
    Patent number: 7223304
    Abstract: Methods and system for controlling crystal growth in a Czochralski crystal growing apparatus. A magnetic field is applied within the crystal growing apparatus and varied to control a shape of the melt-solid interface where the ingot is being pulled from the melt. The shape of the melt-solid interface is formed to a desired shape in response to the varied magnetic field as a function of a length of the ingot.
    Type: Grant
    Filed: December 30, 2004
    Date of Patent: May 29, 2007
    Assignee: MEMC Electronic Materials, Inc.
    Inventor: Zheng Lu
  • STRAINED SILICON ON INSULATOR (SSOI) WITH LAYER TRANSFER FROM OXIDIZED DONOR
    Publication number: 20070117350
    Abstract: This invention generally relates to a strained silicon on insulator (SSOI) structure, and to a process for making the same. The process includes forming a thin SiO2 layer on a strained silicon layer after it is formed on the donor wafer and before bonding to the handle wafer.
    Type: Application
    Filed: December 27, 2006
    Publication date: May 24, 2007
    Applicant: MEMC ELECTRONIC MATERIALS, INC.
    Inventors: Michael Seacrist, Lu Fei
  • Low defect density silicon having a vacancy-dominated core substantially free of oxidation induced stacking faults
    Patent number: 7217320
    Abstract: The present invention relates to a process for preparing a single crystal silicon ingot, as well as to the ingot or wafer resulting therefrom. The process comprises controlling (i) a growth velocity, v, (ii) an average axial temperature gradient, G0, and (iii) a cooling rate of the crystal from solidification to about 750° C., in order to cause the formation of a segment having a first axially symmetric region extending radially inward from the lateral surface of the ingot wherein silicon self-interstitials are the predominant intrinsic point defect, and a second axially symmetric region extending radially inward from the first and toward the central axis of the ingot.
    Type: Grant
    Filed: December 7, 2004
    Date of Patent: May 15, 2007
    Assignee: MEMC Electronics Materials, Inc.
    Inventors: Chang Bum Kim, Steven L. Kimbel, Jeffrey L. Libbert, Mohsen Banan
  • Arsenic and phosphorus doped silicon wafer substrates having intrinsic gettering
    Publication number: 20070105279
    Abstract: A process for the preparation of low resistivity arsensic or phosphorous doped (N+/N++) silicon wafers which, during the heat treatment cycles of essentially any arbitrary electronic device manufacturing process, reliably form oxygen precipitates.
    Type: Application
    Filed: November 9, 2005
    Publication date: May 10, 2007
    Applicant: MEMC Electronic Materials, Inc.
    Inventors: Robert Falster, Vladimir Voronkov, Gabriella Borionetti
  • Process for making silicon wafers with stabilized oxygen precipitate nucleation centers
    Patent number: 7201800
    Abstract: A process for imparting controlled oxygen precipitation behavior to a single crystal silicon wafer. Specifically, prior to formation of the oxygen precipitates, the wafer bulk comprises dopant stabilized oxygen precipitate nucleation centers. The dopant is selected from a group consisting of nitrogen and carbon, and the concentration of the dopant is sufficient to allow the oxygen precipitate nucleation centers to withstand thermal processing, such as an epitaxial deposition process, while maintaining the ability to dissolve any grown-in nucleation centers.
    Type: Grant
    Filed: October 12, 2004
    Date of Patent: April 10, 2007
    Assignee: MEMC Electronic Materials, Inc.
    Inventors: Luciano Mule'Stagno, Jeffrey L. Libbert, Richard J. Phillips, Milind Kulkarni, Mohsen Banan, Stephen J. Brunkhorst
  • Apparatus for preparation of silicon crystals with reduced metal content
    Publication number: 20070074653
    Abstract: A crystal pulling apparatus for producing a silicon crystal ingot having a reduced amount of metal contamination. The apparatus includes a growth chamber and a component disposed within the growth chamber having a protective layer of silicon nitride for preventing metal contamination of the crystal.
    Type: Application
    Filed: September 30, 2005
    Publication date: April 5, 2007
    Applicant: MEMC Electronic Materials, Inc.
    Inventors: Hariprasad Sreedharamurthy, John Holder, Mohsen Banan
  • METHOD FOR THE MANUFACTURE OF A STRAINED SILICON-ON-INSULATOR STRUCTURE
    Publication number: 20070045738
    Abstract: The present invention is directed to a strained silicon on insulator (SSOI) structure having improved surface characteristics, such as reduced roughness, low concentration of LPDs, and lower contamination, and a method for making such a structure.
    Type: Application
    Filed: August 2, 2006
    Publication date: March 1, 2007
    Applicant: MEMC ELECTRONIC MATERIALS, INC.
    Inventors: Andrew Jones, Lu Fei
  • Nitrogen-doped silicon substantially free of oxidation induced stacking faults
    Patent number: 7182809
    Abstract: A single crystal silicon, ingot or wafer form, which contains an axially symmetric region in which vacancies are the predominant intrinsic point defect, is substantially free of oxidation induced stacking faults and is nitrogen doped to stabilize oxygen precipitation nuclei therein, and a process for the preparation thereof.
    Type: Grant
    Filed: August 30, 2001
    Date of Patent: February 27, 2007
    Assignee: MEMC Electronic Materials, Inc.
    Inventors: Hiroyo Haga, Takaaki Aoshima, Mohsen Banan
  • STRAINED SILICON ON INSULATOR (SSOI) STRUCTURE WITH IMPROVED CRYSTALLINITY IN THE STRAINED SILICON LAYER
    Publication number: 20070042566
    Abstract: This invention generally relates to strained silicon on insulator (SSOI) structure, and to a process for making the same. The process includes a high temperature thermal anneal of a SSOI structure to improve the crystallinity of the strained silicon layer, while maintaining the strain present therein.
    Type: Application
    Filed: August 1, 2006
    Publication date: February 22, 2007
    Applicant: MEMC ELECTRONIC MATERIALS, INC.
    Inventors: Michael Seacrist, Lu Fei
  • High resistivity silicon structure and a process for the preparation thereof
    Publication number: 20060263967
    Abstract: The present invention generally relates to a high resistivity CZ silicon wafer, or a high resistivity silicon structure derived therefrom, and a process for the preparation thereof. In particular, the high resistivity silicon structure comprises a large diameter CZ silicon wafer as the substrate thereof, wherein the resistivity of the substrate wafer is decoupled from the concentration of acceptor atoms (e.g., boron) therein, the resistivity of the substrate being substantially greater than the resistivity as calculated based on the concentration of said acceptor atoms therein.
    Type: Application
    Filed: May 18, 2006
    Publication date: November 23, 2006
    Applicant: MEMC Electronic Materials, Inc.
    Inventors: Robert Falster, Vladimir Voronkov, Galina Voronkova, Anna Batunina
  • Method for controlling of thermal donor formation in high resistivity CZ silicon
    Patent number: 7135351
    Abstract: The present invention is directed to a single crystal Czochralski-type silicon wafer, and a process for the preparation thereof, which has at least a surface layer of high resistivity, the layer having an interstitial oxygen content which renders it incapable of forming thermal donors in an amount sufficient to affect resistivity upon being subjected to a conventional semiconductor device manufacturing process. The present invention further directed to a silicon on insulator structure derived from such a wafer.
    Type: Grant
    Filed: March 17, 2005
    Date of Patent: November 14, 2006
    Assignee: MEMC Electronic Materials, Inc.
    Inventors: Martin J. Binns, Robert J. Falster, Jeffrey L. Libbert
  • Single crystal silicon ingot having a high arsenic concentration
    Patent number: 7132091
    Abstract: A single crystal silicon ingot having a constant diameter portion that contains arsenic dopant atoms at a concentration which results in the silicon having a resistivity that is less than about 0.003 ?·cm.
    Type: Grant
    Filed: September 27, 2002
    Date of Patent: November 7, 2006
    Assignee: MEMC Electronic Materials, Inc.
    Inventors: Milind Kulkarni, Mohsen Banan, Christopher V. Luers
  • Process for preparing single crystal silicon using crucible rotation to control temperature gradient
    Patent number: 7125450
    Abstract: The present invention is directed to a process for preparing single crystal silicon, in ingot or wafer form, wherein crucible rotation is utilized to control the average axial temperature gradient in the crystal, G0, as a function of radius (i.e., G0(r)), particularly at or near the central axis. Additionally, crucible rotation modulation is utilized to obtain an axially uniform oxygen content therein.
    Type: Grant
    Filed: October 31, 2003
    Date of Patent: October 24, 2006
    Assignee: MEMC Electronic Materials, Inc.
    Inventors: Zheng Lu, Steven L. Kimbel, Ying Tao
  • Modified susceptor for barrel reactor
    Publication number: 20060231035
    Abstract: A susceptor for supporting wafers during an chemical vapor deposition process. The susceptor has recesses and orifices disposed in the recesses extending to a central passage of the susceptor. The susceptor has exhaust openings disposed in the top of the susceptor to allow gas from the central passage of the susceptor to exit out the openings. A baffle plate covers the exhaust openings and a vertical space is created between the baffle plate and the top of the susceptor to allow gas to exit from the central passage to outside the susceptor. The bottom of the susceptor also has exhaust openings disposed therein. These openings allow gas from the central passage to exit the susceptor.
    Type: Application
    Filed: April 15, 2005
    Publication date: October 19, 2006
    Applicant: MEMC Electronic Materials, Inc.
    Inventor: Lance Hellwig
  • Method for the production of low defect density silicon
    Patent number: 7105050
    Abstract: A process for the preparation of a silicon single ingot in accordance with the Czochralski method. The process for growing the single crystal silicon ingot comprises controlling (i) a growth velocity, v, (ii) an average axial temperature gradient, G0, during the growth of a constant diameter portion of the crystal over a temperature range from solidification to a temperature of no less than about 1325° C. to initially produce in the constant diameter portion of the ingot a series of predominant intrinsic point defects including vacancy dominated regions and silicon self interstitial dominated regions, alternating along the axis, and cooling the regions from the temperature of solidification at a rate which allows silicon self-interstitial atoms to diffuse radially to the lateral surface and to diffuse axially to vacancy dominated regions to reduce the concentration intrinsic point defects in each region.
    Type: Grant
    Filed: February 16, 2005
    Date of Patent: September 12, 2006
    Assignee: MEMC Electronic Materials, Inc.
    Inventors: Vladimir V. Voronkov, Robert J. Falster, Mohsen Banan
  • Single crystal silicon wafer having an epitaxial layer substantially free from grown-in defects
    Patent number: 7097718
    Abstract: Epitaxial wafers comprising a single crystal silicon substrate comprising agglomerated vacancy defects and having an axially symmetric region in which silicon self-interstitials are the predominant intrinsic point defect and which is substantially free of agglomerated defects, and an epitaxial layer which is deposited upon a surface of the substrate and which is substantially free of grown-in defects caused by the presence of agglomerated intrinsic point defects on the substrate surface upon which the epitaxial layer is deposited.
    Type: Grant
    Filed: May 20, 2003
    Date of Patent: August 29, 2006
    Assignee: MEMC Electronic Materials, Inc.
    Inventors: Luciano Mule'Stagno, Lu Fei, Joseph C. Holzer, Harold W. Korb, Robert J. Falster
  • Process for metallic contamination reduction in silicon wafers
    Patent number: 7084048
    Abstract: A process for removing a contaminant selected from among copper, nickel, and a combination thereof from a silicon wafer having a surface and an interior. The process comprises cooling the silicon wafer in a controlled atmosphere from a temperature at or above an oxidation initiation temperature and initiating a flow of an oxygen-containing atmosphere at said oxidation initiation temperature to create an oxidizing ambient around the silicon wafer surface to form an oxide layer on the silicon wafer surface and a strain layer at an interface between the oxide layer and the silicon wafer interior. The cooling of the wafer is also controlled to permit diffusion of atoms of the contaminant from the silicon wafer interior to the strain layer. Then the silicon wafer is then cleaned to remove the oxide layer and the strain layer, thereby removing said contaminant having diffused to the strain layer.
    Type: Grant
    Filed: May 7, 2004
    Date of Patent: August 1, 2006
    Assignee: MEMC Electronic Materials, Inc.
    Inventors: Larry W. Shive, Brian L. Gilmore
  • Electromagnetic pumping of liquid silicon in a crystal growing process
    Publication number: 20060144320
    Abstract: A method and system for use in combination with a crystal growing apparatus for growing a monocrystalline ingot according to a Czochralski process. The crystal growing apparatus has a heated crucible including a semiconductor melt from which the ingot is pulled. The ingot is grown on a seed crystal pulled from the melt. A time varying external magnetic field is imposed on the melt during pulling of the ingot. The magnetic field is selectively adjusted to produce pumping forces in the melt to control a melt flow velocity while the ingot is being pulled from the melt.
    Type: Application
    Filed: December 30, 2004
    Publication date: July 6, 2006
    Applicant: MEMC Electronic Materials, Inc.
    Inventor: Harold Korb
  • Controlling melt-solid interface shape of a growing silicon crystal using a variable magnetic field
    Publication number: 20060144321
    Abstract: Methods and system for controlling crystal growth in a Czochralski crystal growing apparatus. A magnetic field is applied within the crystal growing apparatus and varied to control a shape of the melt-solid interface where the ingot is being pulled from the melt. The shape of the melt-solid interface is formed to a desired shape in response to the varied magnetic field as a function of a length of the ingot.
    Type: Application
    Filed: December 30, 2004
    Publication date: July 6, 2006
    Applicant: MEMC Electronic Materials, Inc.
    Inventor: Zheng Lu