Patents Assigned to MEMC Electronic Materials, Inc.
  • Publication number: 20050170610
    Abstract: The present invention is directed to a silicon wafer which, during the heat treatment cycles of essentially any arbitrary electronic device manufacturing process, may form an ideal, non-uniform depth distribution of oxygen precipitates and may additionally contain an axially symmetric region which is substantially free of agglomerated intrinsic point defects.
    Type: Application
    Filed: February 16, 2005
    Publication date: August 4, 2005
    Applicant: MEMC Electronic Materials, Inc.
    Inventors: Robert Falster, Joseph Holzer, Marco Cornara, Daniela Gambaro, Massimiliano Olmo, Steve Markgraf, Paolo Mutti, Seamus McQuaid, Bayard Johnson
  • Publication number: 20050160967
    Abstract: A process for producing a single crystal silicon wafer comprising a front surface, a back surface, a lateral surface joining the front and back surfaces, a central axis perpendicular to the front and back surfaces, and a segment which is axially symmetric about the central axis extending substantially from the front surface to the back surface in which crystal lattice vacancies are the predominant intrinsic point defect, the segment having a radial width of at least about 25% of the radius and containing agglomerated vacancy defects and a residual concentration of crystal lattice vacancies wherein (i) the agglomerated vacancy defects have a radius of less than about 70 nm and (ii) the residual concentration of crystal lattice vacancy intrinsic point defects is less than the threshold concentration at which uncontrolled oxygen precipitation occurs upon subjecting the wafer to an oxygen precipitation heat treatment.
    Type: Application
    Filed: March 24, 2005
    Publication date: July 28, 2005
    Applicant: MEMC Electronic Materials, Inc.
    Inventors: Robert Falster, Vladimir Voronkov, Paolo Mutti, Francesco Bonoli
  • Publication number: 20050158969
    Abstract: The present invention is directed to a single crystal Czochralski-type silicon wafer, and a process for the preparation thereof, which has at least a surface layer of high resistivity, the layer having an interstitial oxygen content which renders it incapable of forming thermal donors in an amount sufficient to affect resistivity upon being subjected to a conventional semiconductor device manufacturing process. The present invention further directed to a silicon on insulator structure derived from such a wafer.
    Type: Application
    Filed: March 17, 2005
    Publication date: July 21, 2005
    Applicant: MEMC Electronic Materials, Inc.
    Inventors: Martin Binns, Robert Falster, Jeffrey Libbert
  • Publication number: 20050150445
    Abstract: The present invention relates to a process for preparing a single crystal silicon ingot, as well as to the ingot or wafer resulting therefrom. The process comprises controlling (i) a growth velocity, v, (ii) an average axial temperature gradient, G0, and (iii) a cooling rate of the crystal from solidification to about 750° C., in order to cause the formation of a segment having a first axially symmetric region extending radially inward from the lateral surface of the ingot wherein silicon self-interstitials are the predominant intrinsic point defect, and a second axially symmetric region extending radially inward from the first and toward the central axis of the ingot.
    Type: Application
    Filed: December 7, 2004
    Publication date: July 14, 2005
    Applicant: MEMC Electronic Materials, Inc.
    Inventors: Chang Kim, Steven Kimbel, Jeffrey Libbert, Mohsen Banan
  • Patent number: 6913647
    Abstract: A process for producing silicon which is substantially free of agglomerated intrinsic point defects in an ingot having a vacancy dominated region. An ingot is grown generally in accordance with the Czochralski method. While intrinsic point defects diffuse from or are annihilated within the ingot, at least a portion of the ingot is maintained above a temperature TA at which intrinsic point defects agglomerate. The achievement of defect free silicon is thus substantially decoupled from process parameters, such as pull rate, and system parameters, such as axial temperature gradient in the ingot.
    Type: Grant
    Filed: May 13, 2003
    Date of Patent: July 5, 2005
    Assignee: MEMC Electronic Materials, Inc.
    Inventors: Robert J. Falster, Harold W. Korb
  • Publication number: 20050132948
    Abstract: A process for the preparation of a silicon single ingot in accordance with the Czochralski method. The process for growing the single crystal silicon ingot comprises controlling (i) a growth velocity, v, (ii) an average axial temperature gradient, G0, during the growth of a constant diameter portion of the crystal over a temperature range from solidification to a temperature of no less than about 1325° C. to initially produce in the constant diameter portion of the ingot a series of predominant intrinsic point defects including vacancy dominated regions and silicon self interstitial dominated regions, alternating along the axis, and cooling the regions from the temperature of solidification at a rate which allows silicon self-interstitial atoms to diffuse radially to the lateral surface and to diffuse axially to vacancy dominated regions to reduce the concentration intrinsic point defects in each region.
    Type: Application
    Filed: February 16, 2005
    Publication date: June 23, 2005
    Applicant: MEMC Electronic Materials, Inc.
    Inventors: Vladimir Vornokov, Robert Falster, Mohsen Banan
  • Patent number: 6897084
    Abstract: The present invention is directed to a single crystal Czochralski-type silicon wafer, and a process for the preparation thereof, which has at least a surface layer of high resistivity, the layer having an interstitial oxygen content which renders it incapable of forming thermal donors in an amount sufficient to affect resistivity upon being subjected to a conventional semiconductor device manufacturing process. The present invention further directed to a silicon on insulator structure derived from such a wafer.
    Type: Grant
    Filed: April 11, 2002
    Date of Patent: May 24, 2005
    Assignee: MEMC Electronic Materials, Inc.
    Inventors: Martin Jeffrey Binns, Robert J. Falster, Jeffrey L. Libbert
  • Patent number: 6896728
    Abstract: The present invention is directed to a process for producing a silicon wafer which, during the heat treatment cycles of essentially any arbitrary electronic device manufacturing process, may form an ideal, non-uniform depth distribution of oxygen precipitates and may additionally contain an axially symmetric region which is substantially free of agglomerated intrinsic point defects. The process including growing a single crystal silicon ingot from molten silicon, and as part of the growth process, controlling (i) a growth velocity, v, (ii) an average axial temperature gradient, G0, during the growth of a constant diameter portion of the crystal over a temperature range from solidification to a temperature of no less than about 1325° C., and (iii) a cooling rate of the crystal from a solidification temperature to about 1,050° C., in order to cause the formation of an axially symmetrical segment which is substantially free of agglomerated intrinsic point defects.
    Type: Grant
    Filed: February 25, 2003
    Date of Patent: May 24, 2005
    Assignee: MEMC Electronic Materials, Inc.
    Inventors: Robert J. Falster, Joseph C. Holzer, Marco Cornara, Daniela Gambaro, Massimiliano Olmo, Steve A. Markgraf, Paolo Mutti, Seamus A. McQuaid, Bayard K. Johnson
  • Patent number: 6869477
    Abstract: A process for preparing a single crystal silicon in accordance with the Czochralski method, is provided. More specifically, by quickly reducing the pull rate at least once during the growth of the neck portion of the single crystal ingot, in order to change the melt/solid interface shape from a concave to a convex shape, the present process enables zero dislocation growth to be achieved in a large diameter neck within a comparably short neck length, such that large diameter ingots of substantial weight can be produced safely and at a high throughput.
    Type: Grant
    Filed: February 20, 2001
    Date of Patent: March 22, 2005
    Assignee: MEMC Electronic Materials, Inc.
    Inventors: Hiroyo Haga, Makoto Kojima, Shigemi Saga
  • Patent number: 6866713
    Abstract: The present invention provides for a process for preparing a single crystal silicon ingot by the Czochralski method. The process comprises selecting a seed crystal for Czochralski growth wherein the seed crystal comprises vacancy dominated single crystal silicon.
    Type: Grant
    Filed: October 28, 2002
    Date of Patent: March 15, 2005
    Assignee: MEMC Electronic Materials, Inc.
    Inventors: Hariprasad Sreedharamurthy, Mohsen Banan
  • Patent number: 6858307
    Abstract: A process for the preparation of a silicon single ingot in accordance with the Czochralski method. The process for growing the single crystal silicon ingot comprises controlling (i) a growth velocity, v, (ii) an average axial temperature gradient, G0, during the growth of a constant diameter portion of the crystal over a temperature range from solidification to a temperature of no less than about 1325° C. to initially produce in the constant diameter portion of the ingot a series of predominant intrinsic point defects including vacancy dominated regions and silicon self interstitial dominated regions, alternating along the axis, and cooling the regions from the temperature of solidification at a rate which allows silicon self-interstitial atoms to diffuse radially to the lateral surface and to diffuse axially to vacancy dominated regions to reduce the concentration intrinsic point defects in each region.
    Type: Grant
    Filed: October 5, 2001
    Date of Patent: February 22, 2005
    Assignee: MEMC Electronic Materials, Inc.
    Inventors: Vladimir V. Vornokov, Robert J. Falster, Mohsen Banan
  • Patent number: 6849119
    Abstract: A process for heat-treating a single crystal silicon wafer to influence the precipitation behavior of oxygen in the wafer in a subsequent thermal processing step. The wafer has a front surface, a back surface, and a central plane between the front and back surfaces. In the process, the wafer is subjected to a heat-treatment to form crystal lattice vacancies, the vacancies being formed in the bulk of the silicon. The wafer is then cooled from the temperature of said heat treatment at a rate which allows some, but not all, of the crystal lattice vacancies to diffuse to the front surface to produce a wafer having a vacancy concentration profile in which the peak density is at or near the central plane with the concentration generally decreasing in the direction of the front surface of the wafer.
    Type: Grant
    Filed: May 6, 2003
    Date of Patent: February 1, 2005
    Assignee: MEMC Electronic Materials, Inc.
    Inventors: Robert J. Falster, Marco Cornara, Daniela Gambaro, Massimiliano Olmo
  • Patent number: 6849901
    Abstract: The present invention relates to a process for the preparation of a silicon on insulator wafer. The process includes implanting oxygen into a single crystal silicon wafer which is substantially free of agglomerated vacancy-type defects. The present invention further relates to a process for the preparation of a silicon on insulator wafer wherein oxygen is implanted into a single crystal silicon wafer having an axially symmetric region in which there is a predominant intrinsic point defect which is substantially free of agglomerated intrinsic point defects. Additionally, the present invention relates to a silicon on insulator (“SOI”) structure in which the device layer and the handle wafer each have an axially symmetric region which is substantially free of agglomerated intrinsic point defects.
    Type: Grant
    Filed: January 3, 2002
    Date of Patent: February 1, 2005
    Assignee: MEMC Electronic Materials, Inc.
    Inventor: Robert J. Falster
  • Patent number: 6846539
    Abstract: The present invention relates to a process for preparing a single crystal silicon ingot, as well as to the ingot or wafer resulting therefrom. The process comprises controlling (i) a growth velocity, v, (ii) an average axial temperature gradient, G0, and (iii) a cooling rate of the crystal from solidification to about 750° C., in order to cause the formation of a segment having a first axially symmetric region extending radially inward from the lateral surface of the ingot wherein silicon self-interstitials are the predominant intrinsic point defect, and a second axially symmetric region extending radially inward from the first and toward the central axis of the ingot.
    Type: Grant
    Filed: January 22, 2002
    Date of Patent: January 25, 2005
    Assignee: MEMC Electronic Materials, Inc.
    Inventors: Chang Bum Kim, Steven L. Kimbel, Jeffrey L. Libbert, Mohsen Banan
  • Patent number: 6840997
    Abstract: The present invention relates to a process for growing a single crystal silicon. The process including controlling a growth velocity, v, and an average axial temperature gradient, G0, during the growth of the constant diameter portion of the crystal over the temperature range from solidification to a temperature of no less than about 1325° C., to cause the formation of a first axially symmetrical region in which vacancies, upon cooling of the ingot from the solidification temperature, are the predominant intrinsic point defect and which is substantially free of agglomerated intrinsic point defects, wherein the first axially symmetric region has a width of at least about 50% of the radius of the constant diameter portion of the ingot.
    Type: Grant
    Filed: October 24, 2001
    Date of Patent: January 11, 2005
    Assignee: MEMC Electronic Materials, Inc.
    Inventors: Robert A. Falster, Joseph C. Holzer, Steve A. Markgraf, Paolo Mutti, Seamus A. McQuaid, Bayard K. Johnson
  • Publication number: 20040255847
    Abstract: A fluid sealing system is provided for use in a crystal puller for growing a monocrystalline ingot. The crystal puller has a housing, a fluid flow path contained in the housing, and a fluid passage through a wall of the housing for passage of fluid. The fluid sealing system includes a fluid connector head adapted for connection to the fluid passage and to the fluid flow path to establish fluid communication between the fluid flow path and the outside of the housing. The head has a port adapted for fluid communication with the fluid passage through the wall of the housing. First and second seals around the port are adapted for sealing engagement with the head. A space is defined generally between the first and second seals, and a leak detector is arranged to monitor the space for detecting fluid leakage past at least one of the seals.
    Type: Application
    Filed: June 19, 2003
    Publication date: December 23, 2004
    Applicant: MEMC Electronic Materials, Inc.
    Inventors: Carl F. Cherko, Robert D. Cook
  • Patent number: 6828690
    Abstract: A process for heat-treating a single crystal silicon segment to influence the profile of minority carrier recombination centers in the segment. The segment has a front surface, a back surface, and a central plane between the front and back surfaces. In the process, the segment is subjected to a heat-treatment to form crystal lattice vacancies, the vacancies being formed in the bulk of the silicon. The segment is then cooled from the temperature of said heat treatment at a rate which allows some, but not all, of the crystal lattice vacancies to diffuse to the front surface to produce a segment having a vacancy concentration profile in which the peak density is at or near the central plane with the concentration generally decreasing in the direction of the front surface of the segment. Platinum atoms are then in-diffused into the silicon matrix such that the resulting platinum concentration profile is substantially related to the concentration profile of the crystal lattice vacancies.
    Type: Grant
    Filed: August 4, 1999
    Date of Patent: December 7, 2004
    Assignee: MEMC Electronic Materials, Inc.
    Inventor: Robert J. Falster
  • Publication number: 20040235402
    Abstract: A wafer carrier for retaining at least one semiconductor wafer in a processing apparatus during a processing operation which removes wafer material by at least one of abrading and chemical reaction. The processing apparatus is adapted for removing wafer material from a front side and a back side of each wafer simultaneously. The carrier includes a plate including wafer contaminating material and having an opening and a thickness. An insert has a thickness and is disposed in the opening for receiving at least one wafer and engaging a peripheral edge of the wafer to hold the wafer as the carrier rotates. The thickness of the insert is significantly greater than the thickness of the plate to inhibit removal of material from the plate and thereby inhibit bulk metal contamination of the wafer.
    Type: Application
    Filed: May 20, 2003
    Publication date: November 25, 2004
    Applicant: MEMC Electronic Materials, Inc.
    Inventors: Mick Bjelopavlic, Alexis Grabbe, Michele Haler, Tracy M. Ragan
  • Patent number: 6808781
    Abstract: A silicon wafer having a controlled oxygen precipitation behavior such that a denuded zone extending inward from the front surface and oxygen precipitates in the wafer bulk sufficient for intrinsic gettering purposes are ultimately formed. Specifically, prior to formation of the oxygen precipitates, the wafer bulk comprises dopant stabilized oxygen precipitate nucleation centers. The dopant is selected from a group consisting of nitrogen and carbon and the concentration of the dopant is sufficient to allow the oxygen precipitate nucleation centers to withstand thermal processing such as an epitaxial deposition process while maintaining the ability to dissolve any grown-in nucleation centers.
    Type: Grant
    Filed: December 23, 2002
    Date of Patent: October 26, 2004
    Assignee: MEMC Electronic Materials, Inc.
    Inventors: Luciano Mule'Stagno, Jeffrey L. Libbert, Richard J. Phillips, Milind Kulkarni, Mohsen Banan, Stephen J. Brunkhorst
  • Patent number: 6797062
    Abstract: A heat shield assembly is disclosed for use in a crystal puller for growing a monocrystalline ingot from molten semiconductor source material. The heat shield assembly has a central opening sized and shaped for surrounding the ingot as the ingot is pulled from the molten source material. In one aspect, the heat shield assembly includes a multi-sectioned outer shield and a multi-sectioned inner shield. The sections of at least one of the inner and outer shields may be releasably connected to one another so that, in the event a section is damaged, the sections may be separated to allow replacement with an undamaged section. In another aspect the heat shield assembly includes an upper section and a lower section extending generally downward from the upper section toward the molten material. The lower section has a height equal to at least about 33% of a height of the heat shield assembly.
    Type: Grant
    Filed: September 20, 2002
    Date of Patent: September 28, 2004
    Assignee: MEMC Electronic Materials, Inc.
    Inventors: Lee W. Ferry, Richard G. Schrenker, Hariprasad Sreedharamurthy