Abstract: A brushless D.C. motor includes having a rotor and a plurality of stator windings that define a stator field when driven by a bridge circuit, where a microprocessor drives the bridge circuit using a pulse-width modulation logic. The brushless D.C. motor is driven by triggering a commutation of the stator field; voltage induced by rotating the rotor in a non-energized stator winding is monitored to determine whether the voltage reaches, exceeds or is below a threshold voltage. A delay time between triggering the commutation of the stator field and the voltage reaching, exceeding or being below the threshold voltage is determined; and using the determined delay time a triggering time point for a next commutation of the stator field.

Abstract: A procedure for checking the operational capability of an electric circuit, which has a sensor module and a diagnosis mechanism with the sensor module including an integrated switching circuit, wherein the sensor module has at least one output terminal connected to the diagnosis mechanism and power supply terminals, and wherein an operating voltage is applied via cables to the power supply terminals. The sensor module is switched to a test mode, in which a communication test signal is emitted from the output terminal. This signal is read in by the diagnostic mechanism and compared with a tolerance band range, in order to verify that the communication with the sensor module is operational. In the event of operational communication, the operational capability of the switching circuit is tested.

Abstract: Disclosed is a method and device for transmitting data between at least two transmitters and a receiver which are connected to a bus. A synchronization signal is applied to the bus and a number of data volume counters corresponding to the number of transmitters reduced by one is set to a predefined initial value. A first transmitter transmits in the form of data elements a predefined data volume allocated to the transmitter over the bus to the receiver. The data volume values of the other transmitters are selected so that only one transmitter at any given time simultaneously transmits on the bus.

Abstract: A device for detecting a gas or gas mixture has a first and a second gas sensor. The first gas sensor is a MOSFET, which comprises a first source, a first drain, a first channel zone disposed between the latter elements, and a first gas sensitive layer capacitively coupled to the first channel zone that contains palladium and reacts to a change in the concentration of the gas to be detected with a change in its work function. The second gas sensor has, in a semiconductor substrate, a second source, a second drain, and a second channel zone between the latter elements, which is capacitively coupled via an air gap to a suspended gate. The latter comprises a second gas sensitive layer that reacts to a change in the concentration of the gas to be detected with a change in its work function. The second gas sensitive layer is arranged on a support layer and faces the air gap.

Abstract: A gas sensor has a gas-sensitive layer with a surface area where the electron affinity depends on the concentration of a target gas brought in contact with the surface area. An electrical potential sensor is capacitively coupled to the surface area via an air gap. The surface area of the gas-sensitive layer is covered by an electric insulating layer that is inert to the target gas and is bonded to the gas-sensitive layer. The coating is designed in such a way that it is permeable for the target gas and a different, non-target gas that can be adsorbed on the surface area. The coating has different diffusion constants for the target gas and the non-target gas. The diffusion constants are coordinated with each other in such a way that the sensitivity of the gas sensor to the target gas increases when the target gas concentration exceeds a predetermined concentration threshold in the presence of the non-target gas.

Abstract: The invention relates to an electronic component having a semiconductor component, particularly a semiconductor chip, and at least one SMD component, a chip carrier with a support platform and with connecting leads. Whereby the semiconductor component, which is connected electrically via chip bonds to bond fingers of the connecting leads is mounted on the support platform and the SMD component connects the support platform to a connecting lead via contact surfaces arranged thereon, a housing, which encloses the semiconductor component, the SMD component, and at least partially the chip carrier. The support platform and the connecting lead in the area of the SMD component are profiled to create barriers in such a way that flowing of a free-flowing material from the contact surfaces connected to the SMD component of the chip carrier both onto the support platform and onto the connecting lead is prevented.

Abstract: Printed circuit board having a termination of a T-shaped signal line having at least two line ends, one line end being terminated using a terminating resistor against a supply voltage, and the other line end being terminated against the reference potential of the supply voltage.

Abstract: A semiconductor arrangement includes first and second integrated circuits (dies), an electrically conductive intermediate element, and one or more bond conductors. The first and the second integrated circuits are arranged in a package. The first integrated circuit has a first contact pad. The second integrated circuit has a second contact pad. The intermediate element is disposed on the second contact pad. The conductors electrically connect the first and the second integrated circuits. At least one of the bond conductors has a first end electrically connected to the first contact pad, and a second wedge shaped end electrically connected to the intermediate element. The bond conductor is made of a first material and the intermediate element is made of a second material which is softer than the first material.

Abstract: A method for producing a defect card for individual dies located on a wafer, comprising: producing first and second defect cards, where the defective individual dies whose adjoining individual dies form an environment having a defect density up to a first value (?1) are classified as defective on the first defect card, and where the defective individual dies which are not considered upon the production of the first defect card are classified as defective on the second defect card; producing a third defect card by classifying additional individual dies on the second defect card as defective, where adjoining individual dies of the additional defective individual dies form an environment having at least one defect density of a second value (?2), which second value is less than the first value (?1); and producing a fourth defect card by unifying the third defect card with the first defect card.

Abstract: Disclosed is an integrated electronic circuit comprising a core circuit that generates a useful signal as well as a buffer for storing the useful signal. The buffer stores the last read value of the useful signal for a predetermined period of time when the power supply is interrupted, and the buffer is disconnected from the power supply of the other circuits.

Abstract: A voltage supply has a plurality of voltage sources to supply output connections. To achieve closed-loop control of the output voltage at the output connections, a closed-loop control circuit is provided that has an actuating element for each voltage source, and each respective actuating element has a current path via which a connection of the respective voltage source can be connected to an output connection. Each actuating element has an actuating signal input for setting the electrical conductivity of its current path. The closed-loop control circuit has a closed-loop controller to which the output voltage and a desired voltage signal are supplied. When a deviation occurs between the output voltage and the desired voltage signal, the closed-loop controller interacts with at least one actuating signal input in order to reduce the deviation.

Abstract: A device for measuring an angle at which a magnetic field is aligned in a plane relative to a reference axis has at least two magnetic field sensors, which are aligned with their measurement axes in and/or parallel to the plane and oriented at right angles to each other. The device has a PLL phase control circuit with a follow-on oscillator arranged in a phase control loop, which has at least one oscillator output for a digital oscillating signal. The magnetic field sensors are coupled to the phase control loop in such a way that the digital oscillating signal is phase synchronous with a rotation scanning signal formed by rotary scanning of the measurement signals of the magnetic field sensors. The oscillator output is connected to a phasing detector for determining the phasing of the digital oscillating signal.

Abstract: A semiconductor component has at least one semiconductor chip in which an electrical circuit is integrated. The semiconductor chip is surrounded by an electrically insulating encapsulating compound and has on its surface at least one termination surface for a test signal, which is covered by the encapsulating compound. The termination surface is connected in an electrically conductive manner to an analysis contact that projects above the surface of the semiconductor chip, that is located in the interior of the encapsulating compound at a distance from its exterior surface, and that can be exposed by removing a layer of the encapsulating compound located near the exterior.

Abstract: The invention relates to a probe card assembly comprising a stiffener (1), comprising a PCB (2) disposed in the stiffener (1), and comprising a spider (3) supported by the stiffener and the PCB (2), said spider comprising at least one probe (30) to test a wafer (5). This probe card assembly of the PCB (2) is supported in a loosely decoupled manner in the stiffener (1) to prevent transmission of high thermally-induced warping effects.

Abstract: A magnetic field sensor assembly has at least one magnetic field sensor integrated into a semiconductor chip and has at least one magnetic field source. The semiconductor chip and the at least one magnetic field source are arranged in an encapsulation material in a predetermined position relative to each other in such a way that a magnetic field generated by the magnetic field source is detectable with the aid of at least one magnetic field sensor. The magnetic field source is arranged in the semiconductor chip and/or in the plane of extension of the semiconductor chip laterally adjacent to said chip.

Abstract: An electric component comprising a sensor and/or actuator chip with a substrate on which a passivating layer and a sensor and/or actuator structure consisting of an active surface area is arranged. The chip is surrounded by an encapsulation having an opening which forms an access to the at least one active surface area. A layer stack is arranged on the substrate, said stack of layers comprising from the passivating layer to the substrate at least one first strip conductor layer, a first electric insulating layer, a second strip conductor layer and a second electric insulating layer. The first conductor strip layer is fully arranged outside the area of the chip covered by the opening. At least one conductor strip of the second conductor strip layer is connected to the sensor and/or actuator structure.

Abstract: A measuring device to measure a magnetic field having at least one measuring coil and at least one sensor to measure low-frequency magnetic fields, which measuring coil and which sensor have their planes of extension each positioned or positionable transverse to the flux direction of the magnetic field. The measuring coil and the sensor are connected to a signal processing device with which, depending on a first measurement signal provided by the measuring coil and a second measurement signal provided by the sensor, an output signal that essentially corresponds to the magnetic field can be generated. The measuring coil, the sensor, and the signal processing device are monolithically integrated into a semiconductor chip. The measuring coil may also be formed by means of traces of a printed circuit board on which the semiconductor chip that has the sensor and the signal processing device is located.

Abstract: In a procedure for measuring the concentration of a target gas, a gas sensor is provided whose sensor signal at constant temperature is dependent on a target gas concentration and has a lower measurement sensitivity in a first modulation range than in a second modulation range. The position of the modulation ranges is dependent on the temperature. The temperature of the gas sensor is controlled so that the sensor signal is essentially independent of the target gas concentration and lies within the second modulation range. The temperature of the gas sensor is then a measurement for the target gas concentration.

Abstract: A method for adjusting an output signal produced by a device under test from an input variable by: a) positioning the device under test at a first test device with a physical disturbance variable and a known input variable value, b) acquiring at least one measured value for the output signal, c) changing the adjustment state, d) acquiring a further measured value for the output signal, e) positioning the device under test at a further test device having a further disturbance variable value and the input variable value, f) acquiring a further measured value for the output signal, g) changing the adjustment state, h) acquiring a further measured value for the output signal, i) comparing the measured values acquired at the test devices for each adjustment state and determining a first adjustment state in which the correlation between the measured values is larger than in a second adjustment state.

Abstract: An error correction and/or error detection method reads of stored information data from a storage device; wherein in addition to the information data, code data is read from the storage device. Syndrome data is formed from the information data and the code data in order to determine errors and/or error positions in the read data. For detection of multiple errors, it is verified whether in the case of a determined error position, the information data or code data associated with the relevant storage positions are either all equal to 0, or are all equal to 1.