Abstract: A shaking moment balancer is designed for balancing an unbalanced moment in a machine. This apparatus includes a housing for setting the balancer therein, an input shaft set mounted in the housing, a first mating weight unit mounted in the housing and having a plurality of first mating weights for generating a first inertial moment in a first direction, and a plurality of first slots for adjustably mounting the plurality of first mating weights thereon, a second mating weight unit mounted in the housing and having a plurality of second mating weights for generating a second inertial moment in a second direction, and a plurality of second slots for adjustably mounting the plurality of second mating weights thereon, and a transmitting unit connected between the input shaft set and the mating weight units for driving the mating weight units to rotate at the speed the same as or a multiple of that of the input shaft.

Abstract: A reflector structure is provided for improving irradiation uniformity of a linear lamp array applied in a semiconductor process. The reflector structure includes a central reflector, two side reflectors, and two inclined reflectors. The central reflector is horizontally set above the linear lamp array at a first predetermined distance from a wafer for reflecting light irradiated from a central part of the linear lamp array to the wafer. The two side reflectors are horizontally set above the linear lamp at a second predetermined distance to the wafer, wherein the second predetermined distance is less than the first predetermined distance, and respectively connected to two opposite side parts of the central reflector for reflecting light irradiated from side parts of the linear lamp array to the wafer.

Abstract: There is provided a process and its system for fabricating plasma with feedback control on plasma density. This process uses a heterodyne millimeter wave interferometer as a sensor to measure the plasma density in the process container and the plasma density that is needed in the plasma fabricating process, and then provides real-time information of the measurements to a digital control device which makes numerical calculations and then drives the RF power generator to change the RF output power so as to enable the plasma density in the plasma fabricating process to be close to the expected plasma density. The conventional operation parameter method is to control air pressure, RF power, gas flow quantity, temperature and so on. However, it does not control the plasma parameter that has the most direct influence on the process. Therefore, this method cannot guarantee that, in the process of fabricating wafers, different batches of wafers will be operated under similar process plasma conditions.

Abstract: An enzyme membrane reactor is designed to enhance the production efficiency of foods, pharmaceutical products, and other bioproducts. The reactor is formed of a cap and a container in which a plurality of the biocatalyst-immobilized sheets are located at an interval. The reactor works in such a way that a liquid reaction mixture is introduced into the container via an inlet of the container, thereby resulting in the synthesis of a bioproduct mixture which is collected via an outlet of the reactor. The immobilized biocatalyst is prepared by entrapping a biocatalyst with a gluten matrix. The immobilized biocatalyst is deposited on supporting meshes contained by a plurality of frames that are inserted in a plurality of pairs of grooves contained by two opposite side walls of the container. Deactivated biocatalyst-immobilized sheets are replaceable and recyclable.

Abstract: A prescalar using the fractional division theory. The prescalar is a critical circuit in a phase-locked loop based frequency synthesizer to provide a high frequency operation. The prescalar is also an important subassembly. Using four translucent circuits and one divisor selection circuit, a two mode frequency divider synchronously divided by ⅘ is synthesized to synthesize the fraction function. The load capacitance can be effectively reduced. Meanwhile, a reset TSPC flip flop can be designed to effectively and quickly perform the reset operation, and to assemble a two mode frequency divider synchronously divided by {fraction (16/13)}. The invention uses standard 0.25 &mgr;m CMOS fabrication process to obtain a maximum operation frequency of 6 GHz under a 2V operation voltage. The chip system integration can thus be enhanced.

Abstract: The present invention discloses s novel synthesis method of nickel fibers. The method of the present invention involves reducing nickel ions in an aqueous solution with a reducing agent in the presence of a base, a pH buffer, and a magnetic field or a surfactant at a temperature of 80-100° C. for a period of time, wherein a pH value of the aqueous solution is not less than 11.0 during the period of time, so that nickel fibers are formed in the aqueous solution. The nickel fibers synthesized in the present invention have a diameter ranging from sub-micron to microns, and a length up to centimeters.

Abstract: A method of self-assembling silicon quantum dots comprises the steps of providing a substrate, forming a thin amorphous Si film, and forming a plurality of Si quantum dots by controlling the energy and the shooting numbers of an excimer laser during an annealing process, wherein the excimer laser emits light on the thin amorphous Si film.

Abstract: The invention describes a simple and efficient codeword degrouping algorithm which can be applied in an MPEG audio decoder, in which a codeword is degrouped into three samples. According to the proposed algorithm, the division and modulo computations applied in the original degrouping method can be fully substituted into the addition and subtraction computations by using the mode selection and iterative decompositions, and thus largely reduces the overhead and complexity for the decoder. Also, an efficient architecture for the proposed algorithm includes one special adder, two subtractors, and two adders. The architecture generates the quotient and remainder simultaneously with fix-rate throughput.

Abstract: A sampling timing recovering circuit free from being troubled by a frequency error is provided. Such recovering circuit includes a phase locking circuit having a local frequency for processing an incoming signal having a phase, a specific parameter and an input symbol rate and for locking the phase of the incoming signal, and a frequency locking circuit electrically connected to the phase locking circuit for locking the input symbol rate of the incoming signal to enable the phase locking circuit to desiredly process the incoming signal. A method to this effect is also provided and includes the steps of a) processing an incoming signal having a phase, a specific parameter and an input symbol rate to have the phase lockable, b) locking the phase of the incoming signal, and c) locking the input symbol rate of the incoming signal to enable the incoming signal to be predeterminedly processed.

Abstract: A general type press system with variable-speed slider-crank mechanism driven by a servomotor which can be used for various types of press work by providing various corresponding input speed trajectories. The press includes a frame, a linkage-mechanism with a crank as its input and a slider as its output, and a servomotor. The servomotor is used for driving the crank of the linkage-mechanism. The output motion of the press, i.e., the ram's motion, is accomplished by the slider of the mechanism. The speed of the servomotor is controlled by a micro-computer or a personal computer equipped with a digital signal processor (DSP). This computer supports a number of speed functions for different types of press work to obtain optimal processing results. Because the existing traditional linkage press can also be upgraded to a multi-purpose press, the disclosed press is an innovative design with the advantages of flexibility and practicability.

Abstract: Flame-retardant advanced epoxy resins and cured epoxy resins which contain a rigid phosphorus group and thus provide better thermal and flame-retardant properties than the conventional epoxy resins prepared from tetrabromobisphenol A. The advanced epoxy resins are suitable for making a fiber-reinforced epoxy resin composite which is useful in the fabrication of printed circuit boards. The cured epoxy resins can be used in semiconductor encapsulation applications.

Abstract: A new built-in self-test architecture for multiple memories in a chip is proposed in the present invention. In this architecture, all memories under test are tested in parallel using only one address generator. When the address generated from the address generator exceeds one memory's address space the memory is turned off by a BIST controller. Each word in each memory is tested by a scan-in/out method. That is, the D flip-flops in the input and output ports of each memory are connected in series and form two scan chains, respectively. Only one data input and one data output are required for the scan chains of each memory. The outputs of all scan chains are connected to a self checker for fault analysis in parallel. The address generator, data generator, self checker and the test controller are all built in a chip to satisfy the requirement of built-in self-testing.

Abstract: A method for making a semiconductor package firstly provides a lead frame having a first surface and a corresponding second surface. The lead frame includes at least a package unit that further includes a die pad, and a plurality of leads disposed on the periphery of the die pad where each of the leads further includes a neck portion. The method then attaches the second surface of the lead frame to a tape, and performs a punching process to cut off the neck portion of the lead so as to form a plurality of conductive blocks disposed independently on the periphery of the die pad. The method further provides a chip having its back surface attach to the first surface of the die pad, and provides electrical connection between the bonding pad and the first surface of the conductive block by using a plurality of bonding wires. Further, the method performs an encapsulating process to encapsulate the chip, the bonding wires, the die pad, and the first surface of the conductive block.

Abstract: A method for improving the electrical properties of a gate oxide is disclosed. The method includes the steps of providing a silicon wafer with a gate oxide formed thereon, providing a platinum plate, immersing the silicon wafer and the platinum plate in a chemical solution with a relatively high electrical conductivity, respectively connecting the silicon wafer and the platinum plate to the negative terminal and the positive terminal of a current source, inducing an electron current to flow from the negative terminal of the current source through the silicon wafer to the platinum plate, removing the silicon wafer from the chemical solution and removing the residual chemical solution from the surface of the gate oxide, and treating the gate oxide with an annealing process.

Abstract: A method of fabricating a field emission device is disclosed. A conductive layer is etched back by means of a reactive ion etching (RIE) process to form a chimney-shaped structure of diode-type or triode-type to serve as a field emitter. The field emission device of the present invention can be manufactured at a temperature of below 400° C., without complicated techniques or equipment, and is suitable for application in flat panel displays having large area.

Abstract: A method of reducing the boron-penetrating effect in a CMOS transistor provides a silicon substrate, which comprises an isolating area, an active area and a gate oxide layer formed on the active layer. A polysilicon layer is then deposited on the silicon substrate. Next, the boron ion (B+) is doped into the polysilicon layer. Next, a gate photoresist with a predetermined gate pattern is formed on the polysilicon layer. The polysilicon not covered by the gate photoresist is then etched to from a polysilicon gate. The gate photoresist is used as a mask to dope the boron-fluorine ion (BF2+) into the silicon substrate. Finally, after removing the gate photoresist, a tempering procedure is performed to form a shallow junction area of a source/drain on the silicon substrate.

Abstract: An isodethiaazacephem derivative having the following formula (I): wherein RI is hydrogen or —SO2RIII; RII is —CO2RIV or —SO2RIII in which RIII is a hydrogen, C1-C6 alkyl, aralkyl having a total carbon number of 7-12, aryl, or a halogenated C1-C6 alkyl; and RIV is a hydrogen, C1-C6 alkyl, aralkyl having a total carbon number of 7-12 or aryl; and RV is a substituted acetamido radical.

Abstract: An oil-in-water emulsion for encapsulating paclitaxel including (a) triglyceride , (b) emulsifier including phosphatidyl choline (PC), non-ionic surfactant and polyethyleneglycol-modified disteaoyl phosphatidylethanolamine (PEG-M-DSPE), and (c) pharmaceutically acceptable aqueous solution.

Abstract: A method of forming a gate oxide layer with improved ability to resist process damage increases the reliability and yield of a transistor device. First, a nitrogen-containing gate oxide layer is formed on an element area of a silicon substrate. Then, a polysilicon layer is deposited on the gate oxide layer. Next, a gate doping process and a fluorine ion implantation are performed on the polysilicon layer. Then, a high-temperature tempering procedure is performed to make the fluorine enter the gate oxide layer.

Abstract: An apparatus with new fixed-coefficient recursive structures for computing discrete cosine transforms with the power-of-two length is disclosed. The fixed-coefficient recursive structures are developed from exploration of periodicity embedded in transform bases, whose indices can form a complete residue system or a complete odd residue system. Distinctively, we found that properly selected fixed-coefficient filters achieve lower round-off errors than the nominal variable-coefficient ones for computing DCTs in finite-word-length machines.