Patents Assigned to National University Corporation Tohoku University
-
Publication number: 20130220451Abstract: A pressure type flow rate control apparatus is provided wherein flow rate of fluid passing through an orifice is computed as Qc=KP1 (where K is a proportionality constant) or as Qc=KP2m (P1?P2)n (where K is a proportionality constant, m and n constants) by using orifice upstream side pressure P1 and/or orifice downstream side pressure P2. A fluid passage between the downstream side of a control valve and a fluid supply pipe of the pressure type flow rate control apparatus comprises at least 2 fluid passages in parallel, and orifices having different flow rate characteristics are provided for each of these fluid passages, wherein fluid in a small flow quantity area flows to one orifice for flow control of fluid in the small flow quantity area, while fluid in a large flow quantity area flows to the other orifice for flow control of fluid in the large flow quantity area.Type: ApplicationFiled: February 8, 2013Publication date: August 29, 2013Applicants: Fujikin Incorporated, Tokyo Electron Ltd., National University Corporation Tohoku UniversityInventors: Fujikin Incorporated, National University Corporation Tohoku University, Tokyo Electron Ltd.
-
Publication number: 20130213535Abstract: A spinal fixation titanium alloy rod fixes a plurality of spinal-fixing screws embedded and fixed in vertebrae of a human body. The rod is cylindrically shaped, has a sufficient length for coupling with the spinal-fixing screws, and has a diameter adjusted to 4 to 7 mm. In the titanium alloy constituting the rod, Nb content is 25 to 35 percent by weight, Ta content is such that the Nb content +0.8×Ta content ranges from 36 to 45 percent by weight, Zr content is 3 to 6 percent by weight, and the remainder is Ti and unavoidable impurities, excluding vanadium. The titanium alloy is manufactured by swaging processing at a cross-sectional reduction rate of at least 90%, and aging the swaged titanium alloy by heating at a temperature of 600 to 800K, preferably 700 to 800K, for 43.2 ks to 604.8 ks.Type: ApplicationFiled: March 26, 2013Publication date: August 22, 2013Applicants: NATIONAL UNIVERSITY CORPORATION TOHOKU UNIVERSITY, SHOWA-IKA KOGYO CO. LTD.Inventors: Mitsuo Niinomi, Masaaki Nakai, Kengo Narita
-
Patent number: 8496792Abstract: In a rotary magnet sputtering apparatus, a target consumption displacement quantity is measured, and corresponding to the measurement results, a distance between a rotating magnet group and a target is adjusted, and uniform film forming rate is achieved over a long period of time so as to reduce the change of a target surface due to consumption of the target and to reduce the change of the film forming rate with time. An ultrasonic sensor or a laser transmitting/receiving device may be used as a means for measuring the consumption displacement quantity of the target.Type: GrantFiled: March 28, 2008Date of Patent: July 30, 2013Assignees: National University Corporation Tohoku University, Tokyo Electron LimitedInventors: Tadahiro Ohmi, Tetsuya Goto, Takaaki Matsuoka
-
Patent number: 8497214Abstract: A semiconductor device manufacturing method, the method including: forming a semiconductor element on a semiconductor substrate; and by using microwaves as a plasma source, forming an insulation film on the semiconductor element by performing a CVD process using microwave plasma having an electron temperature of plasma lower than 1.5 eV and an electron density of plasma higher than 1×1011 cm?3 near a surface of the semiconductor substrate.Type: GrantFiled: August 7, 2008Date of Patent: July 30, 2013Assignees: Tokyo Electron Limited, National University Corporation Tohoku UniversityInventors: Hirokazu Ueda, Toshihisa Nozawa, Takaaki Matsuoka, Akinobu Teramoto, Tadahiro Ohmi
-
Publication number: 20130187283Abstract: Provided is a method of manufacturing a semiconductor device of a multilayer wiring structure that comprises a CFx film as an interlayer insulating film, that can make the most of the advantage of the CFx film having a low dielectric constant, and that can prevent degradation of the properties of the CFx film due to CMP. The method of this invention includes (a) forming a CFx film, (b) forming a recess of a predetermined pattern on the CFx film, (c) providing a wiring layer so as to bury the recess and to cover the CFx film, and (d) removing the excess wiring layer on the CFx film other than in the recess by CMP (Chemical Mechanical Polishing), thereby exposing a surface of the CFx film, wherein (e) nitriding the surface of the CFx film is provided before or after (b).Type: ApplicationFiled: October 3, 2011Publication date: July 25, 2013Applicant: NATIONAL UNIVERSITY CORPORATION TOHOKU UNIVERSITYInventors: Tadahiro Ohmi, Xun Gu
-
Patent number: 8492879Abstract: On a surface of a semiconductor substrate, a plurality of terraces formed stepwise by an atomic step are formed in the substantially same direction. Using the semiconductor substrate, a MOS transistor is formed so that no step exists in a carrier traveling direction (source-drain direction).Type: GrantFiled: October 6, 2008Date of Patent: July 23, 2013Assignees: National University Corporation Tohoku University, Shin-Etsu Handotai Co., Ltd.Inventors: Tadahiro Ohmi, Akinobu Teramoto, Tomoyuki Suwa, Rihito Kuroda, Hideo Kudo, Yoshinori Hayamizu
-
Patent number: 8470144Abstract: An electrode device for an electrochemical sensor chip includes an insulation sheet having an insulating property and including a top surface and a bottom surface opposite to each other in a thickness direction, and electrode members having a conductivity and held by the insulation sheet in portions piercing the insulation sheet in a thickness direction, one ends of the electrode members located on the top surface side of the insulation sheet being connected to the analyte, other ends located on the bottom surface side of the insulation sheet being connected to the electrodes of the transducer, recesses for trapping the analyte being formed in the top surface of the insulation sheet so as to correspond to the electrode members, the one ends of the electrode members being exposed at a bottom of the recesses.Type: GrantFiled: December 5, 2011Date of Patent: June 25, 2013Assignees: Japan Aviation Electronics Industry, Limited, National University Corporation Tohoku UniversityInventors: Atsushi Suda, Tatsuo Kimura, Ryota Kunikata, Kosuke Ino, Tomokazu Matsue
-
Publication number: 20130156164Abstract: The present invention provides an evaluation aid which can be used as a phantom (imitation lesion) when a digital X-ray image thereof is taken and then evaluation is carried out through the digital X-ray image, and especially an evaluation aid which can be used for easily evaluating image qualities of a digital X-ray image for X-ray absorption parts having different X-ray absorption ratios at once. The evaluation aid of the present invention is adapted to be used for taking a digital X-ray image thereof through which evaluation is carried out, and contains a substrate (plate-like body) including a plurality of regions having different X-ray absorption ratios; and step members provided on the plate-like body so as to correspond to the plurality of regions, respectively, each step member including a plurality of subregions having different X-ray absorption ratios.Type: ApplicationFiled: July 26, 2011Publication date: June 20, 2013Applicants: MITAYA MANUFACTURING CO., LTD., NATIONAL UNIVERSITY CORPORATION, TOHOKU UNIVERSITYInventors: Koichi Chida, Yuji Kaga, Goro Yokouchi
-
Publication number: 20130154469Abstract: Provided is a cathode body that comprises a cylindrical cup 30 as a base member, a barrier layer 303 provided on a surface of the cylindrical cup 30 and containing SiC, and a film formed on a surface of the barrier layer 303 and containing a boride of a rare earth element and that can prevent interdiffusion of a constituent element of the base member and the boride.Type: ApplicationFiled: August 30, 2011Publication date: June 20, 2013Applicant: NATIONAL UNIVERSITY CORPORATION TOHOKU UNIVERSITYInventors: Tadahiro Ohmi, Tetsuya Goto, Hidekazu Ishii
-
Patent number: 8465719Abstract: A silicon carbide substrate has a high-frequency loss equal to or less than 2.0 dB/mm at 20 GHz is effective to mount and operate electronic components. The silicon carbide substrate is heated at 2000° C. or more to be reduced to the high-frequency loss equal to 2.0 dB/mm or less at 20 GHz. Moreover, manufacturing the silicon carbide substrate by CVD without flowing nitrogen into a heater enables the high-frequency loss to be reduced to 2.0 dB/mm or less.Type: GrantFiled: April 16, 2009Date of Patent: June 18, 2013Assignees: National University Corporation Tohoku University, Mitsui Engineering & Shipbuilding Co., Ltd.Inventors: Tadahiro Ohmi, Akinobu Teramoto, Sumio Sano, Fusao Fujita
-
Publication number: 20130140700Abstract: Provided is a method of manufacturing a TSV structure, which prevents a substrate from warping even if it is made thin. A method of manufacturing a semiconductor device comprises integrating semiconductor elements on a surface of a semiconductor substrate to form at least a part of a circuit, forming holes from the surface of the semiconductor substrate, forming an insulating film and a barrier film on an inner surface of each hole, forming a conductive metal on a surface of the barrier film to fill each hole, processing a back surface of the semiconductor substrate to reduce the thickness thereof to thereby protrude the conductive metal, and providing a SiCN film on the back surface of the semiconductor substrate.Type: ApplicationFiled: August 4, 2011Publication date: June 6, 2013Applicant: NATIONAL UNIVERSITY CORPORATION TOHOKU UNIVERSITYInventor: Tadahiro Ohmi
-
Publication number: 20130118568Abstract: It is an object of this invention to provide a photoelectric conversion member including a heat dissipation mechanism which is more excellent in heat dissipation characteristics than conventional mechanisms. A photoelectric conversion member 1 of this invention includes a first electrode layer 20, a power generation laminate 22, and a second electrode layer 26 formed on the power generation laminate 22 through a nickel layer 24. A passivation layer 28 made of a material containing SiCN is formed on the second electrode layer 26. On the passivation layer 28, a heat dissipation structure 31 is provided. The heat dissipation structure 31 contains 40 to 750 parts by mass of an expanded graphite powder (E) per 100 parts by mass of at least one type of polymer (S).Type: ApplicationFiled: July 22, 2011Publication date: May 16, 2013Applicant: NATIONAL UNIVERSITY CORPORATION TOHOKU UNIVERSITYInventors: Tadahiro Ohmi, Takurou Kumamoto
-
Publication number: 20130112337Abstract: A manufacturing method of a shower plate includes inserting a green body, a degreasing body, a temporary sintered body or a sintered body of a ceramic member, which has a plurality of gas discharge holes or gas flow holes, into a longitudinal hole of a green body, a degreasing body or a temporary sintered body of the shower plate, which has been formed by power ingredients; and sintering them simultaneously.Type: ApplicationFiled: December 28, 2012Publication date: May 9, 2013Applicants: NATIONAL UNIVERSITY CORPORATION TOHOKU UNIVERSITY, TOKYO ELECTRON LIMITEDInventors: Tokyo Electron Limited, National University Corporation Tohoku University
-
Patent number: 8425567Abstract: A spinal fixation titanium alloy rod fixes a plurality of spinal-fixing screws embedded and fixed in vertebrae of a human body. The rod is cylindrically shaped, has a sufficient length for coupling with the spinal-fixing screws, and has a diameter adjusted to 4 to 7 mm. In the titanium alloy constituting the rod, Nb content is 25 to 35 percent by weight, Ta content is such that the Nb content+0.8×Ta content ranges from 36 to 45 percent by weight, Zr content is 3 to 6 percent by weight, and the remainder is Ti and unavoidable impurities, excluding vanadium. The titanium alloy is manufactured by swaging processing at a cross-sectional reduction rate of at least 90%, and aging the swaged titanium alloy by heating at a temperature of 600 to 800K, preferably 700 to 800K, for 43.2 ks to 604.8 ks.Type: GrantFiled: December 10, 2010Date of Patent: April 23, 2013Assignees: Showa-Ika Kogyo Co. Ltd., National University Corporation Tohoku UniversityInventors: Mitsuo Niinomi, Masaaki Nakai, Kengo Narita
-
Patent number: 8420847Abstract: A novel bis-phosphate compound is provided which can be applied to a wide range of reactive substrates and reactions as an asymmetric reaction catalyst and can realize an asymmetric reaction affording a high yield and a high enantiomeric excess. The bis-phosphate compound has a tetraaryl skeleton represented by General Formula (1). In an asymmetric reaction, an amidodiene and an unsaturated aldehyde compound are reacted with each other in the presence of the optically active bis-phosphate compound to give an optically active amidoaldehyde. The invention allows a reaction such as an asymmetric Diels-Alder reaction to proceed efficiently, which has been difficult with conventional mono-phosphate compounds.Type: GrantFiled: March 8, 2011Date of Patent: April 16, 2013Assignees: National University Corporation Tohoku University, API CorporationInventors: Masahiro Terada, Norie Momiyama, Tohru Konno
-
Patent number: 8418714Abstract: A pressure type flow rate control apparatus is provided wherein flow rate of fluid passing through an orifice is computed as Qc=KP1 (where K is a proportionality constant) or as Qc=KP2m(P1?P2)n (where K is a proportionality constant, m and n constants) by using orifice upstream side pressure P1 and/or orifice downstream side pressure P2. A fluid passage between the downstream side of a control valve and a fluid supply pipe of the pressure type flow rate control apparatus comprises at least 2 fluid passages in parallel, and orifices having different flow rate characteristics are provided for each of these fluid passages, wherein fluid in a small flow quantity area flows to one orifice for flow control of fluid in the small flow quantity area, while fluid in a large flow quantity area flows to the other orifice for flow control of fluid in the large flow quantity area.Type: GrantFiled: June 22, 2006Date of Patent: April 16, 2013Assignees: Fujikin Incorporated, National University Corporation Tohoku University, Tokyo Electron Ltd.Inventors: Tadahiro Ohmi, Masahito Saito, Shoichi Hino, Tsuyoshi Shimazu, Kazuyuki Miura, Kouji Nishino, Masaaki Nagase, Katsuyuki Sugita, Kaoru Hirata, Ryousuke Dohi, Takashi Hirose, Tsutomu Shinohara, Nobukazu Ikeda, Tomokazu Imai, Toshihide Yoshida, Hisashi Tanaka
-
Publication number: 20130089979Abstract: A multilevel interconnect structure in a semiconductor device and methods for fabricating the same are described. The multilevel interconnect structure in the semiconductor device includes a first insulating layer formed on a semiconductor wafer, a Cu interconnect layer formed on the first insulating layer, a second insulating layer formed on the Cu interconnect layer, and a metal oxide layer formed at an interface between the Cu interconnect layer and the second insulating layer. The metal oxide layer is formed by immersion-plating a metal, such as Sn or Zn, on the Cu interconnect layer and then heat-treating the plated layer in an oxidizing atmosphere.Type: ApplicationFiled: October 2, 2012Publication date: April 11, 2013Applicants: NATIONAL UNIVERSITY CORPORATION TOHOKU UNIVERSITY, SEMICONDUCTOR TECHNOLOGY ACADEMIC RESEARCH CENTERInventors: Semiconductor Technology Academic Research, National University Corporation Tohoku University
-
Patent number: 8399862Abstract: When positively charged ions are implanted into a target substrate, charge-up damage may occur on the target substrate. In order to suppress charge-up caused by secondary electrons emitted from the target substrate when positively charged ions are implanted, a conductive member is installed at a position facing the target substrate and electrically grounded with respect to a high frequency. Further, a field intensity generated in the target substrate may be reduced by controlling an RF power applied to the target substrate in pulse mode.Type: GrantFiled: December 20, 2007Date of Patent: March 19, 2013Assignees: National University Corporation Tohoku University, Tokyo Electron LimitedInventors: Tadahiro Ohmi, Tetsuya Goto, Akinobu Teramoto, Takaaki Matsuoka
-
Publication number: 20130058823Abstract: A screw vacuum pump includes a male rotor, a female rotor, a stator, and a drive motor/motors. A screw gear portion of the male rotor, a screw gear portion of the female rotor, and the stator cooperatively form a gas working chamber. The stator has an inlet port and an outlet port. At least one of the male rotor and the female rotor has a rotor hollow portion which is opened on at least one end face side in a rotation-axis longitudinal direction of the male rotor and/or the female rotor. The drive motor is at least partially received in the rotor hollow portion.Type: ApplicationFiled: May 13, 2010Publication date: March 7, 2013Applicant: NATIONAL UNIVERSITY CORPORATION TOHOKU UNIVERSITYInventors: Tadahiro Ohmi, Isao Akutsu
-
Patent number: 8389867Abstract: For the purpose of providing a semiconductor element built-in type multilayered circuit board in which a semiconductor element is closely joined to a recess of an insulating substrate to effectively disperse heat generated from the semiconductor element through the insulating substrate at a working temperature region of the semiconductor element circuit board, to surely conduct an electrical connection of an electronic part such as semiconductor element or the like in a short wiring and to enable the high density mounting of semiconductor elements, miniaturization and increase of working speed, there is proposed a semiconductor element built-in type multilayered circuit board formed by laminating a plurality of semiconductor element built-in type boards each comprising an insulating substrate and a semiconductor element accommodated in a recess formed therein, characterized in that a difference between a linear expansion coefficient of the insulating substrate and a linear expansion coefficient of the semiconType: GrantFiled: September 29, 2006Date of Patent: March 5, 2013Assignees: Ibiden Co., Ltd., National University Corporation Tohoku UniversityInventors: Ryo Enomoto, Tadahiro Ohmi, Akihiro Morimoto