Abstract: A heterojunction bipolar transistor, having a structure in which a subcollector layer of a first conductive type having a higher doping concentration than a collector layer, a collector layer of the first conductive type, a base layer of the second conductive type, and an emitter layer of the first conductive type are deposited, in order, on a semi-insulating semiconductor substrate, and in which a hole barrier layer of semiconductor material with a band gap wider than that of the base layer is inserted between the base layer and the collector layer, so as to be in direct contact with the base layer.

Abstract: An interface circuit includes a first and a second input terminal, a first output transistor, a second output transistor, a first output controller for implementing control according to a voltage supplied to the first and the second input terminal so that a predetermined current appears at a control terminal of the first output transistor if the first output transistor is in saturated state and supplies a predetermined current to the control terminal of the first output transistor if the first output transistor is in shutoff state, and a second output controller for implementing control according to a voltage supplied to the first and the second input terminal so that a predetermined current appears at a control terminal of the second output transistor if the second output transistor is in saturated state and supplies a predetermined current to the control terminal of the second output transistor if the second output transistor is in shutoff state.

Abstract: A field effect transistor includes a source electrode (30) and a drain electrode (29) formed to be spaced apart from each other on a semiconductor substrate (2), a gate electrode (22) disposed between the source electrode (30) and the drain electrode (29), and a field plate electrode (24, 26) disposed via an insulating film (21) above the semiconductor substrate (2) in a region between the gate electrode (22) and the drain electrode (29), wherein a surface of the semiconductor substrate (2) is flat, and a distance between the semiconductor substrate (2) and the field plate electrode (24, 26) increases according as it goes along a direction from the gate electrode (22) towards the drain electrode (29). With this field effect transistor, the breakdown voltage BVdss is ensured; the chronological change in the set current is restrained; and the on-resistance of an amplifying element is reduced.

Abstract: A gain variable amplifier according to an embodiment of the present invention includes: an amplifier circuit amplifying an input signal with a variable gain; and a gain control circuit controlling the gain of the amplifier circuit based on a gain control signal, in which the amplifier circuit includes: an amplifying element amplifying the input signal; an output element series-connected with the amplifying element and outputting a signal amplified with the amplifying element; and a bias circuit changing a potential at a node between the output element and the amplifying element based on the gain control of the gain control circuit.

Abstract: A board for high frequency device includes a plurality of electrode terminals connected to an electronic component or another electronic circuit board by flowable conducting material such as solder, and grooves formed in an electrode terminal of the plurality of electrode terminals and capable of accumulating solder or the like. Specifically, a high frequency component is mounted on the front surface of the high frequency device board, and the plurality of electrode terminals are formed on the rear surface of the high frequency device board. A ground electrode terminal included in the plurality of electrode terminals is formed at the center of the rear surface of the high frequency device board and connected to a ground. The grooves for accumulating solder or the like are formed in the ground electrode terminal. This reduces the possibility of short-circuit between adjacent electrode terminals due to the flowable conducting material such as solder.

Abstract: A semiconductor device provided with a stabilized hollow structure. A semiconductor device 1 having a semiconductor chip 3 flip chip-mounted on a substrate 2 includes a plate-shaped member 4 arranged on a surface of the semiconductor chip 3 opposite to its flip chipped surface. The plate-shaped member is protruded more outwards than the lateral end faces of the semiconductor chip. A resin sheet 5 overlies a surface of the plate-shaped member opposite to its surface bonded to the semiconductor chip 3, and is bent onto the substrate 2 over an edge part of plate-shaped member 4, without being contacted with the semiconductor chip 3, until an edge part of the resin sheet gets to the substrate and is bonded there to the substrate.

Abstract: A bias circuit includes a voltage stabilizer connected between a control voltage input terminal through a current limit resistor and a ground, a bias supply emitter follower with a base connected to a node between the current limit resistor and the voltage stabilizer through a resistor, and a current limiter connected between the base and an emitter of the bias supply emitter follower.

Abstract: A semiconductor package has a base member made of a wiring board or a lead frame, a wall member fixed onto the base member to define a cavity, and a cured-resin cap member for encapsulating a semiconductor chip in the cavity. The curable-resin cap member is fixed onto the wall member by the curing process for the curable-resin cap member.

Abstract: In a photocurrent-to-voltage conversion apparatus for converting a photocurrent flowing through a light receiving element into a detection voltage, an amplifier, a feedback resistor and a clamping MOS transistor are provided. The amplifier has an input connected to the light receiving element and an output for generating the detection voltage, and includes (2n+1) inverter stages connected in series where n is 1, 2 . . . . The feedback resistor and the clamping transistor are connected between the output and input of the amplifier. The clamping MOS transistor is controlled by an output voltage of a non-final inverter one of the inverter stages.

Abstract: A semiconductor device includes a sub-collector layer, a collector layer, a base layer, an emitter layer, and an emitter cap layer, which are sequentially laminated on a substrate. It also includes an emitter electrode, a base electrode, and a collector electrode, which are respectively formed on the emitter cap layer, the base layer, and the sub-collector layer. The sub-collector layer is made up of a first sub-collector layer adjacent to the substrate and a second sub-collector layer adjacent to the collector layer. In the area between adjacent device elements, the first sub-collector layer has an element insulating region created by ion implantation, and the second sub-collector layer has a recess-shaped element insulating region.

Abstract: In an oscillation apparatus formed by a ring oscillator including an odd number of inverters (more than two inverters) connected in a ring, each of the inverters having one drive MOS transistor and one load MOS transistor, a constant voltage generating circuit is adapted to generate a constant voltage corresponding to a threshold voltage of the drive MOS transistor, and a voltage-to-current converting circuit is adapted to convert the constant voltage into load currents. Each of the load currents flows through the load MOS transistor of one of the inverters.

Abstract: In a phase locked loop type frequency synthesizer including a phase/frequency comparator for receiving an input signal, a charge pump circuit, a loop filter for generating a control voltage, a voltage control oscillator block including a plurality of voltage controlled oscillators controlled by the control voltage, and a frequency divider formed by a fixed frequency divider and a programmable frequency divider, a selecting circuit selects and activates only one of the voltage controlled oscillators, and counts a number of output pulses of the first frequency divider within a predetermined number of output pulses of the input signal while applying a bias voltage to the loop filter. Thus, the one of the voltage controlled oscillators being selected so that the number of the output pulses of the first frequency divider is brought close to an optimum value.

Abstract: In a signal determining apparatus including an amplifier circuit adapted to receive and amplify an input signal to generate an output voltage, and a comparator adapted to compare the output voltage of the amplifier circuit with a reference voltage to generate an output signal, the amplifier circuit has variable response speed characteristics so that a response speed of the amplifier circuit is controlled during its amplifying operation.

Abstract: A package includes: a substrate having a ridged peripheral portion and a center portion defined by and lower in level than the ridged peripheral portion. A semiconductor chip is mounted on the center portion. A plurality of lead is electrically coupled to the semiconductor chip and penetrates the substrate outwardly from the center portion. The package also includes a cap deeming a cavity space which accommodates the semiconductor chip. The cap has a cap bonding face bonded with a substrate bonding face of the ridged peripheral portion. The cap bonding face and the substrate bonding face are higher in level than the center portion.

Abstract: An electronic product comprises a heat radiating plate, an electronic component securely mounted on the heat radiating plate and including a high power transistor, an enveloper including a frame member securely associated with the heat radiating plate to encompass the electronic component, and a lid member securely attached to an upper opening end of the frame member, thereby accommodating and sealing the electronic component in the enveloper, and at least one electrically conductive element passing and extending through the frame member. The frame member is made of a suitable resin material, and the lid member is made of one material selected from the group consisting of a ceramic material, a metal material, and a composite material.

Abstract: An image rejection mixer of reduced power dissipation includes a signal distributor supplied with local signals having a phase difference to distribute the local signals, a first and a second signal mixer for mixing the distributed local signals and RF signals having a phase difference and outputting respective IF current signals, a phase shifter for shifting in phase the respective mixed IF current signals so as to provide them with a relative phase difference of 90 degrees, and a signal adder for adding the respective phase shifted intermediate frequency current signals. The shifter shifts the phases of the respective IF current signals outputted from the first and the second signal mixers.

Abstract: The isolator includes a photodiode (first photodiode), a first and a second amplifier, and a carrier discharging circuit. The photodiode is an input element that converts an optical signal input from an LED (signal source) into an electrical signal, and outputs the electrical signal to the first amplifier. The first amplifier includes two bipolar transistors, and amplifies the electrical signal output by the photodiode. The first amplifier also includes three resistances, one of which is a feedback resistance. The second amplifier has a similar structure to that of the first amplifier. The carrier discharging circuit is connected to the base of the bipolar transistor in the first amplifier and to the base of the bipolar transistor in the second amplifier, so as to discharge, when the photodiode turns off, a carrier accumulated in these bases when the photodiode PD1 is on.

Abstract: A phase shifter with a low insertion loss in which impedance miss-matching at a point in rear of a high-pass filter or a low-pass filter in the signal flow direction is reduced and difference in insertion loss or phase shifting error across a high-pass filter- low-pass filter is suppressed. A single pole double throw switch, provided on the input side, and another single pole double throw switch, provided on the output side and operatively linked to the single pole double throw switch, are changed over between a low-pass filter and a high-pass filter.

Abstract: The semiconductor device comprises: a semiconductor substrate (N+ substrate 110) containing a first conductivity type impurity implanted therein; a second conductivity type impurity-implanted layer (P+ implanted layer 114) at relatively high concentration, formed on the semiconductor substrate (N+ substrate 110); a second conductivity type impurity epitaxial layer (P? epitaxial layer 111) at relatively low concentration, formed on the second conductivity type impurity-implanted layer (P+ implanted layer 114); and a field effect transistor 100 (N-channel type lateral MOSFET 100)composed of a pair of impurity diffusion regions (N+ source diffusion layer 115 and N? drain layer 116) provided in the second conductivity type impurity epitaxial layer (P? epitaxial layer 111) and a gate electrode 117 provided over a region sandwiched with the pair of impurity diffusion regions (N+ source diffusion layer 115 and N? drain layer 116).

Abstract: A semiconductor device includes (a) a printed wiring board, (b) a semiconductor chip mounted on the printed wiring board, (c) a molded resin formed on the printed wiring board, covering the semiconductor chip therewith, and (d) at least one metal wiring formed on the printed wiring board and extending externally beyond the molded resin. The metal wiring is plated with a metal having a small adhesion force with the molded resin. An interfacial surface between the metal and the molded resin acts as a path through which moisture contained in the semiconductor device escapes outside when the semiconductor device is heated.