Abstract: A Schottky gate FET including a gate electrode having a gate extension, a drain electrode and a drain contact layer overlying a semi-insulating substrate, wherein the gate extension overlies at least part of the drain electrode and the drain contact layer. The vertical overlapping between the gate extension and the drain contact region prevents the current reduction to make the circuit module mounting the Schottky gate FET non-usable.

Abstract: A semiconductor device includes a low resistance semiconductor substrate, a high resistance semiconductor layer formed on the substrate, an insulation layer formed on the semiconductor layer, and a transistor element composed of a collector region, abase region, and an emitter region formed in the semiconductor layer. The device further includes an emitter electrode formed in the insulation layer to be connected to the emitter region, a sub-emitter electrode formed in the insulation layer connected to the emitter electrode, a low resistance impurity-diffusion region formed in the semiconductor layer such that the sub-emitter electrode is connected to the substrate through the impurity-diffusion region, a base electrode formed in the insulation layer to be connected to the base region, and a base-bonding pad formed on the insulation layer to be connected to-the base electrode.

Abstract: A high power semiconductor device comprising a heat sink on which a semiconductor element is mounted, and a sidewall which is attached onto the heat sink and which surrounds the semiconductor element. One of the heat sink and the sidewall has a plurality of projections formed on a joining surface thereof to be joined to an opposing surface of the other one of the heat sink and the sidewall. A gap is formed by the projections between the sidewall and the heat sink when the sidewall is disposed on the heat sink. The sidewall and the heat sink are joined together by thermally curing low elasticity liquid resin which fills at least the gap formed by the projections between the sidewall and the heat sink. The projections are formed, for example, on the heat sink.

Abstract: A wavelength stabilizing unit includes a wavelength filter 31 and an optical detector 4, which are mounted on a substrate 71, and housed in a casing 91. The optical detector 4 includes a first photoelectric conversion element 5, which directly receives an emitted light from an end portion (emitting point 58) of an optical fiber 14 guided into the casing 91 and converts it into an electric signal A, and a second photoelectric conversion element 6, which receives light passed through the wavelength filter 31 and converts it into an electric signal B. The electric signals A and B are supplied to an operation circuit 8. The wavelength filter 31 has side faces, which are machined such that they do not cross a straight line connecting the emitting point 58 and an edge of an incident surface 311 of the wavelength filter.

Abstract: A semiconductor device includes an insulating substrate having a first main face which is sealed with a sealing material and at least a set of input and output electrode patterns provided on the first main face. The input and output electrode patterns are separated from each other. The device also includes at least a ground electrode pattern having a ground potential. The ground electrode pattern is separated from the input and output electrode patterns. The device further includes at least an electrically conductive pattern extending over an inter-region between the input and output electrode patterns. The electrically conductive pattern is separated from the input and output electrode patterns, and the electrically conductive pattern is electrically connected to the ground electrode pattern, so that the electrically conductive pattern has a ground potential.

Abstract: In a semiconductor laser diode module including a semiconductor laser diode having a front facet for emitting a light beam, a collimating lens for receiving the light beam to generate a collimated light beam and a coupling lens for receiving the collimated light beam and converging the collimated light beam to an optical fiber, a bandpass filter is provided for receiving a first part of the collimated light beam, and a light detector is provided to have a first portion for receiving the first part of the collimated light beam through the bandpass filter and a second portion for receiving a second part of the collimated light beam. Thus, a wavelength of the semiconductor laser diode is controlled in accordance with an output signal of the first portion of the light detector, and a light intensity of the semiconductor laser diode is controlled in accordance with an output signal of the second portion of the light detector.

Abstract: A Schottky barrier field effect transistor has a gate electrode formed with a field plate in order to achieve a high withstanding voltage, where the thickness of the dielectric layer between the channel layer and the field plate, the distance between the Schottky contact and the drain and the length of the field plate falls within the range of 300 nanometers to 600 nanometers thick, the range from 800 nanometers to 3000 nanometers long and the range of the distance between the Schottky contact and the drain is plus or minus 400 nanometers, respectively, so that the distortion and the return-loss are improved without sacrifice of the withstanding voltage.

Abstract: A lid-member holder is used to define envelopers encapsulating electronic components in production of hollow-package type electronic products. A plurality of lid members are temporarily held by the holder body. The lid members are arranged so as to be consistent with an arrangement of surrounding wall members, which are to be sealed with the lid members in a lump to define the envelopers, and the temporary holding of the lid members by the holder body is realized such that lid members can be separated from the lid members after the surrounding wall members are completely sealed with the lid members, without the lid members being removed from the surrounding wall members.

Abstract: A first semiconductor laser element and a second semiconductor laser element are arranged on an identical block, a first electrode of the first semiconductor laser element is in direct contact with the block, and heat radiating effect is high. A second electrode of the second semiconductor laser element is arranged on an insulating dielectric layer, and the block and second semiconductor laser element are electrically insulated. Therefore, irrespective of the material to compose the block, the first semiconductor laser element and the second semiconductor laser element can be independently driven. In addition, the light emitting point distance between the first semiconductor laser element and second semiconductor laser element is limited only by the distance between the electrodes of the respective semiconductor lasers and the positions of light emitting points on the semiconductor laser chip end face and can, therefore, be made as short as possible.

Abstract: A semiconductor laser device includes an active layer and first and second current blocking layers having aligned stripe openings for injecting operating current into the active layer in a current injection area. The second current blocking layer has another opening, through which the first current blocking layer contacts an external cladding layer, in the vicinity of the emission facet of the laser cavity to form a current non-injection area. The first current blocking layer and the external cladding layer have a substantially equal refractive index.

Abstract: A method for forming a self-aligned bipolar transistor includes the steps of combination etching a silicon substrate in an opening to form a concave surface on the silicon substrate, and forming an intrinsic base and an associated emitter on the concave surface. The combination etching includes an isotropic etching and subsequent wet etching. The concave surface increases the distance between the external base for the intrinsic base and the emitter to thereby increase the emitter-base breakdown voltage.

Abstract: The present invention enables reduction of a film thickness of a protection film so as to eliminate destruction caused by stress of the protection film; to increase a film thickness of an organic insulation film so as to exhibit the function of the organic insulation film sufficiently; and to reduce irregularities of the protection film thickness. In the organic insulation film 18 formation method according to the present invention, an organic insulation film 18, a protection film 20, and a metal film are successively formed in this order on a substrate 10. On the metal film, a patterned photo-resist is formed so as to be used as a mask for etching the metal film. The remaining metal film is used as a mask when etching the protection film 20 and the organic insulation film 18. The protection film 20 can significantly reduce its thickness because the protection film 20 need not be used as a mask. The organic insulation film 18 can be set to an arbitrary thickness regardless of the protection film 20.

Abstract: Circuit diagram data having repeated patterns is divided by the process of group dividing into main patterns and replicated patterns, relations of each of the patterns are held as group composition information, replicated pattern layout data corresponding to replicated patterns is made by copying the main pattern layout data corresponding to the main patterns made by a net driven layout editor, and the process of offset arrangement which involves shifting the coordinates of the replicated pattern layout data is performed, thereby making it possible to arrange the replicated pattern layout data on the same hierarchical level as the main pattern layout data and to make layout data with the flat circuit diagram data kept as it is.

Abstract: An optical semiconductor device includes: an insulating base; and a lead structure which further includes: a flange supported on a first surface of the insulating base; at least a first type lead supported by the insulating base; at least an island for mounting at least an optical semiconductor element thereon, which is electrically connected to the at least first type lead; and at least a connection part extending between the at least island and the flange. The flange, the at least connection part, and the at least island comprise a single united part of the lead structure. The flange, the at least connection part, the at least island, and the at least first type lead comprise a same conductive material.

Abstract: A semiconductor apparatus comprising: a semiconductor substrate; a first surface of the semiconductor substrate on which a semiconductor device is formed; a second surface opposite to the first surface of the semiconductor substrate; a via hole penetrating through the semiconductor substrate from the first surface to second surface; an electrode, provided on the second surface, connecting to the via hole; wherein the electrode having a barrier layer for preventing any diffusion of a soldering material into the via hole.

Abstract: A semiconductor device of the present invention includes a systematic structure layer of first conductivity type and having a systematically arranged structure. The systematic structure layer is formed on a collector contact layer of first conductivity type, which is connected to collector electrodes. A compensation layer of first conductivity type is formed on the systematic structure layer. A collector layer of first conductivity type is formed on the compensation layer. A base layer is formed on the collector layer and connected to base electrodes. An emitter layer is formed on the base electrode and connected to an emitter electrode. The semiconductor device reduces collector resistance and thereby improves reliability.

Abstract: A matrix switch device comprises a semiconductor integrated circuit chip comprising a 2×2 matrix switch having two input terminals and two output terminals and an SPDT switch at a stage subsequent to the 2×2 matrix switch, the SPDT switch having two input terminals and one output terminal, wherein electrical connection is performed between one of the output terminals of the 2×2 matrix switch and one of the input terminals of the SPDT switch, and wherein the two input terminals and the other of said output terminals of the 2×2 matrix switch, and the other input terminal and the output terminal of the SPDT switch are led out of the semiconductor integrated circuit chip.

Abstract: In a semiconductor switch apparatus including an input terminal, an output terminal, an AC ground terminal, a DC ground terminal, at least one series MOS transistor connected between the input terminal and the output terminal, and at least one shunt MOS transistor connected between one of the input terminal and the output terminal and the AC ground terminal, the series MOS transistor is formed within a first region of a semiconductor layer on a silicon-on-insulator configuration surrounded by a first trench insulating layer, and the shunt MOS transistor is formed within a second region of the semiconductor layer surrounded by a second trench insulating layer.

Abstract: In a gain-controlled amplifier, first, second and third transistors are provided, and a signal at one of input and output terminals is compared with a threshold voltage. When the compared signal is lower than the threshold, the second and third transistors are respectively turned into conducting and non-conducting states, and when the compared signal is higher than the threshold, the situation is in reverse. When the third transistor is non-conducting, the first and second transistors are configured to form a cascode amplifier between the input and output terminals to produce a low-noise, high-gain output signal. When the second transistor is non-conducting, the first and third transistors are configured so that the third transistor forms a base-grounded amplifier between the input and output terminals and the first transistor forms a diode for supplying a DC bias current to the third transistor to produce a low-distortion, low-gain output signal.

Abstract: In a semiconductor device having a semiconductor substrate, an internal electrode layer is formed on the semiconductor substrate. A barrier metal layer is formed on the internal electrode. An external electrode layer is formed on the barrier metal layer. A pad electrode is made of the internal electrode layer, the barrier metal layer, and the external electrode layer. A wire is electrically connected to the pad electrode. An area of the external electrode layer is set midway between an area of a polymerization portion of the wire on the pad electrode and a planar area of the barrier metal layer.