Abstract: Performing optical proximity correction (OPC) is typically done during a critical time, wherein even small delays in finishing OPC can have significant adverse effects on product introduction and/or market exposure. In accordance with one feature of the invention, sets of repeating structures in library elements and/or layout data can be identified during a non-critical time, e.g. early in cell library development, possibly years prior to the direct application of OPC to a final layout. OPC can be performed on repeating structures during this non-critical time. Later, during the critical time (e.g. during tape out), an OPC tool can use the pre-processed structures in conjunction with a chip layout to more quickly generate a modified layout, thereby saving valuable time as a chip moves from design to production.

Abstract: A photolithographic mask used for defining a layer in an integrated circuit, or other work piece, where the layer comprises a pattern including a plurality of features to be implemented with phase shifting in phase shift regions is laid out including for patterns comprising high density, small dimension features, and for “full shift” patterns. The method includes identifying cutting areas for phase shift regions based on characteristics of the pattern. Next, the process cuts the phase shift regions in selected ones of the cutting areas to define phase shift windows, and assigns phase values to the phase shift windows. The phase shift values assigned comprise &phgr; and &thgr;, so that destructive interference is caused in transitions between adjacent phase shift windows having respective phase shift values of &phgr; and &thgr;. In the preferred embodiment, &phgr; is equal to approximately &thgr;+180 degrees.

Abstract: Printing very small features on a wafer may require optimizing an illumination configuration in the lithographic imaging system. In a conventional system, an aperture provides only one illumination configuration. In contrast, a programmable aperture can ensure that each mask design is printed using its optimized illumination configuration while minimizing the amount of hardware in the system. The programmable aperture can include a grid of pixels, wherein each pixel can be controlled to provided a predetermined light state. Once installed, the programmable aperture can provide any number of illumination configurations, thereby eliminating the expense of fabricating, testing, and repairing multiple apertures as well as the time associated with installing those multiple apertures.

Abstract: A method for manufacturing integrated circuits using opaque field, phase shift masking. One embodiment of the invention includes using a two mask process. The first mask is an opaque-field phase shift mask and the second mask is a single phase structure mask. A phase shift window is aligned with the opaque field using a phase shift overlap area on the opaque field. The phase shift mask primarily defines regions requiring phase shifting. The single phase structure mask primarily defines regions not requiring phase shifting. The single phase structure mask also prevents the erasure of the phase shifting regions and prevents the creation of undesirable artifact regions that would otherwise be created by the phase shift mask.

Abstract: When substantially all of a layout for a layer of material in an integrated circuit (IC) is being defined using a phase shifting mask, the complementary mask used to define the remaining features and edges can be improved if some of the cuts on the complementary mask are substantially 180-degrees out of phase with one another. This helps cuts that are close to one another to print better and prevents undesirable deterioration of the features printed using the phase mask. Additionally, (semi-)isolated cuts can be reinforced with assist bars to ensure that the cut clears the unexposed regions left by phase conflicts.

Abstract: A method for defining a full phase layout for defining a layer of material in an integrated circuit is described. The method can be used to define, arrange, and refine phase shifters to substantially define the layer using phase shifting. Through the process, computer readable definitions of an alternating aperture, dark field phase shift mask and of a complimentary mask are generated. Masks can be made from the definitions and then used to fabricate a layer of material in an integrated circuit. The separations between phase shifters, or cuts, are designed for easy mask manufacturability while also maximizing the amount of each feature defined by the phase shifting mask. Cost functions are used to describe the relative quality of phase assignments and to select higher quality phase assignments and reduce phase conflicts.

Abstract: Image intensity imbalance created by a phase shifting mask (PSM) layout can be corrected using a near-field image. Because an aerial image is not used, various parameters associated with the exposure conditions and stepper need not be considered, thereby significantly simplifying the computations to determine the appropriate correction. Of importance, using the near-field image can provide substantially the same correction generated using the aerial image. Thus, using the near-field image can provide an accurate and quick correction for image intensity imbalance between shifters of different phases. After correcting for the image intensity imbalance, additional proximity correction techniques can be applied to the layout to correct for other effects.

Abstract: One embodiment of the invention provides a system that facilitates exposing a wafer through at least two masks during an integrated circuit manufacturing process. The system includes a radiation source and two or more illuminators. Each of these illuminators receives radiation from the radiation source, and uses the radiation to illuminate a reticle holder. The radiation that passes through each reticle holder is then combined in an optical combiner, before passing through an imaging optics, which projects the combined radiation onto a semiconductor wafer.

Abstract: One embodiment of the invention provides a system that performs optical proximity correction in a manner that accounts for properties of a mask writer that generates a mask used in printing an integrated circuit. During operation, the system receives an input layout for the integrated circuit. The system also receives a set of mask writer properties that specify how the mask writer prints features. Next, the system performs an optical proximity correction process on the input layout to produce an output layout that includes a set of optical proximity corrections. This optical proximity correction process accounts for the set of mask writer properties in generating the set of optical proximity corrections, so that the mask writer can accurately produce the set of optical proximity corrections.

Abstract: Techniques for fabricating a device include forming a fabrication layout, such as a mask layout, for a physical design layer, such as a design for an integrated circuit, and identifying evaluation points on an edge of a polygon corresponding to the design layer for correcting proximity effects. Techniques include selecting from among all edges of all polygons in a proposed layout a subset of edges for which proximity corrections are desirable. The subset of edges includes less than all the edges. Evaluation points are established only for the subset of edges. Corrections are determined for at least portions of the subset of edges based on an analysis performed at the evaluation points. Other techniques include establishing a projection point on a first edge corresponding to the design layout based on whether a vertex of a second edge is within a halo distance. An evaluation point is determined for the first edge based on the projection point and characteristics of the first edge.

Abstract: A method for defining a full phase layout for defining a layer of material in an integrated circuit is described. The method can be used to define, arrange, and refine phase shifters to substantially define the layer using phase shifting. Through the process, computer readable definitions of an alternating aperture, dark field phase shift mask and of a complimentary mask are generated. Masks can be made from the definitions and then used to fabricate a layer of material in an integrated circuit. The separations between phase shifters, or cuts, are designed for easy mask manufacturability while also maximizing the amount of each feature defined by the phase shifting mask. Cost functions are used to describe the relative quality of phase assignments and to select higher quality phase assignments and reduce phase conflicts.

Abstract: A method for defining a full phase layout for defining a layer of material in an integrated circuit is described. The method can be used to define, arrange, and refine phase shifters to substantially define the layer using phase shifting. Through the process, computer readable definitions of an alternating aperture, dark field phase shift mask and of a complimentary mask are generated. Masks can be made from the definitions and then used to fabricate a layer of material in an integrated circuit. The separations between phase shifters, or cuts, are designed for easy mask manufacturability while also maximizing the amount of each feature defined by the phase shifting mask. Cost functions are used to describe the relative quality of phase assignments and to select higher quality phase assignments and reduce phase conflicts.

Abstract: To exam mask defect impact during the transfer of a mask pattern to a wafer layer, tools can use mask images obtained during mask inspection. Specifically, these tools can also use optical models of such mask images to simulate wafer images. However, when feature sizes become very small, optical models may not provide sufficiently accurate simulation results. Using a photoresist model would yield significantly more accurate simulation results than using an optical model. Unfortunately, resist modeling is very slow, thereby making it commercially impractical. A simulation tool can generate a simulated wafer image having the accuracy of a photoresist model with the speed of an optical model by using a threshold look-up table. In one embodiment, the threshold look-up table could include variables such as feature size, pitch size, feature type, and defect type.

Abstract: Shifters on a phase shifting mask (PSM) can be intelligently assigned their corresponding phase. Specifically, the phase of a shifter can be assigned based on simulating the contrast provided by each phase for that shifter. The higher the contrast, the better the lithographic performance of the shifter. Therefore, the phase providing the higher contrast can be selected for that shifter. To facilitate this phase assignment, a pre-shifter can be placed relative to a feature on the layout. The pre-shifter can then be divided into a plurality of shifter tiles for contrast analysis. Model-based data conversion allows for a comprehensive solution including both phase assignment as well as optical proximity correction.

Abstract: A method extends the use of phase shift techniques to complex layouts, and includes identifying a pattern, and automatically mapping the phase shifting regions for implementation of such features. The pattern includes small features having a dimension smaller than a first particular feature size, and at least one relatively large feature, the at least one relatively large feature and another feature in the pattern having respective sides separated by a narrow space. Phase shift regions are laid out including a first set of phase shift regions to define said small features, and a second set of phase shift regions to assist definition of said side of said relatively large feature. An opaque feature is used to define the relatively large feature, and a phase shift region in the second set is a sub-resolution window inside the perimeter of the opaque feature.

Abstract: Techniques provided for fabricating a device include forming a fabrication layout, such as a mask layout, for a physical design layer, such as a design for an integrated circuit, and identifying evaluation points on an edge of a polygon corresponding to the design layer for correcting proximity effects. Included are techniques that correct for proximity effects associated with an edge in a layout corresponding to the design layer.

Abstract: Mask shops typically use carbon to repair any clear defects identified on a mask, irrespective of the type of mask. However, carbon can have different characteristics than the original patterning material on the mask. Therefore, a mask that is repaired using carbon may not optically perform as if it were defect-free. An automated method of repairing a clear defect on an attenuated phase shifting mask (PSM) provides an optimized plug size/shape. In this method, a repair solution to the clear defect can be simulated, thereby allowing the repair decision for an attenuated PSM to be advantageously made at the same time that inspection is done and before actual repair. Simulation can include performing model-based OPC on the repair solution.

Abstract: A two-dimensional yield map for a device, such as an integrated circuit, in a fabrication facility is computed and associated with layout data for the device in a hierarchical and/or instance-based layout file. The device has a layout including a pattern characterizable by a combination of members of a set of basis shapes. A set of basis pre-images include yield map data representing an interaction of respective members of the set of basis shapes with a defect model. A yield map for the pattern is created by combining basis pre-images corresponding to basis shapes in the combination of members that characterize the pattern to provide a combination result. The output may be displayed as a two dimensional map to an engineer performing yield analysis, or otherwise processed.

Abstract: One embodiment of the present invention provides a system that controls rippling caused by optical proximity correction during an optical lithography process for manufacturing an integrated circuit. During operation, the system selects an evaluation point for a given segment, wherein the given segment is located on an edge in the layout of the integrated circuit. The system also selects a supplemental evaluation point for the given segment. Next, the system computes a deviation from a target location for the given segment at the evaluation point. The system also computes a supplemental deviation at the supplemental evaluation point. Next, the system adjusts a bias for the given segment, if necessary, based upon the deviation at the evaluation point. The system also calculates a ripple for the given segment based upon the deviation at the evaluation point and the supplemental deviation at the supplemental evaluation point.

Abstract: One embodiment of the invention provides a system that creates a phase-shifting mask for a photolithographic process used in fabricating an integrated circuit. The system starts by receiving a layout for the integrated circuit. The system then associates nodes with features in the layout, and generates arcs between the nodes. Next, the system generates a coloring for the nodes using two colors. The system then generates phase shifters for the phase-shifting mask and assigns different phases to the phase shifters based upon the coloring of the nodes.