Patents Assigned to NVidia
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Patent number: 8918440Abstract: Methods and systems for decompressing data are described. The relative magnitudes of a first value and a second value are compared. The first value and the second value represent respective endpoints of a range of values. The first value and the second value each have N bits of precision. Either the first or second value is selected, based on the result of the comparison. The selected value is scaled to produce a third value having N+1 bits of precision. A specified bit value is appended as the least significant bit of the other (non-selected) value to produce a fourth value having N+1 bits of precision.Type: GrantFiled: December 13, 2011Date of Patent: December 23, 2014Assignee: NVIDIA CorporationInventors: Douglas H. Rogers, Gary C. King, Walter E. Donovan
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Patent number: 8917760Abstract: The invention provides a method of manufacturing a user equipment comprising a wireless modem, a method of activating a user equipment as a wireless modem, and a corresponding server and user equipment. A processor is produced for executing wireless modem code to operate the processor as a wireless modem, the processor having a writeable, non-volatile memory for storing the wireless modem code but being produced with at least a substantive portion of said wireless modem code not installed on said memory or otherwise, thus rendering the processor inoperative as a wireless modem. The processor is assembled into a user equipment and supplied to an end-user still without the substantive portion of wireless modem code installed. In response to an indication from the end-user requesting activation of the user equipment as a wireless modem, at least said substantive portion of wireless modem code is then distributed to the end-user for installation on the memory the user equipment's processor.Type: GrantFiled: April 13, 2010Date of Patent: December 23, 2014Assignee: Nvidia CorporationInventor: Nigel Toon
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Publication number: 20140373024Abstract: One aspect of the disclosure provides an embodiment of a method of processing data in a processor in a shared resource computer system, where a processing module shares at least one resource with at least one other processing module. The method, implemented by a processor, comprises receiving a resource allocation for executing code and monitoring a resource related condition of the processor in the execution of the code at a current resource level. The method further comprises recognizing a resource constraint when the resource allocation is insufficient to meet real time constraints for executing the code at the current resource level and modifying operation of the processor responsive to recognizing the resource constraint to execute the code to meet the real time constraints at a cost of increased power consumption or reduced quality of output.Type: ApplicationFiled: June 14, 2013Publication date: December 18, 2014Applicant: NVIDIA CorporationInventors: Tom Watts, Pete Cummings, Mark Van Nostrand
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Publication number: 20140371890Abstract: A method includes implementing an audio framework to be executed on a data processing device with a virtual audio driver component and a User Mode Component (UMC) communicatively coupled to each other. The virtual audio driver component enables modifying an original default audio endpoint device of an application executing on the data processing device to an emulated audio device associated with a new audio endpoint in response to an initiation through the application in conjunction with the UMC. The virtual audio driver component also enables registering the new audio endpoint as the modified default audio endpoint with an operating system executing on the data processing device. Further, the virtual audio driver component enables capturing audio data intended for the original default audio endpoint device at the new audio endpoint following the registration thereof to enable control of the audio data.Type: ApplicationFiled: June 17, 2013Publication date: December 18, 2014Applicant: NVIDIA CorporationInventor: Ambrish Dantrey
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Publication number: 20140369613Abstract: A method includes determining, through a processor and/or a hardware engine, edge pixels and flat pixels of a video frame of a video sequence during decoding thereof or post-processing associated with the decoding based on a predetermined threshold, and quantifying spatial correlation of pixels of the video frame around edges thereof to estimate strength of ringing artifacts and spatial and temporal persistence thereof across the video frame and across video frames of the video sequence. The method also includes adaptively and spatially filtering the pixels around the edges of the video frame, adaptively and temporally filtering the video frame, and blending an output of the adaptive spatial filtering and the adaptive temporal filtering to generate an output with suppressed ringing artifacts, spatial and temporal persistence thereof and artifacts resulting from the cumulative effect of compression therein.Type: ApplicationFiled: June 14, 2013Publication date: December 18, 2014Applicant: NVIDIA CorporationInventors: Niranjan Avadhanam, Ravi Kumar Boddeti
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Publication number: 20140368508Abstract: A method includes tracking, through a processor of a data processing device in conjunction with a number of sensors, a movement of an eye of a user of the data processing device onscreen on a display unit associated therewith. The processor is communicatively coupled to a memory. The method also includes determining, through the processor, a portion of a video data being rendered onscreen on the display unit on which the eye of the user is focused based on the sensed movement of the eye. Further, the method includes rendering, through the processor, the portion of the video data on the display unit at an enhanced level compared to other portions thereof following the determination of the portion of the video data.Type: ApplicationFiled: June 18, 2013Publication date: December 18, 2014Applicant: NVIDIA CorporationInventor: Trilok Chander Kunchakarra
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Publication number: 20140373005Abstract: A method includes executing a driver component on a hypervisor of a computing platform including a graphics processing unit (GPU) executing a number of engines thereon, and executing an instance of the driver component in each of a number of VMs consolidated on the computing platform. The method also includes defining, through the hypervisor, a data path between a VM and a subset of the engines of the GPU in a configuration register associated with the VM in accordance with a requirement of an application executing on the VM, and reading, through the instance of the driver component in the VM, an emulated version of the configuration register during loading thereof. Further, the method includes limiting one or more processing functionalities provided to the VM based on solely exposing the subset of the engines to the application in accordance with the data path definition in the configuration register.Type: ApplicationFiled: June 12, 2013Publication date: December 18, 2014Applicant: NVIDIA CorporationInventors: Ankit R. Agrawal, Bibhuti Bhusban Narayan Prusty, Surath Raj Mitra
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Publication number: 20140369554Abstract: A face beautification system and a method of face beautification. On embodiment of the face beautification system includes: (1) a coarse feature detector configured to generate an approximation of facial features in an image, (2) an edge-preserving filter configured to reduce distortions in the approximation, and (3) a feature enhancer operable to selectively filter a facial feature from said approximation and carry out an enhancement.Type: ApplicationFiled: September 19, 2013Publication date: December 18, 2014Applicant: Nvidia CorporationInventors: Elif Albuz, Colin Tracey, Navjot Garg, Yun-Ta Tsai, Dawid Pajak
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Patent number: 8913653Abstract: An equalization parameter analyzer includes a parameter section configured to acquire at least one current parameter for a wireless receiver and an analyzer section configured to compare the at least one current parameter with at least one corresponding previous parameter. Additionally, the equalization parameter analyzer also includes a coefficients section configured to initiate a generation of new equalizer coefficients in the wireless receiver based on a change between the at least one current and corresponding previous parameters that exceeds a predefined threshold. A method of equalization coefficients generation is also provided.Type: GrantFiled: September 19, 2012Date of Patent: December 16, 2014Assignee: Nvidia CorporationInventors: Vishwambhar Rathi, Carlo Luschi
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Publication number: 20140362074Abstract: A system, method, and computer program product are provided for splitting primitives. A plurality of primitives is received for a scene and a pre-determined plane that intersects the scene is identified. Bounding volumes of the plurality of primitives that are intersected by the pre-determined plane are split, where a bounding volume that encloses each intersected primitive of the plurality of primitives is split into a first bounding volume and a second bounding volume at an intersection of the bounding volume and the pre-determined plane.Type: ApplicationFiled: September 24, 2013Publication date: December 11, 2014Applicant: NVIDIA CorporationInventors: Tero Tapani Karras, Timo Oskari Aila
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Publication number: 20140365529Abstract: A system, method, and computer program product are provided for modifying a hierarchical tree data structure. An initial hierarchical tree data structure is received, and treelets of node neighborhoods are formed. A processor restructures the treelets using agglomerative clustering to produce an optimized hierarchical tree data structure that includes at least one restructured treelet, where each restructured treelet includes at least one internal node.Type: ApplicationFiled: October 28, 2013Publication date: December 11, 2014Applicant: NVIDIA CorporationInventors: Timo Oskari Aila, Tero Tapani Karras
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Publication number: 20140365532Abstract: A system, method, and computer program product are provided for modifying a hierarchical tree data structure. An initial hierarchical tree data structure is received and treelets of node neighborhoods in the initial hierarchical tree data structure are formed. Each treelet includes n leaf nodes and n?1 internal nodes. The treelets are restructured, by a processor, to produce an optimized hierarchical tree data structure.Type: ApplicationFiled: August 19, 2013Publication date: December 11, 2014Applicant: NVIDIA CorporationInventors: Tero Tapani Karras, Timo Oskari Aila
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Publication number: 20140362296Abstract: A method includes predicting, through a processor of a data processing device communicatively coupled to a memory, a portion of a video frame on which a user of the data processing device is likely to focus on during rendering thereof on a display unit associated with the data processing device. The video frame is part of decoded video data. The method also includes rendering, through the processor, the portion of the video frame on the display unit at an enhanced level compared to other portions thereof following the prediction of the portion of the video frame.Type: ApplicationFiled: June 7, 2013Publication date: December 11, 2014Applicant: NVIDIA CorporationInventors: Nilesh More, Anup Rathi
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Patent number: 8910191Abstract: A codec architecture including an audio wave driver and a coded topology driver. The audio wave driver is communicatively coupled to an audio engine and an analog audio codec. The coded topology driver is communicatively coupled to the audio wave driver by a set of interfaces that enables streamlined code implementation, improved operation efficiency and power savings, while allowing vendors to supply differentiating functionality outside of the basic requirements of the operating system.Type: GrantFiled: September 13, 2013Date of Patent: December 9, 2014Assignee: Nvidia CorporationInventors: Mark Pereira, Srinivas Anne, Stephen Holmes
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Patent number: 8907975Abstract: Digital video communication system and method facilitate conservation of communication bandwidth are presented. A present invention method forwards sampled chrominance data to other components in the system. Pixel chrominance values are sampled in accordance with the sampling scheme. The sampled chrominance values (e.g., 422, 420, 411, etc.) are forwarded to another component. For example, a graphics processing unit performs sampling operations and forwards the chrominance sampled information to another component (e.g., a board, a display, etc.). The graphics processing unit can also perform color space conversion before forwarding the chrominance sampled information to the other component. The other component performs up-sampling. For example, a display can perform the up-sampling to generate synthesized full RGB values. The sampled chrominance data can be further compressed (e.g., MPEG, WMV, etc.) before forwarding the sampled chrominance data and before performing the up-sampling.Type: GrantFiled: December 13, 2005Date of Patent: December 9, 2014Assignee: Nvidia CorporationInventor: William Samuel Herz
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Patent number: 8909746Abstract: One embodiment of the present invention sets forth a technique for automatically provisioning a diskless computing device and an associated server system. A diskless computing device client incorporates an iSCSI initiator that is used to access resources provided by an iSCSI target that is resident on a server computing device. The iSCSI initiator is implemented in the client firmware, providing INT13 disk services entry points, thereby enabling the client to transparently access virtual storage devices at boot time. The client device conducts an apparently local installation using the virtual storage devices provided by the server computing device. A short signature value is associated with the boot image, uniquely associating the boot image with the specific client hardware configuration. When the client device boots normally, the signature value of the client device is presented to the server computing device to automatically reference the appropriate boot image.Type: GrantFiled: July 25, 2006Date of Patent: December 9, 2014Assignee: NVIDIA CorporationInventors: Andrew Currid, Mark A. Overby
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Publication number: 20140357266Abstract: One aspect provides a modem for use at a terminal. The modem comprises a first interface, a second interface, and a processing unit. The first interface is arranged to connect to a network. The second interface is arranged to connect to a host processor on the terminal. The processing unit is arranged to perform a procedure to attempt to connect to the network via the first interface. The processing unit is also arranged to receive an indication of an operating mode that the host processor is operating in from the host processor via the second interface, where the operating mode is one of a plurality of operating modes. The processing unit is further arranged to, in the event of failure of the procedure, repeat performing the procedure at a time controlled in dependence on the received indication.Type: ApplicationFiled: May 28, 2013Publication date: December 4, 2014Applicant: NVIDIA CorporationInventors: Greg Heinrich, Flavien Delorme, Matthieu Imbault, Stephen Thomas, Stephen Molloy
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Patent number: 8904068Abstract: One embodiment sets forth a technique for dynamically allocating memory during multi-threaded program execution for a coprocessor that does not support dynamic memory allocation, memory paging, or memory swapping. The coprocessor allocates an amount of memory to a program as a put buffer before execution of the program begins. If, during execution of the program by the coprocessor, a request presented by a thread to store data in the put buffer cannot be satisfied because the put buffer is full, the thread notifies a worker thread. The worker thread processes a notification generated by the thread by dynamically allocating a swap buffer within a memory that cannot be accessed by the coprocessor. The worker thread then pages the put buffer into the swap buffer during execution of the program to empty the put buffer, thereby enabling threads executing on the coprocessor to dynamically receive memory allocations during execution of the program.Type: GrantFiled: May 9, 2012Date of Patent: December 2, 2014Assignee: NVIDIA CorporationInventors: Luke Durant, Ze Long
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Publication number: 20140351827Abstract: An application programming interface (API) provides various software constructs that allow a developer to assemble a processing pipeline having arbitrary structure and complexity. Once assembled, the processing pipeline is configured to include a set of interconnected pipestages. Those pipestages are associated with one or more different CTAs that may execute in parallel with one another on a parallel processing unit. The developer specifies the configuration of the pipestages, including the configuration of the different CTAs across all pipestages, as well as the different processing operations performed by each different CTA.Type: ApplicationFiled: May 21, 2013Publication date: November 27, 2014Applicant: NVIDIA CORPORATIONInventor: Ignacio LLAMAS
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Publication number: 20140351276Abstract: This disclosure is directed to systems and methods for sorting data in which pre-sorting operations are performed on keys prior to those keys being reordered within memory. One example method includes generating, for each of a plurality of keys, an associated modified key. This operation is an example pre-sorting operation that occurs prior to any reordering of the keys. Once the modified keys are generated, the modified keys and/or associated information are processed in order to change the ordering of the keys in memory.Type: ApplicationFiled: May 21, 2013Publication date: November 27, 2014Applicant: NVIDIA CORPORATIONInventors: Tero Tapani Karras, Timo Aila