Patents Assigned to NVidia
  • Patent number: 8724483
    Abstract: An interface for implementing a loopback configuration which offers improved calibration and/or testing of an electronic system is disclosed. More specifically, embodiments provide a bi-directional interface with at least two portions or partitions capable of communicating data in opposite directions and implementing a loopback configuration between components of an electronic system, thereby enabling more flexible, efficient and effective calibration and/or testing of the electronic system using a single interface. The loopback of the partitioned bi-directional interface may be used to perform data link training and/or electronic system testing. In one embodiment, the loopback configuration of the interface may be reversible. Additionally, the looped or coupled end of the partitions may be switched from one component to another, thereby reversing the configuration of the loopback in one embodiment.
    Type: Grant
    Filed: October 22, 2007
    Date of Patent: May 13, 2014
    Assignee: Nvidia Corporation
    Inventors: Ting Sheng Ku, Russell Newcomb, Barry A. Wagner, Ashfaq R. Shaikh, William B. Simms
  • Publication number: 20140129686
    Abstract: A mobile computing device, a method of operating thereof, a method of manufacturing and an external source for dynamic profile settings for mobile computing devices. In one embodiment, the mobile computing device includes: (1) a settings reservoir configured to store dynamic sets of profile settings and static set of profile settings for the computing device and (2) a profile generator configured to generate coalesced sets of profile settings for applications on the computing device based on the dynamic sets of profiles and the static set of profiles.
    Type: Application
    Filed: May 15, 2013
    Publication date: May 8, 2014
    Applicant: Nvidia Corporation
    Inventors: Nicholas Haemel, Cathy Donovan, David Chait
  • Publication number: 20140129742
    Abstract: A technique for controlling (e.g. (re)setting, adjusting, fixing, increasing, decreasing, determining, monitoring, calculating, measuring, storing) a holding time of a request from a controller of a host device to an endpoint of a peripheral device across a universal serial bus reduces power and memory loss and enhances overall system performance. The host device may include a programmable and/or hardwired controller for controlling the amount of time before the request from the host device is initially sent and/or resent to the endpoint of the peripheral device across the universal serial bus.
    Type: Application
    Filed: November 8, 2012
    Publication date: May 8, 2014
    Applicant: NVIDIA CORPORATION
    Inventors: Chung-Hong Lai, Krishnaraj S. Rao, Rahul Jain
  • Publication number: 20140124944
    Abstract: Embodiments of the invention generally relate to package substrates for integrated circuits. The package substrates each include a core having electrically conductive vias therethrough. Build-up layers formed from dielectric materials having different compositions are disposed around the core and include interconnects formed therein for facilitating electrical connections between integrated circuits coupled to the package substrate. The dielectric materials are selected to allow finer interconnect geometries where desired, and to increase the rigidity, and thus planarity, of the package substrate. Exemplary dielectric materials include pre-impregnated composite fibers for increasing the rigidity of a package substrate, and Ajinomoto Build-up Film for allowing the formation finer interconnect geometries.
    Type: Application
    Filed: November 5, 2012
    Publication date: May 8, 2014
    Applicant: NVIDIA CORPORATION
    Inventors: Leilei ZHANG, Zuhair BOKHAREY
  • Publication number: 20140124249
    Abstract: The present invention provides a printed circuit board (PCB) board, a core for manufacturing the PCB board and a method for manufacturing the PCB board. The PCB board is in a shape of a rectangle and comprises a fiber layer formed of interlacedly weaved fiberglasses, a metal layer affixed onto a surface of the fiber layer, and a pair of differential signal traces formed on the metal layer, wherein extending directions of the fiberglasses lie at acute angles with respect to a length direction of the rectangle, and the pair of differential signal traces extends along a width direction or the length direction of the rectangle. The PCB board can effectively reduce the possibility of the skew distortion during the transmitting process of the differential signal through adjusting the angle between the fiberglasses and the edge of the core without adjusting or redesigning the original circuit layout.
    Type: Application
    Filed: March 8, 2013
    Publication date: May 8, 2014
    Applicant: NVIDIA CORPORATION
    Inventors: Bing Ai, Biao Hu
  • Publication number: 20140125650
    Abstract: Techniques are disclosed for generating stereoscopic images. The techniques include receiving a first image frame associated with a first eye, and receiving a first depth frame associated with the first eye. The techniques further include reprojecting the first image frame based on the first depth frame to create a second image frame associated with a second eye. The techniques further include identifying a first pixel in the second image frame that remains unwritten as a result of reprojecting the first image frame, and determining a value for the first pixel based on a corresponding pixel in a prior image frame associated with the second eye. One advantage of the disclosed techniques is that DIBR reprojected image frames have a more realistic appearance where gaps are filled using pixels from a prior image for the same eye.
    Type: Application
    Filed: November 2, 2012
    Publication date: May 8, 2014
    Applicant: NVIDIA CORPORATION
    Inventor: Patrick NEILL
  • Publication number: 20140126148
    Abstract: An apparatus for dissipating heat is presented. The apparatus comprises a base provided with a recess on a top thereof for containing a portion of a flat panel electronic device. It also comprises a base heat sink disposed in the base. Finally, it comprises a heat-conducting plug with a first end thereof thermally contacting with the base heat sink, and a second end thereof extending upward from a bottom of the recess for plugging into a heat-conducting socket of the flat panel electronic device when the flat panel electronic device is placed on the base.
    Type: Application
    Filed: February 25, 2013
    Publication date: May 8, 2014
    Applicant: NVIDIA CORPORATION
    Inventor: Shuang Xu
  • Publication number: 20140129887
    Abstract: A scan flip-flop circuit comprises a scan input sub-circuit and a selection sub-circuit. The scan input sub-circuit is configured to receive a scan input signal and a scan enable signal and, when the scan enable signal is activated, generate complementary scan input signals representing the scan input signal that are delayed relative to a transition of a clock input signal between two different logic levels. The selection sub-circuit is coupled to the scan input sub-circuit and configured to receive the complementary scan input signals and, based on the scan enable signal, output an inverted version of either the scan input signal or a data signal as a first selected input signal.
    Type: Application
    Filed: November 2, 2012
    Publication date: May 8, 2014
    Applicant: NVIDIA CORPORATION
    Inventors: Hwong-Kwo Lin, Ge Yang, Xi Zhang, Jiani Yu, Ting-Hsiang Chu
  • Publication number: 20140130021
    Abstract: A system and method of translating functions of a program. In one embodiment, the system includes: (1) a local-scope variable identifier operable to identify local-scope variables employed in the at least some of the functions as being either thread-shared local-scope variables or thread-private local-scope variables and (2) a function translator associated with the local-scope variable identifier and operable to translate the at least some of the functions to cause thread-shared memory to be employed to store the thread-shared local-scope variables and thread-private memory to be employed to store the thread-private local-scope variables.
    Type: Application
    Filed: December 21, 2012
    Publication date: May 8, 2014
    Applicant: NVIDIA CORPORATION
    Inventors: Yuan Lin, Gautam Chakrabarti, Jaydeep Marathe, Okwan Kwon, Amit Sabne
  • Publication number: 20140129745
    Abstract: A First-in First-out (FIFO) memory comprising a latch array and a RAM array, the latch array being assigned higher priority to receive data than the RAM array. Incoming data are pushed into the latch array while the latch array has vacancies. Upon the latch array becoming empty, incoming data are pushed into the RAM array during a spill-over period. The RAM array may comprise two spill regions with only one active to receive data at a spill-over period. The allocation of data among the latch array and the spill regions of the RAM array can be transparent to external logic.
    Type: Application
    Filed: November 8, 2012
    Publication date: May 8, 2014
    Applicant: NVIDIA CORPORATION
    Inventor: Robert A. Alfieri
  • Publication number: 20140125836
    Abstract: Embodiments of the present invention are directed to methods and systems for robust weighting of gray patches in automatic white balancing in an image-capture device by utilizing kernel density estimation techniques with dynamically variable bandwidth to determine the probability density of samples to create an initial estimate, then verifying the initial gray point estimate to account for outliers. In one embodiment, given a set of image data, an initial gray point estimate in a color space is determined for the set of image data. The initial estimate is then refined by weighting the sub-population with the greatest probability of being gray. A final evaluation that includes a further comparison to pre-programmed constraints determines a final estimate, which can still be further tuned according to user preferences by adjusting color biases. The resulting final gray point estimate provides greater stability, and greatly improved accuracy over traditional techniques and solutions.
    Type: Application
    Filed: November 5, 2012
    Publication date: May 8, 2014
    Applicant: NVIDIA CORPORATION
    Inventor: Sean Midthun Pieper
  • Publication number: 20140129957
    Abstract: A method for creating a personalized user interface on a mobile information device is provided. The method includes the steps of: filtering out from a plurality of applications APPs installed on the mobile information device one or more said applications according to a personalization filtering criterion, such as a given number of most frequently used APPs; displaying the one or more filtered APPs on a visualized menu; and executing a selected one of the one or more filtered APPs on the visualized menu in response to a selection entered by a user.
    Type: Application
    Filed: December 28, 2012
    Publication date: May 8, 2014
    Applicant: NVIDIA CORPORATION
    Inventors: Li-Ling Chou, Yu-Li David Ho
  • Publication number: 20140125687
    Abstract: A method for sub-pixel texture mapping and filtering is provided. The method includes the steps of: dividing an area on a source image into a red (R) sub-area, a green (G) sub-area, and a blue (B) sub-area, where the area on the source image is corresponding to a pixel of a destination image presented by a display device; sampling the R sub-area to obtain a R color value, sampling the G sub-area to obtain a G color value, and sampling the B sub-area to obtain a B color value; and rendering R, G, B color components of the pixel of the destination image according to the R color value, the G color value, and the B color value.
    Type: Application
    Filed: December 28, 2012
    Publication date: May 8, 2014
    Applicant: NVIDIA CORPORATION
    Inventor: Scott Saulters
  • Publication number: 20140125680
    Abstract: The invention provides a method for driving a graphic processing unit (GPU), where a driver applies two threads to drive one ore more GPUs. The method includes the steps of: (a) activating a rendering thread and a displaying thread in response to invoking by an application thread of a graphics application; (b) sending according to the rendering thread a plurality of rendering instructions for enabling generation of at least a first rendered frame and a second rendered frame; and (c) sending according to the displaying thread one or more interpolating instructions and one or more displaying instructions, the one or more interpolating instructions enabling execution of interpolation according to the at least a first rendered frame and the second rendered frame to create one or more interpolated frames, and the one or more displaying instructions enabling display of the one or more interpolated frames.
    Type: Application
    Filed: January 18, 2013
    Publication date: May 8, 2014
    Applicant: NVIDIA CORPORATION
    Inventor: Scott Saulters
  • Publication number: 20140129807
    Abstract: A system and method are described for providing hints to a processing unit that subsequent operations are likely. Responsively, the processing unit takes steps to prepare for the likely subsequent operations. Where the hints are more likely than not to be correct, the processing unit operates more efficiently. For example, in an embodiment, the processing unit consumes less power. In another embodiment, subsequent operations are performed more quickly because the processing unit is prepared to efficiently handle the subsequent operations.
    Type: Application
    Filed: November 7, 2012
    Publication date: May 8, 2014
    Applicant: NVIDIA CORPORATION
    Inventors: David Conrad TANNENBAUM, Ming Y. SIU, Stuart F. OBERMAN, Colin SPRINKLE, Srinivasan IYER, Ian Chi Yan KWONG
  • Publication number: 20140125364
    Abstract: An IDDQ test system and method that, in one embodiment,deg includes 1) an empirical extraction subsystem operable to generate an IDDQ versus temperature model for a given semiconductor device design, 2) an automatic test equipment (ATE) test subsystem operable to obtain a measured IDDQ value (IDDQm) at a measured temperature (Tm) for a specific semiconductor device embodying the given semiconductor device design, the measured temperature (Tm) obtained within 5 seconds of obtaining the measured IDDQ value (IDDQm), and 3) a scaling subsystem operable to scale the measured IDDQ value (IDDQm) at the measured temperature (Tm) to a compensated IDDQ value (IDDQc) at a desired temperature (Td) using the IDDQ versus temperature model.
    Type: Application
    Filed: November 2, 2012
    Publication date: May 8, 2014
    Applicant: NVIDIA CORPORATION
    Inventors: Dushyant Narayen, Nerinder Singh, Gunaseelan Ponnuvel, Hemant Kumar, Luai Nasser, Craig Nishizaki
  • Publication number: 20140125251
    Abstract: Embodiments of the present invention provide a flat panel electronic device and a current control system thereof. The current control system comprises: a detecting module for detecting a current in a main circuit of the flat panel electronic device; and a control mechanism for reducing a brightness level of a backlight unit of the flat panel electronic device when the current in the main circuit is larger than or equal to a threshold so that the current in the main circuit is reduced to be less than the threshold. The current control system provided by the present invention reduces the current in the main circuit by reducing the brightness level of the backlight unit. Therefore, it is able to reduce the processing time by more than 10 ms compared with the prior art, and the fast and effective response is an important factor for extending the life of the battery.
    Type: Application
    Filed: February 25, 2013
    Publication date: May 8, 2014
    Applicant: NVIDIA CORPORATION
    Inventors: Jun HUA, Shuang XU
  • Publication number: 20140126637
    Abstract: A system and a method for decoding a video is disclosed by the present invention. The system comprises a controller, a parser and a decoder, wherein the controller is used for sending a control command to the parser and receiving a status report from the parser; the parser is used for parsing a video stream according to the control command and sending a parsed result to the decoder; and the decoder is used for decoding the parsed result. By using the system and the method for decoding a video provided by the present invention, errors in a video stream can be concealed during the decoding process of the video, and then a desired video output effect can be achieved at a receiving end.
    Type: Application
    Filed: January 18, 2013
    Publication date: May 8, 2014
    Applicant: NVIDIA CORPORATION
    Inventors: XINYANG YU, JINCHENG LI, JINYUE LU, MANINDRA PARHY
  • Publication number: 20140129812
    Abstract: A system and method for executing sequential code in the context of a single-instruction, multiple-thread (SIMT) processor. In one embodiment, the system includes: (1) a pipeline control unit operable to create a group of counterpart threads of the sequential code, one of the counterpart threads being a master thread, remaining ones of the counterpart threads being slave threads and (2) lanes operable to: (2a) execute certain instructions of the sequential code only in the master thread, corresponding instructions in the slave threads being predicated upon the certain instructions and (2b) broadcast branch conditions in the master thread to the slave threads.
    Type: Application
    Filed: December 21, 2012
    Publication date: May 8, 2014
    Applicant: Nvidia Corporation
    Inventors: Gautam Chakrabarti, Yuan Lin, Jaydeep Marathe, Okwan Kwon, Amit Sabne
  • Publication number: 20140125670
    Abstract: The invention provides a method for approximating motion blur in rendered frame from within a graphics driver. For example, the method includes the steps of: (a) obtaining by the graphics driver values of a frame transformation matrix for a current rendered frame and a previous rendered frame respectively; (b) obtaining by the graphics driver depth values of the current rendered frame; and (c) loading by the graphics driver a shader onto a GPU, in order to enable the GPU to adjust color values of one or more sample areas on the current rendered frame, based on at least the values of the frame transformation matrix for the current rendered frame and the previous rendered frame and the depth values of the current rendered frame, whereby a motion blur effect is created in the current rendered frame.
    Type: Application
    Filed: December 28, 2012
    Publication date: May 8, 2014
    Applicant: NVIDIA CORPORATION
    Inventor: Scott Saulters