Abstract: Systems and methods for reducing power consumption by an execution pipeline are provided. In one example, a method includes stalling an operation from being executed in the execution pipeline based on inputs to the operation being unavailable in a register file and disabling access to read the register file in favor of controlling a bypass network based on the consumer characteristics of the operation and producer characteristics of other operations being executed in the execution pipeline to forward data produced at an execution stage in the execution pipeline to be used as one or more resources of the operation.

Abstract: A packaging substrate, a packaged semiconductor device, a computing device and methods for forming the same are provided. In one embodiment, a packaging substrate is provided that includes a packaging structure having a chip mounting surface and a bottom surface. The packaging structure has at a plurality of conductive paths formed between the chip mounting surface and the bottom surface. The conductive paths are configured to provide electrical connection between an integrated circuit chip disposed on the chip mounting surface and the bottom surface of the packaging structure. The packaging structure has an opening formed in the chip mounting surface proximate a perimeter of the packaging structure. A stiffening microstructure is disposed in the opening and is coupled to the packaging structure.

Abstract: A system for controlling gatings of a multi-core processor, the system includes a pulse width modulation generator for generating a control square wave; and a phase shifter for shifting a phase of the control square wave to generate control square waves with different phases, and respectively inputting the control square waves with the different phases to a gating of each of multiple processing engines in the multi-core processor. A multi-core processor is provided that includes multiple processing engines. Each processing engine includes a gating, and a system for controlling the gating. Accordingly, in the multi-core processor, the load to be processed in a certain period of a working cycle can be averaged to be processed in a longer period of the working cycle. Consequently, current noise and voltage noise and temperature growth due to the load change can be reduced.

Abstract: The present invention provides a liquid cooling system and a method for preventing leakage thereof. The liquid cooling system comprises: an enclosed cooling liquid circulating assembly with cooling liquid flowing circularly and air above the cooling liquid provided therein; a vacuum pump leading to the air in the enclosed cooling liquid circulating assembly; and a vacuum gauge for measurement of a pressure of the air in the enclosed cooling liquid circulating assembly, wherein the vacuum pump is turned on when the measured pressure is higher than a predetermined pressure, and the vacuum pump is turned off when the measured pressure is not more than the predetermined pressure; wherein the predetermined pressure is set to ensure that the pressure of the cooling liquid is not higher than the atmospheric pressure.

Abstract: Embodiments of the present invention provide a packaging system, which generally includes a substrate, a first electrical conductive pad and a second electrical conductive pad formed on a top surface of the substrate, and a mask section formed on the top surface of the substrate and disposed between the first electrical conductive pad and the second electrical conductive pad. The packaging system further includes a passive component mounted onto a top surface of the mask section, wherein a portion of a back surface of the passive component is in physical contact with the first electrical conductive pad and the second electrical conductive pad, respectively.

Abstract: A processor and a system are provided for tuning a supply voltage for data retention. The contents of data storage circuitry are read and a data verification indication corresponding to the contents is computed. Then, the supply voltage provided to the data storage circuitry is reduced to a low voltage level that is intended to retain the contents of the data storage circuitry.

Abstract: A dual flip-flop circuit combines two or more flip-flip sub-circuits into a single circuit. The flip-flop circuit comprises a first flip-flop sub-circuit and a second flip-flop sub-circuit. The first flip-flop sub-circuit comprises a first storage sub-circuit configured to store a first selected input signal and transfer the first selected input signal to a first output signal when a buffered clock signal transitions between two different logic levels and a dock driver configured to receive a clock input signal, generate an inverted clock signal, and generate the buffered clock signal. The second flip-flop sub-circuit is coupled to the clock driver and configured to receive the inverted clock signal and the buffered clock signal. The second flip-flop sub-circuit comprises a second storage sub-circuit configured to store a second selected input signal and transfer the second selected input signal to a second output signal when the buffered clock signal transitions.

Abstract: Techniques are disclosed for processing graphics objects in a stage of a graphics processing pipeline. The techniques include receiving a graphics primitive associated with the graphics object, and determining a plurality of attributes corresponding to one or more vertices associated with the graphics primitive. The techniques further include determining values for one or more state parameters associated with a downstream stage of the graphics processing pipeline based on a visual effect associated with the graphics primitive. The techniques further include transmitting the state parameter values to the downstream stage of the graphics processing pipeline. One advantage of the disclosed techniques is that visual effects are flexibly and efficiently performed.

Abstract: A system and method for allocating shared memory of differing properties to shared data objects and a hybrid stack data structure. In one embodiment, the system includes: (1) a hybrid stack creator configured to create, in the shared memory, a hybrid stack data structure having a lower portion having a more favorable property and a higher portion having a less favorable property and (2) a data object allocator associated with the hybrid stack creator and configured to allocate storage for shared data object in the lower portion if the lower portion has a sufficient remaining capacity to contain the shared data object and alternatively allocate storage for the shared data object in the higher portion if the lower portion has an insufficient remaining capacity to contain the shared data object.

Abstract: Disclosed herein are methods and systems that provide compatible device drivers to mobile computing devices. In one embodiment, a method of determining compatibility between different versions of device drivers and operating systems of a mobile computing device is disclosed that includes: (1) establishing a test environment employing a current operating system of a mobile computing device, (2) applying an updated driver to the test environment and (3) determining system compatibility of the updated driver with the current operating system employing the test environment, wherein the determining is based on both direct and implied compatibility of the updated driver with the current operating system.

Abstract: A system, method, and computer program product are provided for performing level shifting. In use, level shifting is performed utilizing a native transistor, where the level shifting is performed utilizing a feedback based topology.

Abstract: The invention provides a method for approximating motion blur in rendered frame from within a graphics driver. For example, the method includes the steps of: (a) obtaining by the graphics driver values of a frame transformation matrix for a current rendered frame and a previous rendered frame respectively; (b) obtaining by the graphics driver depth values of the current rendered frame; and (c) loading by the graphics driver a shader onto a GPU, in order to enable the GPU to adjust color values of one or more sample areas on the current rendered frame, based on at least the values of the frame transformation matrix for the current rendered frame and the previous rendered frame and the depth values of the current rendered frame, whereby a motion blur effect is created in the current rendered frame.

Abstract: A system and method for compiling or runtime executing a fork-join data parallel program with function calls. In one embodiment, the system includes: (1) a partitioner operable to partition groups into a master group and at least one worker group and (2) a thread designator associated with the partitioner and operable to designate only one thread from the master group for execution and all threads in the at least one worker group for execution.

Abstract: A method and system for automatically analyzing graphics processing unit (“GPU”) test results are disclosed. Specifically, one embodiment of the present invention sets forth a method, which includes the steps of identifying the GPU test results associated with a first register type, creating a template document associated with the same first register type, wherein the template document is pre-configured to store and operate on the GPU test results of the first register type, filling the GPU test results in the template document, aggregating the GPU test results associated with the first register type to establish a common output, and determining a suitable register value from a passing range of register values based on the common output without human intervention.

Abstract: A method for transitioning from a first operational mode, where operations are executed on a first processor while a second processor is powered off, to a second operational mode, where operations are executed on the second processor while the first processor is powered off. A driver causes detects a first system event that indicates a transition from the first to the second operational mode is likely. The driver powers on the second processor in response to the first system event and detects a second system event. The driver determines whether each of the client applications can be transferred from the first processor to the second processor without resulting in any data loss, and depending on whether each of the client applications can be transferred, either transfers the client applications from the first to the second processor or continues to cause the operations to be executed in the first operational mode.

Abstract: A method for transitioning from a first operational mode, where operations are executed on a first processor while a second processor is powered off, to a second operational mode, where operations are executed on the second processor while the first processor is powered off. A driver causes detects a first system event that indicates a transition from the first to the second operational mode is likely. The driver powers on the second processor in response to the first system event and detects a second system event. The driver determines whether each of the client applications can be transferred from the first processor to the second processor without resulting in any data loss, and depending on whether each of the client applications can be transferred, either transfers the client applications from the first to the second processor or continues to cause the operations to be executed in the first operational mode.

Abstract: A method, a receiver and computer program product for reporting at least one channel quality indicator from a receiver to a transmitter in a MIMO system are disclosed herein. In one embodiment, the receiver receives one or more data streams transmitted by the transmitter wherein the data streams are processed by the transmitter using a transmission precoding matrix W prior to transmission to the receiver. The receiver estimates a preferred precoding matrix Wp which is preferred by the receiver and processes the received data streams using the transmission precoding matrix W, such that the effective channel G at the output of the signal processing module is dependent upon the transmission precoding matrix W used by the transmitter. The receiver determines a second effective channel Gp, uses it to determine the at least one channel quality indicator and transmits the determined at least one channel quality indicator to the transmitter.

Abstract: Techniques for securely updating a boot image without knowledge of a secure key used to encrypt the boot image.

Abstract: A system, method, and computer program product are provided for testing a circuit representation. A command line input is received at a command line interface. The command line input is translated into one or more test conditions. Additionally, a test environment configured to simulate the circuit representation and verify the one or more test conditions is generated.