Patents Assigned to NXP
  • Patent number: 12293247
    Abstract: It is described an RF communication device comprising: i) an RF antenna functionality; ii) at least one antenna pad connected to the RF antenna functionality; iii) a further functionality which is not an RF antenna functionality; and iv) at least one non-antenna pad electrically connected to the further functionality. The antenna pad and the non-antenna pad are arranged to be short-circuited with each other, and the non-antenna pad is electrically connected via a connection line to the further functionality within the RF communication device. Further, a method of manufacturing an RF communication device is described.
    Type: Grant
    Filed: June 13, 2022
    Date of Patent: May 6, 2025
    Assignee: NXP B.V.
    Inventors: Egas Carvalho Henes Neto, Slawomir Rafal Malinowski, Ivan Jesus Rebollo Pimentel, Thomas Pichler
  • Patent number: 12294359
    Abstract: An integrated circuit (IC) includes one or more active transistors and multiple series-coupled dummy transistors. The dummy transistors are coupled between two active transistors and/or at the ends of each active transistor. When the dummy transistors are coupled between two active transistors, apart from two conductive regions that are coupled to two active transistors, each remaining conductive region of the dummy transistors is maintained in a floating state to control a leakage current between the two active transistors. Similarly, when the dummy transistors are coupled at an end of one active transistor, apart from one conductive region that is coupled to the active transistor, each remaining conductive region of the dummy transistors is maintained in the floating state to control a leakage current between the active transistor and the dummy transistors.
    Type: Grant
    Filed: May 5, 2022
    Date of Patent: May 6, 2025
    Assignee: NXP B.V.
    Inventors: Sanjay Kumar Wadhwa, Divya Tripathi, Saurabh Goyal, Alvin Leng Sun Loke, Manish Kumar Upadhyay
  • Patent number: 12294316
    Abstract: A controller for a power converter includes a generator module which generates a sequence of pulses each having a width defined by a rise moment and fall moment stored in respective RM and FM registers. The sequence of pulses have a repetition rate that is modulated by a repetition period value stored in a RP register. A memory of the controller has tables of rise moment values, fall moment values and repetition period values configured to be written into the RM, FM and RP registers respectively. A direct memory access (DMA) module of the controller is configured to write rise moment, fall moment, and repetition period values from the respective memory table into the RM, FM, and RP registers respectively, in response to a DMA trigger. A core coupled to the DMA module is configured to write the rise moment, fall moment, and repetition period values into the memory tables.
    Type: Grant
    Filed: March 31, 2023
    Date of Patent: May 6, 2025
    Assignee: NXP USA, Inc.
    Inventors: Lukas Vaculik, Radek Holis, Ivan Sieklik
  • Patent number: 12293008
    Abstract: One example discloses a security device, including: a bulk security capacitance, including a first endpoint and a second endpoint, and having, a first layer including a first set of conductive elements, the first endpoint, and the second endpoint; and a second layer including a second set of conductive elements; wherein the first set of conductive elements and the second set of conductive elements together form at least two bulk capacitors in series; wherein the first and second layers are separated by a distance; and wherein the first and second endpoints are configured to be coupled to a tamper detection circuit configured to detect a change in the bulk security capacitance.
    Type: Grant
    Filed: May 13, 2022
    Date of Patent: May 6, 2025
    Assignee: NXP USA, Inc.
    Inventors: Henri Verhoeven, Edwin Schapendonk, Oswald Moonen, Matheus Johannus Gerardus Lammers
  • Patent number: 12292528
    Abstract: A method of processing radar signalling, the method comprising: receiving a mask (815) that represents samples in the radar signalling that are detected as including interference. The mask (815) comprises a matrix of data having a first dimension and a second dimension, wherein the first dimension represents a fast-time axis and the second dimension represents a slow-time axis. The method further comprises performing frequency analysis on the mask (815) across each of the fast-time axis and the slow-time axis of the mask in order to provide a range-Doppler processed mask (817); and deconvolving a range-Doppler map (813) of the received radar signalling using the range-Doppler processed mask (817) in order to provide a deconvolved-range-Doppler map (814).
    Type: Grant
    Filed: August 30, 2022
    Date of Patent: May 6, 2025
    Assignee: NXP B.V.
    Inventors: Jeroen Overdevest, Arie Geert Cornelis Koppelaar, Francesco Laghezza
  • Patent number: 12287394
    Abstract: Aspects of the present disclosure are directed to communicating data for authentication and location determination, such as for authenticating a key FOB and locating the key FOB within a defined distance. As may be implemented in accordance with one or more embodiments, a plurality of headerless packets, respectively including scrambled timestamp sequence (STS) packets but not including encoding and/or synchronization headers, are communicated between respective communication circuits. A time of flight (TOF) value indicative of time elapsed between transmission and reception of the plurality of headerless packets is assessed based on the STS packets. A distance between the communication circuits is determined based on the assessed time of flight.
    Type: Grant
    Filed: December 15, 2022
    Date of Patent: April 29, 2025
    Assignee: NXP B.V.
    Inventors: Michael Schober, Manuel Lafer, Pablo Corbalán Pelegrín
  • Patent number: 12287752
    Abstract: Digitally controllable elements capable of influencing operation of a power amplifier module are coupled in parallel to a serial data interface. Each digitally controllable element includes address control logic that decodes an address presented on the serial data interface as well as a device specific ID. In response to the decoding, physical registers in different digitally controllable elements are written in an interleaved order according to an interleaved register address map. Banks of registers within the digitally controllable elements may be select to influence or modify operation of the power amplifier module.
    Type: Grant
    Filed: February 28, 2022
    Date of Patent: April 29, 2025
    Assignee: NXP USA, Inc.
    Inventor: Nicholas Justin Mountford Spence
  • Patent number: 12289170
    Abstract: This disclosure relates to a network device comprising: a first input interface, a first output interface, and a second output interface, wherein the network device is configured to change from a first state, referred to as a time state, to a second state, referred to as a spatial state, and vice versa, wherein the network device is configured to generate each of a first output message and a second output message based on a first input message, wherein the network device is configured to transmit, in the time state, both, the first output message and the second output message, offset in time either via the first output interface or second output interface, and wherein the network device is configured to transmit, in the spatial state, the first output message via the first output interface and the second output message via the second output interface.
    Type: Grant
    Filed: September 29, 2023
    Date of Patent: April 29, 2025
    Assignee: NXP B.V.
    Inventors: Hubertus Gerardus Hendrikus Vermeulen, Lu Lu Chan
  • Patent number: 12287391
    Abstract: An apparatus configured to receive an input dataset, x, indicative of radar signals reflected from targets as received at a plurality of antenna elements; define a matrix, A, formed of direction-of-arrival-angle vectors, an, each direction-of-arrival-angle vector representing an expected response at the plurality of antenna elements of radar signals from one of the targets; define a signal amplitude vector s to represent expected complex amplitudes as received in the radar signals; define an objective function based on x, A and s; search for a set of direction of arrival angles for each of the plurality of targets by the repeated evaluation of the objective function for a plurality of candidate matrices based on matrix A; and wherein said search space comprises a plurality of discrete points, z, associated with the direction of arrival angles by a function of sin(?k).
    Type: Grant
    Filed: August 8, 2022
    Date of Patent: April 29, 2025
    Assignee: NXP B.V.
    Inventors: Arie Geert Cornelis Koppelaar, Marco Jan Gerrit Bekooij, Francesco Laghezza, Feike Guus Jansen, Yiting Lu
  • Patent number: 12288766
    Abstract: A method of forming a semiconductor device is provided. The method includes placing a semiconductor die on a carrier substrate and placing a sacrificial blank on the carrier substrate with a routing structure attached to the sacrificial blank. At least a portion of the semiconductor die, sacrificial blank, and routing structure are encapsulated with an encapsulant. The carrier substrate is separated from a first side of the encapsulated semiconductor die, sacrificial blank, and routing structure to expose a surface of the sacrificial blank. The sacrificial blank is etched to form a cavity in the encapsulant and expose a portion of the routing structure exposed through the cavity.
    Type: Grant
    Filed: February 23, 2022
    Date of Patent: April 29, 2025
    Assignee: NXP USA, Inc.
    Inventors: Michael B. Vincent, Scott M. Hayes
  • Patent number: 12287423
    Abstract: The present disclosure relates to a MIMO radar system, comprising a first beamforming network (6) comprising a first beam ports (7A) and antenna ports (7B), wherein the first beamforming network is configured to connect the first beam ports via the first antenna ports to the first antenna elements, wherein the first beamforming network is configured to generate for each first beam port a single beam pattern. The first antenna elements transmitting or receiving a single beam pattern selected from the number of single beam patterns, wherein the first antenna elements are spaced apart at a first distance selected to provide a beam pattern of the first antenna array essentially consisting of a plurality of single main lobes. The radar system also has a similar second beamforming network (8).
    Type: Grant
    Filed: July 24, 2020
    Date of Patent: April 29, 2025
    Assignee: NXP B.V.
    Inventors: Cicero Silveira Vaucher, Nick Andrew Cancrinus, Olexander Yarovyi, Jan Puskely
  • Patent number: 12288927
    Abstract: A method of forming a semiconductor device is provided. The method includes providing a radiating element structure and a semiconductor die. The radiating element structure includes a non-conductive substrate, a radiating element formed at a top side of the non-conductive substrate, and a conductive ring formed at the top side of the non-conductive substrate substantially surrounding the radiating element. The semiconductor die is interconnected with the radiating element by way of a conductive trace. An encapsulant encapsulates at least a portion of the radiating element structure. A top surface of the conductive ring exposed at a top surface of the encapsulant. A waveguide interface material is applied on at least a portion of the top surface of the encapsulant.
    Type: Grant
    Filed: October 25, 2021
    Date of Patent: April 29, 2025
    Assignee: NXP USA, Inc.
    Inventors: Michael B. Vincent, Giorgio Carluccio
  • Patent number: 12288770
    Abstract: Semiconductor packages with embedded wiring on re-distributed bumps are described. In an illustrative, non-limiting embodiment, a semiconductor package may include an integrated circuit (IC) having a plurality of pads and a re-distribution layer (RDL) coupled to the IC without any substrate or lead frame therebetween, where the RDL comprises a plurality of terminals, and where one or more of the plurality of pads are wire bonded to a corresponding one or more of the plurality of terminals.
    Type: Grant
    Filed: April 25, 2022
    Date of Patent: April 29, 2025
    Assignee: NXP B.V.
    Inventors: Kuan-Hsiang Mao, Norazham Mohd Sukemi, Chin Teck Siong, Tsung Nan Lo, Wen Hung Huang
  • Patent number: 12289186
    Abstract: A transceiver configured to: determine a reference frequency offset relative to a second transceiver based on double sided ranging; correct first and second portions of a packet received from a respective first and second antenna; and determine an angle of arrival of the packet based on corrected first and second portions and the reference frequency offset.
    Type: Grant
    Filed: October 19, 2022
    Date of Patent: April 29, 2025
    Assignee: NXP B.V.
    Inventors: Manuel Lafer, Wolfgang Küchler
  • Patent number: 12289165
    Abstract: A sequence recovery method is executed by a node in a time-sensitive network configured to transmit and receive packets The method includes providing a state variable, having a first state in which a packet loss counter is disabled, and a second state in which the packet loss counter is enabled. The packet loss counter can only be incremented to count lost packets when the loss state variable is in the second state. This method enhances the IEEE 802.1CB standard.
    Type: Grant
    Filed: June 22, 2022
    Date of Patent: April 29, 2025
    Assignee: NXP B.V.
    Inventors: Bernard Francois St-Denis, Allen Lengacher, Feng Xian
  • Patent number: 12289130
    Abstract: Provided is a contactless connector that includes an antenna system and a wireless transceiver coupled to the antenna system and configured to simultaneously transmit a transmission signal and receive a received signal through the antenna system. The wireless transceiver includes a transformer, a wide-band phase shifter and a combiner. The transformer has a primary coil with a center tap to which the transmission signal is coupled and a first end that is coupled to the antenna system. The transmission signal also is coupled to an input of the wide-band phase shifter. The transformer also has a secondary coil, an output of the secondary coil is coupled to a first input of the combiner, an output of the wide-band phase shifter is coupled to a second input of a combiner, and an output of the combiner provides a self-interference-canceled version of the received signal.
    Type: Grant
    Filed: December 19, 2022
    Date of Patent: April 29, 2025
    Assignee: NXP USA, Inc.
    Inventors: Sai-Wang Tam, Aristotele Hadjichristos, Steven Daniel, Krishnan Tiruchi Natarajan, John Quigley
  • Patent number: 12282106
    Abstract: Disclosed are methods and devices for, UWB, ranging of a target using a plurality of antenna arrays. The method comprises: determining a first RSSI, from a first antenna of a first antenna arrays, and a second RSSI from a second antenna of a second antenna arrays; in response to the first RSSI being larger than the second RSSI, selecting the first antenna array, and selecting the second antenna array otherwise; using the selected antenna array, performing a UWB ranging measurement including measuring an angle of arrival of the signal from the target; including, if the angle of arrival of the signal from the target is out of range: selecting a different one of the plurality of antennae arrays, as a presently-selected antenna array; and, using that antenna array, performing a UWB ranging measurement including measuring an angle of arrival of the signal from the target.
    Type: Grant
    Filed: March 10, 2023
    Date of Patent: April 22, 2025
    Assignee: NXP B.V.
    Inventors: Sunil Dilipkumar Jogi, Purnank Harjivanbhai Ghumalia, Michael Schober, Stefan Lemsitzer, Srivathsa Masthi Parthasarathi, Guillaume Lepoittevin
  • Patent number: 12283962
    Abstract: A method of controlling a frequency-modulated oscillator 110 of a phase-locked loop circuit 100 is described, wherein the oscillator 110 comprises a bank of capacitors 413. The method comprises the steps of (i) switching a capacitor 414 of the bank of capacitors 413 to change an output frequency 1050 of an output signal 112 of the oscillator 110 from a first frequency 1051 to a second frequency 1052, (ii) determining a frequency information associated with the capacitor 414 and based on at least one of the first frequency 1051 and the second frequency 1052; and (iii) writing the frequency information to a look-up table 224, 225, 226 stored in a control unit 120 of the oscillator 110. A corresponding frequency-modulated oscillator 110 and phase-locked loop circuit 100 are also described.
    Type: Grant
    Filed: August 29, 2023
    Date of Patent: April 22, 2025
    Assignee: NXP B.V.
    Inventors: Nenad Pavlovic, Chuang Lu, Vladislav Dyachenko
  • Patent number: 12284014
    Abstract: A beamformer device for a multiple-input, multiple-output (MIMO) antenna system and method of operating a beamformer device is described. the beamformer device includes a number of beamformer channels. Each beamformer channel includes a RF terminal, an antenna connection terminal; and a power detector having a power detector output, The beamformer device includes a digital control interface comprising a serial data input and a serial data output; a control input coupled to the serial data input; and a beamformer monitor output configured to be selectively coupled to either the serial data output or the power detector output of one of the beamformer channels.
    Type: Grant
    Filed: April 25, 2023
    Date of Patent: April 22, 2025
    Assignee: NXP B.V.
    Inventors: Paul Mattheijssen, Mustafa Acar, Lucas Maria Florentinus De Maaijer
  • Patent number: 12278623
    Abstract: One example discloses a power on reset (POR) circuit, wherein a first circuit is configured to un-couple a power supply input from a resistor divider when the voltage on a second end of the capacitor is above a first circuit threshold; a second circuit configured to couple the second end of the capacitor to the power supply input when a voltage on at least one tap point of the resistor divider is above a second circuit threshold; wherein the comparator is coupled to at least one of the tap points, the reference potential, and a POR output; and wherein the comparator is configured to ramp-up a POR signal on the POR output when a voltage on the at least one of the tap points is greater than the comparator threshold.
    Type: Grant
    Filed: June 9, 2023
    Date of Patent: April 15, 2025
    Assignee: NXP B.V.
    Inventors: Henricus Cornelis Johannes Büthker, Jyotirmoy Ghosh, Piotr Gibas, Edwin Schapendonk, Neha Goel, Namith Vishnu N