Abstract: A current limiter circuit for limiting current through a pass device is disclosed. The current limiter circuit includes a accurate/fast current limiter circuit, a coarse/slow current limiter control circuit and a pass device having an input port, an output port and an on/off control port. A control circuit couple to the accurate/fast current limiter circuit and the on/off control port is also included. The accurate/fast current limiter circuit is coupled to the input port and the output port and the coarse/slow current limiter control circuit is coupled to the input port and the output port and an on/off control port of the accurate/fast current limiter circuit.

Abstract: A semiconductor device includes a base substrate, a doped region at an upper surface of the base substrate, and a transistor over the upper surface of the base substrate and formed from a plurality of epitaxially-grown semiconductor layers. The doped region includes one or more ion species, and has a lower boundary above a lower surface of the base substrate. The base substrate may be a silicon substrate, and the transistor may be a GaN HEMT formed from a plurality of heteroepitaxial layers that include aluminum nitride and/or aluminum gallium nitride. The doped region may be a diffusion barrier region and/or an enhanced resistivity region. The ion species may be selected from phosphorus, arsenic, antimony, bismuth, argon, helium, nitrogen, and oxygen. When the ion species includes oxygen, the doped region may include a silicon dioxide layer formed from annealing the doped region after introduction of the oxygen.

Abstract: One example discloses a near-field communications device, including: a receiver configured to be coupled to a first near-field antenna having a first radiation pattern, and to a second antenna having a second radiation pattern; wherein the first radiation pattern and the second radiation pattern are not spatially aligned; wherein the receiver is configured to subtract a second signal received from the second antenna from a first near-field signal received from the first near-field antenna.

Abstract: A vertical bi-directional device includes first and second conductive gates in a semiconductor layer with a first vertical gate oxide on a sidewall of the first conductive gate and a second vertical gate oxide on a sidewall of the second conductive gate. A first heavily doped region of a first conductivity type is at the surface adjacent the first conductive gate, and a second heavily doped region of the first conductive type is at the surface adjacent to the second conductive gate. Doped regions of the first conductivity type extend below the conductive gates towards a substrate. A doped region of a second conductivity type extends laterally from the first vertical gate oxide to the second vertical gate oxide, and a heavily doped region of the second conductivity type is at the surface of the semiconductor layer, between the first and second heavily doped regions of the first conductivity type.

Abstract: Aspects of the present disclosure are directed to decoding signals susceptible to communication errors. As may be implemented in accordance with one or more embodiments, an input signal is decoded to produce a first decoded output, which is subsequently encoded, and error characteristics of the encoded first decoded output are assessed. The input signal is again decoded (e.g., with a delay), using the encoded first decoded output and the assessed error characteristics thereof to assess a reliability characteristic of bits in the input signal. A second decoded output is then provided with errors corrected therein based on the assessed reliability characteristic.

Abstract: An active semiconductor device, such as a laterally diffused metal oxide semiconductor (LDMOS) transistor, includes a substrate having a substrate resistivity of at least 1 kohm-cm. An active area of the active semiconductor device is formed in the substrate. A doped implant region is formed in the substrate surrounding the active area of the active semiconductor device and a field oxide region is formed over the doped implant region. The doped implant region may include a boron dopant. Methodology entails forming the doped implant region prior to formation of the field oxide region.

Abstract: An access point (AP) device of a wireless communication network determines that an unassociated client station requests to participate in a ranging measurement procedure with the AP device, and determines a preliminary network ID for uses by the unassociated client station during a ranging measurement session and while the unassociated client station remains unassociated with the wireless communication network. The AP device transmits a packet having the preliminary network ID, and after transmitting the packet having the preliminary network ID, participates in a multi-user (MU) null data packet (NDP) ranging measurement session with a plurality of client stations that includes the unassociated client station.

Abstract: This specification discloses methods and systems for controlling a NFC (near field communication) transmitter output with enhanced accuracy. This is achieved by first doing a device and/or system level calibration of the Tx (transmitter) by testing at the device and/or system level. Then using the testing results to generate a set of Tx calibration data, which will be used by a Tx control unit to control the Tx outputs (such as Tx output power, Tx output voltage, Tx output current, etc.) with enhanced accuracy. In some embodiments, the Tx control unit controls the Tx output with enhanced accuracy by using the Tx calibration data to tune one or more of the following: (i) Tx supply, (ii) Tx driver, (iii) matching network.

Abstract: The present application relates to a system for verifying integrity of a stream of image frames including an encoder logic module and a decoder logic module. On source side, a test line insertion logic module receiving the stream is arranged upstream to the encoder logic module encoding the stream. The test line insertion logic module is configured to include one or more test lines into the image frames. A color coding is assigned to the one or more test lines. The color coding is selected from a coding scheme. On destination side, a test line detection and extraction logic module is arranged downstream to the decoder logic module receiving the encoded stream. The test line detection and extraction logic module extracts the color coding from the received image frames and verifies extracted coding data against the coding scheme. The coding data comprises at least the extracted color coding.

Abstract: Embodiments of packaged semiconductor devices and methods of making thereof are provided herein, which include a semiconductor die having a plurality of pads on an active side; a dummy die having a plurality of openings that extend from a first major surface to a second major surface opposite the first major surface, wherein the plurality of openings are aligned with the plurality of pads; and a silicone-based glue attaching the dummy die to the active side of the semiconductor die, wherein a plurality of bondable surfaces of the semiconductor die are exposed through the plurality of openings of the dummy die.

Abstract: One example discloses a voltage select circuit, comprising: a first input configured to receive a first input voltage; a second input configured to receive a second input voltage; a first diode having a first polarity coupled to the first input; a second diode having a first polarity coupled to the second input; an output coupled to a second polarity of both the first and second diodes; a diode bypass circuit coupled to the first input and the output in parallel with the first diode, and coupled to the second input; and wherein the bypass circuit is configured to pass the first input voltage to the output if an absolute value of the second input voltage is less than a voltage drop of the second diode.

Abstract: A circuit for diagnostic testing includes a current source coupled to a power source and configured to provide wetting current along a path to a load control switch, a current sensor connected in series with the current source along the path, the current sensor being configured to generate a current sensor signal indicative of a current level along the path, a voltage measurement unit having an input terminal coupled to a node along the path through which the wetting current flows to reach the load control switch, the voltage measurement unit being configured to detect a state of the load control switch based on a voltage at the node, and a controller coupled to the current sensor and the voltage measurement unit, the controller being configured to determine a wetting current diagnostic condition in accordance with the current level and the detected state.

Abstract: Embodiments of DC-DC converters are disclosed. In an embodiment, a DC-DC converter includes a switched resistor connected between an input terminal of the DC-DC converter from which an input voltage is received and an output terminal of the DC-DC converter from which an output voltage is output and a comparator configured to compare the output voltage with a reference voltage and to switch on or off the switched resistor based on the comparison between the output voltage and the reference voltage.

Abstract: Embodiments of a method, a circuit and a system are disclosed. In an embodiment, a discharge protection circuit is disclosed. The discharge protection circuit includes a switch having a capacitive coupling between a gate and a drain of the switch, wherein the capacitive coupling facilitates a capacitively coupled current. The discharge protection circuit further includes a gate network including at least the gate of the switch, a gate control element and a resistor connected to the gate and the gate control element. In addition, the discharge protection circuit includes an electrostatic discharge rail that connects to a diode that is coupled to the gate and the resistor, wherein the capacitive coupling facilitates sinking of at least a part of an electrostatic discharge current via the gate network.

Abstract: Embodiments of a method and a device are disclosed. In an embodiment, a method for operating a communications network is disclosed. The method involves setting, at a first network node in the communications network, a register value that is indicative of a fault status associated with the first network node, the register value being set in a physical layer device of the first network node, receiving fault status information at an element in the communications network, the fault status information corresponding to the register value that is set in the physical layer device of the first network node, and determining, at the element in the communications network, a fault status of the communications network in response to the fault status information received at the element in the communications network.

Abstract: A microwave heating apparatus includes a solid state microwave energy source, a first dielectric resonator antenna that includes a first exciter dielectric resonator and a first feed structure in proximity to the first exciter dielectric resonator, one or more additional dielectric resonators stacked above the top surface of the first exciter dielectric resonator to form a vertically-stacked dielectric resonator antenna array. The first feed structure is electrically coupled to the microwave energy source to receive a first excitation signal, and the first exciter dielectric resonator is configured to produce a first electric field in response to the excitation signal provided to the first feed structure.

Abstract: Embodiments of switched capacitor voltage converters and methods for operating a switched capacitor voltage converter are disclosed. In an embodiment, a switched capacitor voltage converter includes serially connected switching devices, a voltage generator connected to the serially connected switching devices and configured to generate an output voltage for a bootstrap capacitor in response to a first voltage at a first terminal that is connected to the serially connected switching devices, and voltage drivers configured to drive the serially connected switching devices based on the output voltage.

Abstract: Various embodiments relate to a method and apparatus for maintaining constant gain in an open loop gain stage amplifier, the circuit including a reference signal generator configured to generate a plurality of reference voltages, a gain compensation circuit, including a reference selector configured to select one of the plurality of reference voltages for each of a plurality of gain stages, an error amplifier configured to output a control voltage signal to a selector, a selector configured to select which of a plurality of degeneration resistors in the open loop gain stage amplifier to apply the control voltage signal wherein the voltage signal is applied to the gate of at least one of the plurality of degeneration resistors in the open loop gain stage amplifier.

Abstract: An amplifier includes a semiconductor substrate. A first conductive feature partially covers the bottom substrate surface to define a conductor-less region of the bottom substrate surface. A first current conducting terminal of a transistor is electrically coupled to the first conductive feature. Second and third conductive features may be coupled to other regions of the bottom substrate surface. A first filter circuit includes an inductor formed over a portion of the top substrate surface that is directly opposite the conductor-less region. The first filter circuit may be electrically coupled between a second current conducting terminal of the transistor and the second conductive feature. A second filter circuit may be electrically coupled between a control terminal of the transistor and the third conductive feature. Conductive leads may be coupled to the second and third conductive features, or the second and third conductive features may be coupled to a printed circuit board.

Abstract: A radio frequency (RF) amplifier circuit includes an amplifier device and a first baseband bias circuit. The amplifier device includes a first input configured to receive a first signal to be amplified and a first output configured to output a first amplified signal. The first baseband bias circuit includes an input coupled to the first output of the amplifier device. The first baseband bias circuit includes a first envelope decoupling circuit and a first harmonic decoupling circuit. The first envelope decoupling circuit includes a first bulk capacitor and a first distributed inductor configured to resonate in a baseband frequency range. The first harmonic decoupling circuit includes a second bulk capacitor and a second distributed inductor configured to resonate at a harmonic frequency of the frequency of the first signal received at the input of the amplifier device.