Abstract: Various aspects are discussed, for example, a method is described for authentication of devices in a wireless network involving NFC (Near Field Communication), wherein a device periodically switches its mode from a read mode, in which it is able to receive authentication data from one or more other devices, to a write mode, in which it sends out authentication data to the one or more other devices, according to a random time slot scheme, the device authenticates itself after having received authentication data from another device during the read mode, and the device switches permanently its mode to the write mode after being authenticated.

Abstract: A method of forming a MEMS device by encapsulating a MEMS element with a sacrificial layer portion deposited over a substrate arrangement, the portion defining a cavity for the MEMS element, forming at least one strip of a further sacrificial material extending outwardly from the portion, forming a cover layer portion over the sacrificial layer portion, the cover layer portion terminating on the at least one strip, removing the sacrificial layer portion and the at least one strip, the removal of the at least one strip defining at least one vent channel extending laterally underneath the cover layer portion and sealing the at least one vent channel. A device including such a packaged micro electro-mechanical structure.

Abstract: An electronic switching device comprises a first bipolar junction transistor (BJT) (2a) adapted to control the flow of current between a pair of switching terminals; a charge recovery circuit coupled to the base of the first BJT (2a) and adapted to establish a supply voltage across a capacitor (5) by storing in the capacitor (5) charge carriers accumulated in the base of the first BJT (2a) during application of a base drive current, the quantity of accumulated charge carriers depending on the base drive current; and a controllable current source (4) adapted to control the base drive current, thereby controlling the supply voltage.

Abstract: The invention relates to a method for determining a temperature (T) of a plurality of memory elements (10) having a temperature-dependent probability (P) of assuming a particular bit value, the method comprising: triggering (110) the plurality of memory elements (10) to assume the particular bit value; reading out (120) the contents of the plurality of memory elements (10) to obtain read data (D), and processing (130) the read data (D) for determining a value (Vact) indicative of the temperature (T). The invention also relates to a program product comprising instructions for causing a processor to perform the method. Such computer program is advantageously used in a smartcard, which then does not need any structural modification at all. The invention further relates to a system for determining a temperature (T) of a plurality of memory elements (10). Such system is advantageously implemented in an integrated circuit, wherein the plurality of memory elements (10) forms part of an integrated memory.

Abstract: A quadrature out-phasing system comprising: a first baseband signal modifier (6) arranged to receive a first baseband signal component (2) and output a first constant envelope RF carrier (12) and a second constant envelope RF carrier (14); and a second baseband signal modifier (8) arranged to receive a second baseband signal component (4) and output a third constant envelope RF carrier (16) and a fourth constant envelope RF carrier (18). The system may further comprise: a first signal combiner (500) arranged to combine the first constant envelope RF carrier (12) and the second constant envelope RF carrier (14), and arranged to output a first RF PWM signal (94); and a second signal combiner (502) arranged to combine the third constant envelope RF carrier (16) and the fourth constant envelope RF carrier (18), and arranged to output a second RF PWM signal (96).

Abstract: Consistent with embodiments of the present disclosure, a method involves a redriver circuit with compliance test mode features. A redriver circuit is configured to process received compliance patterns for a compliance test mode. A compliance test mode is detected by a redriver circuit having a first input port and a second input port. The redriver detects the presence of a remote receiver termination on both input ports, monitors both input ports to detect received data and enters compliance test mode in response to no received data being detected on the input ports for a set period of time. Compliance patterns are tracked by monitoring for valid signal levels on the second input port. De-emphasis is controlled on at least one input port in response thereto.

Abstract: A method for providing fast and secure access to MIFARE applications installed in a MIFARE memory being configured as a MIFARE Classic card or an emulated MIFARE Classic memory, comprises: keeping a repository of MIFARE memories and user identifications assigned to said MIFARE memories as well as of all MIFARE applications installed in the MIFARE memories, wherein, when a new MIFARE application is to be installed in a MIFARE memory identified by a user identification the present memory allocation of said MIFARE memory is retrieved, an appropriate sector of said MIFARE memory is calculated, a key is calculated for said MIFARE application and the MIFARE application together with the assigned sector and key are linked to the user identification and are stored in the repository.

Abstract: The invention relates to electronic device having an operation temperature range, wherein the electronic device comprises a tunable capacitor (CST) comprising a first electrode (BE), a second electrode (TE), and a dielectric (FEL) arranged between the first electrode (BE) and the second electrode (TE). The dielectric (FEL) comprises dielectric material (FEL) having a value of a relative dielectric constant (?r) varying at least within the operation temperature range. The electronic device further comprises a temperature varying means (RES) being thermally coupled to the tunable capacitor for providing a temperature of the dielectric (FEL) causing a predetermined capacitance of the tunable capacitor (CST). The invention, which relies on the idea of varying temperature to vary a capacitance of a capacitor stack, provides an alternative tunable capacitor type for the known types.

Abstract: An RF-power device includes a semiconductor substrate having a plurality of active regions arranged in an array. Each active region includes one or more RF-power transistors. The active regions are interspersed with inactive regions for reducing mutual heating of the RF-power transistors in separate active regions. The devices also includes at least one impedance matching component located in one of the inactive regions of the substrate.

Abstract: A charging pad capable of charging a receiver according to a predetermined procedure is disclosed. The charging pad may have a plurality of charging coils and a controller for selecting an appropriate coil for charging the receiver. The receiver communicates with the charging pad via NFC, thereby indicating to the charging pad the appropriate procedure for charging the receiver. The controller then selects the appropriate coil and directs charging according to the appropriate procedure.

Abstract: A resonator has a main resonator body and a secondary resonator structure. The resonator body has a desired mode of vibration of the resonator alone, and a parasitic mode of vibration, wherein the parasitic mode comprises vibration of the resonator body and the secondary resonator structure as a composite body. In this way, unwanted vibrational modes are quenched by the second suspended body.

Abstract: An apparatus (pad) and method for wirelessly charging a receiver are disclosed. The pad includes one or more NFC antennas which can receive an NFC signal from the receiver. The pad also contains one or more charging coils. Measurement of the signal strength at each charging NFC antenna helps determine which charging coil(s) should be utilized to effect the most efficient charging of the receiver.

Abstract: Radio Frequency (RF) amplifier circuits are disclosed which may exhibit improved video/instantaneous bandwidth performance compared to conventional circuits. For example, disclosed RF amplifier circuits employ various concepts for reducing an overall circuit inductance or enabling an increase in capacitance for a given circuit size.

Abstract: Communications between a base station and a transponder that is powered by the base station are effected using a signal differentiation approach. A first radio frequency signal is communicated between the base station and the transponder to power the transponder, with the first radio frequency signal including noise and data for authenticating communications between the base station and the transponder. A second radio frequency signal is communicated between the base station and the transponder, with the second radio frequency signal including data for authenticating communications between the base station and the transponder. The detection of noise presented via the first radio frequency signal is mitigated while detecting data in the second radio frequency signal, via signal differentiation.

Abstract: An interpretation engine for an interoperable device is disclosed. The interpretation engine is configured to receive data and to determine a function to be executed in response to the received data and in accordance with a knowledge base that comprises one or more relationships that are structured in triplets. Each triplet comprises a subject, a predicate and an object. The interpretation engine is configured to recognize only a predetermined, fixed plurality of predicate values.

Abstract: Embodiments of methods and systems for processing a semiconductor wafer are described. In one embodiment, a method for processing a semiconductor wafer involves performing laser stealth dicing on the semiconductor wafer to form a stealth dicing layer within the semiconductor wafer and after performing laser stealth dicing, cleaning the semiconductor wafer from a back-side surface of the semiconductor wafer with a blade to remove at least a portion of the stealth dicing layer. Other embodiments are also described.

Abstract: A semiconductor magnetic field sensor comprising a semiconductor well on top of a substrate layer is disclosed. The semiconductor well includes a first current collecting region and a second current collecting region and a current emitting region placed between the first current collecting region and the second current collecting region. The semiconductor well also includes a first MOS structure, having a first gate terminal, located between the first current collecting region and the current emitting region and a second MOS structure, having a second gate terminal, located between the current emitting region and the second current collecting region. In operation, the first gate terminal and the second gate terminal are biased for increasing a deflection length of a first current and of a second current. The deflection length is perpendicular to a plane defined by a surface of the semiconductor magnetic field sensor and parallel to a magnetic field.

Abstract: Various automatic range scaling solutions for smart power switches are provided, to enable current monitoring across a wide dynamic range. Use is made of current sensing transistors which implement different current sensing ratios.

Abstract: A radio frequency communication device has data transmission means and data receiving means. The data transmission means comprise load modulating means being adapted to receive a radio frequency carrier signal emitted by another RF communication device and to modulate the RF carrier signal by means of load modulation in accordance with data to be sent. The data receiving means comprise a RF frequency carrier signal generator being adapted to emit a radio frequency carrier signal and load demodulating means being connected to an emission path of the radio frequency carrier signal and demodulating the radio frequency carrier signal when it has been load modulated by another RF communication device.

Abstract: An intelligent interrupt distributor balances interrupts (workload) in a highly parallelized system. The intelligent interrupt distributor distributes the interrupts between the processor cores. This allows lowering of voltage and frequency of individual processors and ensures that the overall system power consumption is reduced.