Abstract: A receiver (30) with an antenna circuit is disclosed, which antenna circuit comprises a coil (31) and either a monopole (35) or a dipole connected to the coil (31). The antenna circuit captures a signal with a wavelength transmitted by a transmitter (1). The coil (31) captures the signal and generates therefrom a current having a frequency corresponding to the wavelength. The coil (31) is dimensioned such that the current is distributed uniformly within the coil (31) at each point in time. Preferably, the monopole (35) or a leg of the dipole has a length corresponding to less than 5% of the wavelength. The invention further relates to a radio transmitter of the same kind. Finally, the invention relates to an RFID tag, a smart card, a mobile device, and a hearing aid, each comprising an inventive receiver (30) and/or an inventive transmitter.

Abstract: A method is disclosed of controlling a LED, comprising driving the LED with a DC current for a first time, interrupting the DC current for a second time such that the first time and the second time sum to a period, determining at least one characteristic of the LED while the DC current is interrupted, and controlling the DC current during a subsequent period in dependence on the at least one characteristic. The invention thus benefits from the simplicity of DC operation. By operating at the LED in a DC mode, rather than say in a PWM mode, the requirement to be able to adjust the duty cycle is avoided. By including interruptions to the DC current, it is possible to utilize the LED itself to act as a sensor in order to determine a characteristic of the LED. The need for additional sensors is thereby avoided.

Abstract: The invention provides a method for cycle-by-cycle control of a LED current (ILED) flowing through a LED circuit arrangement (LEDCIRC) at a mean LED current level. The method comprises a) establishing a converter current (IL), b) establishing an oscillation of the converter current (IL) between substantially a valley current level and substantially a peak current level, c) feeding the LED circuit arrangement (LEDCIRC) with the converter current (IL) as the LED current during a part of an oscillation cycle of the oscillation of the converter current, d) determining a current level correction for compensating a current level error between an integral over an oscillation cycle of the LED current and a reference, the reference being representative of the mean LED current level, and e) adjusting at least one of the valley current level and the peak current level with the current level correction for use in a successive cycle of the oscillation of the converter current.

Abstract: Consistent with an example embodiment, there is a method for regulating a LED current (ILED) flowing through a LED circuit arrangement at a mean LED current level. The method includes establishing an oscillating converter current (IL), establishing a first and a second current control indicator representative of a flow of a converter current (IL); regulating a peak and valley current level of the converter current in dependence on the first current control indicator; controlling a converter current period (T) of an oscillation of the converter current in dependence on the second current control indicator to be within a period control range (Tref) and feeding at least part of the converter current to the LED circuit arrangement.

Abstract: Circuits and methods for driving electrical loads, where each is driven according to a desired current. A circuit comprising a switch mode converter comprising a transformer with primary and secondary windings, the primary connected to a voltage supply via one or more input control switches; output circuits, each comprising a switch connecting a load to an output of the secondary, each load series connected with a respective switch and in parallel with a capacitor; and a switching control circuit for control of each of the output circuit switches and for sensing a current through the loads. The switching control circuit operates the output circuit switches to maintain set current through the loads, the switching control circuit configured in successive output cycles of the switch mode converter to operate each output circuit switch in an order dependent on a forward voltage of each of the respective loads.

Abstract: The present invention discloses an integrated circuit (IC) comprising a bond pad (160); a substrate stack carrying a first layer (130) comprising conductive regions (135); and an interconnect layer (140) over the first layer (130) comprising a dielectric material portion (400) between the bond pad (160) and the substrate stack, said portion comprising a plurality of air-filled trenches (345) defining at least one pillar (340) of the dielectric material (400), at least said air-filled trenches (345) being capped by a porous capping layer (440). The interconnect layer (140), which typically is one of the uppermost interconnect layers of the IC, has an improved resilience to pressure exerted on the bond pad (160). The present invention further teaches a method for manufacturing such an IC.

Abstract: The invention relates to a display driver comprising an embedded frame memory and an overdrive logic block for moderating display data of a current frame received by the display driver by means of overdrive. The overdrive logic block is arranged for reading data from and writing data to the embedded frame memory and for using display data of a previous image stored in the embedded frame memory for calculating overdrive display data of the current frame. The overdrive display data is used for refreshing the image depicted on a display device. The invention further relates to an LCD display device comprising such a display device.

Abstract: Embodiments of a system and method are disclosed. One embodiment is a Controller Area Network (CAN) transceiver. The CAN transceiver includes a CAN bus interface, a TXD interface, an RXD interface, a transmitter connected between the TXD interface and the CAN bus interface, a receiver connected between the RXD interface and the CAN bus interface, a traffic control system connected between the CAN bus interface, the TXD interface, and the RXD interface. The traffic control system detects the presence of CAN Flexible Data-rate (FD) traffic on the CAN bus interface and if the traffic control system detects the presence of CAN FD traffic on the CAN bus interface, the traffic controls system changes an operating state of the transceiver.

Abstract: According to an aspect of the invention, an NFC device for communicating with an NFC reader is conceived, the NFC device comprising an NFC integrated circuit, an antenna unit connected to said NFC integrated circuit, and a detuning circuit, wherein the detuning circuit is arranged to cause a periodic detuning of the antenna unit to a detuned state, such that data transmission between the NFC device and the NFC reader may take place periodically while the NFC device and the NFC reader remain within communication range of each other.

Abstract: A sensor device has an arrangement of plural sensors for sensing an analyte which is in at least one of liquid phase or a suspension or a gel. Each sensor includes a nano-electrode and is configured to sense the presence of a particle localized to or bound to the nano-electrode. The sensor is configured to discriminate in real-time the binding of particles to respective nano-electrodes.

Abstract: A circuit is disclosed for driving a plurality of LED strings from an AC supply and arranged to, in use, drive current through a series arrangement of a plurality N of the LED strings when the AC voltage is sufficient to drive the plurality N of the LED strings: the circuit comprising a first current source configured to be switchably connected to a one end of said series arrangement of N LED strings; a series combination of a second current source and a heat dissipater, wherein the series combination of the second current source and the heat dissipater is arranged in parallel with the first current source; and a current balancer for balancing the current through the first current source and the second current source. A driver for such a circuit is also disclosed.

Abstract: A color image enhancement method, for enhancing the color of a color image comprising a plurality of pixels. The method comprises: mapping a color saturation value of each pixel to a normalized saturation value, wherein the range of values of normalized saturation is the same independent of the luminance value of the pixel; estimating a probability distribution of the normalized saturation values; defining a transfer function for modifying the normalized saturation values, based on the estimated probability distribution; and applying the transfer function to the normalized saturation values to generate modified values.

Abstract: A MEMS switch in which at least first, second and third signal lines are provided over the substrate, which each terminate at a connection region. A lower actuation electrode arrangement is over the substrate. A movable contact electrode is suspended over the connection regions for making or breaking electrical contact between at least two of the three connection regions and an upper actuation electrode provided over the lower actuation electrode. The use of three of more signal lines enables a symmetrical actuation force to be achieved or enables multiple switch functions to be implemented by the single movable electrode, or both.

Abstract: Disclosed is a method of programming a phase change memory (100) comprising a plurality of memory cells (10), each memory cell comprising a control terminal connected to a word line (30), and a current terminal connected to a bit line (20), comprising applying a first set pulse (Vb) having a shape including a decaying trailing edge (54) to one of the bit line (20) and the word line (30) of a memory cell (10) for changing its phase change material from an amorphous phase to a crystalline phase; applying a second set pulse (Vw) to the other of the bit line and the word line of the memory cell, said second set pulse at least partially overlapping said first set pulse such that the resulting current pulse (Ids) through the memory cell exhibits the decaying trailing edge (52), said decaying trailing edge ensuring the crystallization of the phase change material; applying a first reset pulse (Vb) having said shape to one of the bit line (20) and the word line (30) of a memory cell for changing its phase change mate

Abstract: Disclosed is a shift register (200, 400) comprising an input (205), an output (230) and a plurality of register cells (210) serially connected between the input and the output, each register cell being connected to a neighboring cell via a node, wherein at least some of said nodes comprise a multiplexer (220) having an output coupled to the downstream register cell and a plurality of inputs, each of said plurality of inputs being coupled to a different upstream register cell such that different length sections of the shift register can be selectively bypassed, the shift register further comprising a set of parallel IO channels (230, 410) facilitating conversion between interleaved and de-interleaved data, each of said channels being coupled to a different one of said nodes, the number of parallel IO channels being smaller than the total number of register cells in the shift register.

Abstract: Various embodiments relate to a method of producing a high precision current using N current mirrors, a feedback control amplifier, and a reference current regulator to drive a light emitting diode, including: selecting one of the N current mirrors as a first current mirror; driving the first current mirror using a reference current produced by the reference current regulator; measuring a first sense voltage at the first current mirror; measuring a second sense voltage at a second current mirror that is one of the remaining N?1 current mirrors; integrating a difference of the first sense voltage and the second sense voltage to produce a feedback signal; and driving the remaining N?1 current mirrors using the feedback signal.

Abstract: A field effect transistor having a gate structure comprising a high-K dielectric layer, a gate electrode located on the high-K dielectric layer, and an interfacial layer located in between the high-K dielectric layer and a channel region of the field effect transistor. The interfacial layer comprises a layer of SiO2 containing a regrowth inhibiting agent. A method of forming the gate structure includes forming a gate stack comprising, in order: a SiO2 layer adjacent a channel region of the field effect transistor; a high-K dielectric layer on the SiO2 layer; and a gate electrode on the high-K dielectric layer. The method also includes introducing a regrowth inhibiting agent into the SiO2 layer and then annealing the gate structure. The presence of the regrowth inhibiting agent in the SiO2 interfacial layer inhibits regrowth of the SiO2 layer into the channel region during the annealing step.

Abstract: A counter/timer circuit and a method of operating the counter/timer circuit are described. In one embodiment, a method of operating a counter/timer circuit involves determining a match condition by comparing a count value of the counter/timer circuit with a value stored in a match register of the counter/timer circuit and delaying an assertion of the match condition based on a value programmed in a match companion register of the counter/timer circuit. The match companion register is associated with the match register. Other embodiments are also described.

Abstract: An oscillator device comprises a resonator mass which is connected by a spring arrangement to a substrate and a feedback element for controlling oscillation of the resonator mass, which comprises a piezoresistive element connected between the resonator mass and the substrate. The invention provides an oscillator device in which the two parts (resonator and circuit to close the oscillation loop) are combined inside one single oscillator device, which can be a MEMS device.

Abstract: An analog silicon photomultiplier system includes at least one analog pixel comprising a plurality of analog photodiodes (APDs), and a capacitor, a signal generator, a phase detector, and a compensation network. The signal generator is configured to generate and propagate a sinusoidal signal concurrently along first and second transmission lines. A capacitor is loaded on the first transmission line when an APD corresponding to the capacitor detects a photon. The phase detector is coupled with the first and second transmission lines, determines a phase difference between the first transmission line and the second transmission line and calculates a number of APDs that have fired from the phase difference. The compensation network is coupled with the second transmission line and the phase detector, and comprises a plurality of compensation capacitors, wherein the compensation capacitors are loaded on the second transmission line in proportion to the number of APDs that have fired.