Abstract: According to an aspect of the invention a method for calibrating a measurement device is conceived wherein: a calibration device is brought into close proximity of the measurement device such that a data communication link is established between the measurement device and the calibration device; wherein the following steps are performed while the calibration device and the measurement device are in close proximity of each other: the calibration device performs a measurement of at least one physical phenomenon; the measurement device performs a measurement of the same physical phenomenon; the result of the measurement by the measurement device is compared with the result of the measurement by the calibration device; and calibration parameters are computed based on a difference between the result of the measurement by the measurement device and the result of the measurement by the calibration device.
Abstract: A controller for controlling a power generator circuit, and a method for operation such a controller, is disclosed. The invention is particularly suited to LED current generators. The current generator may be switched off to conserve power when not required for any LED circuits. The method relates to determining the time at which the controller is required to provide power, current or voltage, and to adjust the timing of switching-on of the controller, in order to ensure that power, current or voltage is available for the load when required.
Type:
Grant
Filed:
March 17, 2009
Date of Patent:
August 13, 2013
Assignee:
NXP B.V.
Inventors:
Peter H. F. Deurenberg, Gert Van Der Horn
Abstract: Aspects of the present invention are directed to circuits, circuit packages and related methods. In accordance with various example embodiments, respective electrodes are implemented to facilitate contact to a semiconductor device via different surfaces and/or sidewalls, as may be useful in connecting the device to an external package having a plurality of semiconductor devices in which same-surface connections to the devices are spatially restricted. The semiconductor device has opposing surfaces and sidewalls connecting the surfaces, and contacts to respective different regions in the device. Respective electrodes are coupled to the respective contacts and extend along/around the device to provide access to the contacts via different surfaces.
Type:
Grant
Filed:
December 2, 2011
Date of Patent:
August 13, 2013
Assignee:
NXP B.V.
Inventors:
Roelf Anco Jacob Groenhuis, Sven Walczyk, Emiel Bruin, Rolf Brenner
Abstract: A system is operated to transmit signals from a transmitter to a receiver. The transmitter is muted. A receiver transfer function for the receiver is adjusted so that an output signal of the receiver is minimized. A transmitter transfer function of the transmitter is set to be inverse to the adjusted receiver transfer function.
Abstract: A system and method for frame rate conversion using multi-resolution temporal interpolation utilizes motion estimation on input images to produce at least one motion vector and temporal interpolation on the input images in at least one spatial resolution that is determined by a characteristic of the at least one motion vector.
Type:
Grant
Filed:
August 26, 2009
Date of Patent:
August 13, 2013
Assignee:
NXP B.V.
Inventors:
Erwin Ben Bellers, Thijs Thomas Withaar
Abstract: Various exemplary embodiments relate to a verification system and method for verifying whether a vehicle is equipped with a functional on-board unit (OBU). The system may include a license plate recognition system configured to obtain a license plate number of the vehicle at a first location; a database of license plate numbers and OBU information; a wireless communication system configured to send a trigger message to the OBU using the OBU information, and configured to receive a response from the OBU indicating a location of the OBU; and a verification module configured to determine whether the vehicle is equipped with the OBU. The database may include a correspondence of license plate numbers and OBU information. The verification module may determine that the vehicle is equipped with the OBU if the location reported by the OBU is within a specified distance of the first location.
Type:
Application
Filed:
February 6, 2012
Publication date:
August 8, 2013
Applicant:
NXP B.V.
Inventors:
Andre Krijn NIEUWLAND, Gerardo Daalderop
Abstract: A reference voltage that is consistent over various operational conditions and uses low power is provided. According to an example, an internal temperature-compensated voltage (e.g., vdd_int in 200) is generated from a power supply (e.g., vdd in 200), and a reference voltage (e.g., vref in 200) is generated from the internal voltage. The reference voltage is stored on a storage circuit (e.g., 430) that is coupled (charged) and refreshed under conditions, relative to circuit characteristics, that make low and ultra-low power operation possible.
Abstract: Disclosed are methods and circuits for detecting and recording timestamps for multiple events (222/322, 224/324) using a single input pin (252, 352) on a real time clock (RTC) (250, 350). Signals associated with each of the events are modulated to create a multiple level composite signal (240). The RTC includes a multiple signal level detection circuit to distinguish from among the various signal levels so that each event can be separately flagged and timestamped. For example, the opening of two or more covers (112, 114) on the housing (110) of an electronic device (100) can be monitored, distinguished, and separately flagged using a single RTC input port.
Type:
Grant
Filed:
October 1, 2008
Date of Patent:
August 6, 2013
Assignee:
NXP B.V.
Inventors:
Giovanni Genna, Aleksandar Zhelyazkov, Markus Hintermann
Abstract: It is disclosed a semiconductor transistor, comprising a semiconductor substrate (111) in which a channel region (115) and a drain extension region (119) connected to the channel region are provided; a gate electrode (127) configured to provide an electric field for influencing the channel region; a first electrically conductive shield element (131) extending in a horizontal direction (103) parallel to a main surface of the semiconductor substrate and being arranged beside the gate electrode spaced apart from the drain extension region in a vertical direction (105) perpendicular to the horizontal direction; and a second electrically conductive shield element (133) arranged spaced apart from the first shield element in the vertical direction, wherein the gate electrode protrudes over the first shield element in the vertical direction.
Abstract: A power transfer system which includes a power transfer device as well as at least one portable device, and to a method of controlling the power transfer system specifically in case of a dead battery condition of a battery of the portable device. The power transfer device for wireless charging of the battery arranged in the portable device and the power transfer device each comprise a near field communication functionality for data communication by a data communication link between the devices. The method includes a step of starting to establish the data communication link between the power transfer device and the portable device.
Type:
Grant
Filed:
June 4, 2012
Date of Patent:
August 6, 2013
Assignee:
NXP B.V.
Inventors:
Remco H. W. Pijnenburg, Bruno Motte, Peter C. S. Scholtens
Abstract: An integrated circuit comprising a Class-D amplifier for amplifying an input signal at an input terminal is disclosed. The Class-D amplifier is switchable between an operational mode, in which a comparator (4) is directly coupled to an output stage (5), and a test mode, in which the comparator (4) is coupled to the output stage (5) via a sampler (15) and the output stage (5) is coupled to the input terminal via a feedback network, whereby a digital representation of the input signal is available at an output of the sampler (15).
Type:
Grant
Filed:
July 25, 2012
Date of Patent:
August 6, 2013
Assignee:
NXP B.V.
Inventors:
Marco Berkhout, Lutsen Ludgerus Albertus Hendrikus
Abstract: A non-volatile memory is disclosed. A contiguous layer of phase change material is provided. Proximate the contiguous layer of phase change material is provided a first pair of contacts for providing an electrical current therebetween, the electrical current for passing through the contiguous layer of phase change material for inducing heating thereof within a first region. Also adjacent the contiguous layer is provided a second pair of contacts disposed for providing an electrical current therebetween, the electrical current for passing through the contiguous layer of phase change material for inducing heating thereof within a second region thereof, the second region different from the first region.
Type:
Grant
Filed:
May 25, 2012
Date of Patent:
August 6, 2013
Assignee:
NXP B.V.
Inventors:
Hans Boeve, Niek Lambert, Victor Van Acht, Karen Attenborough
Abstract: Disclosed is an integrated circuit comprising a substrate including at least one light sensor; an interconnect structure over the substrate; at least one passivation layer over the interconnect structure, said passivation layer including a first area over the at least one light sensor; and a gas sensor such as a moisture sensor at least partially on a further area of the at least one passivation layer, wherein the gas sensor comprises a gas sensitive layer in between a first electrode and a second electrode, the gas sensitive layer further comprising a portion over the first area. A method of manufacturing such an IC is also disclosed.
Abstract: A system for managing a population of RFID tags where the system may include: an interrogator configured to transmit a select command to the population of RFID tags, and at least one modified tag in the population of RFID tags. The select command may include information specifying a memory location. The modified tag may include a memory configured with a memory address corresponding to the memory location specified by the select command, and a controller configured to perform at least one action upon the at least one modified tag receiving the select command. The at least one action may be based on the memory location specified by the select command.
Abstract: According to an aspect of the invention a configuration method for configuring a host device in a control system is conceived, in particular a building control system, wherein an authorized configuration device exchanges confidential configuration data with a radio frequency identification tag coupled to the host device, wherein, after the confidential configuration data have been exchanged and a corresponding configuration operation has been performed, access to the confidential configuration data by an unauthorized configuration device is precluded. According to further aspects of the invention a corresponding configuration device, a corresponding computer program product and a corresponding control system are conceived.
Abstract: A differential switched-current line-driver implements a method to reduce power consumption by eliminating output current that does not contribute to the required differential output signal. This output current is used for example during a training phase, and the current elimination can take place after the training phase is complete.
Abstract: According to a first aspect of the present invention there is provided a signal generation system for generating a predetermined analog signal. The system comprises a clock generator (1) adapted for generating on the basis of an external clock signal a predetermined clock signal, a signal generator including a first gain stage (21) and a second gain stage (22) adapted for providing an overall gain of the signal generator and outputting a stepped analog signal, an analog filter (23) adapted for filtering the stepped analog signal output by the second gain stage and for outputting the predetermined analog signal, and a first and a second clock mapping units (3,4) adapted for receiving the predetermined clock signal, and respectively supplying to the first and second gain stages non-overlapped clock signal, wherein the amount of gain provided by the first and second gain stages is controlled by the non-overlapped clock signals.
Abstract: A power supply arrangement is for supplying power to a chip core. A dc-dc converter arrangement is used both for a wake-up state of the core in preparation for an active state, and for a shut down charge recycling state in which the core supplies charge to the dc-dc converter. Thus, the dc-dc converter arrangement functions both to control powering on of the core in an efficient manner and the powering down of the core to implement charge recycling. In an active state, the core is supplied with power from the high power supply line.
Type:
Grant
Filed:
September 27, 2010
Date of Patent:
July 30, 2013
Assignee:
NXP B.V.
Inventors:
Harish Kundur Subramaniyan, Rinze Ida Mechtildis Peter Meijer
Abstract: A method of controlling a switched mode converter is disclosed in which the switching frequency varies in proportion to the square of the sine of the phase of the input AC supply. Thus the switching frequency is a maximum, and the respective on period of the switch is a minimum, when the mains voltage is a maximum. Conversely, the switching frequency is reduced, and the respective on time of the switch is increased, when the mains voltage is reduced. Such a switching method provides for a high power factor. Implementation by means of a phase locked loop and a comparator may prevent the need for complex circuitry, and may provide for direct use of a digital controller or digital signal processing through a counter output in the phase locked loop. A controller configured to operate such a method, together with an AC/DC converter embodying such a controller are also disclosed.
Abstract: A power amplifier circuit uses an output transistor and a cascode transistor. First and second drive circuits apply gate control signals to the two transistors, which rise and fall in synchronism, and this is such that the voltage drop across the cascode transistor is reduced (compared to a constant gate voltage being applied to the output transistor).