Abstract: An RFID transponder (1) comprises a demodulator (3) for demodulating received phase modulated carrier signals (CSQ), converting them down to a modulated baseband signal (MS) and filtering the converted signal. Sampling means (7) sample the filtered signal (FS) and store an actual sampling value (S(t0)) and a previous sampling value (S(t1)) of the filtered signal (FS). Subtracting means (8) calculate a difference (DS) between the actual sample value (S(t0)) and the previous sample value (S(t1)). Difference evaluation means (9) evaluate the difference (DS) according to the following criteria: a. if the difference is positive and outside of a predefined zero range (ZR) a first logical value is determined; b. if the difference is negative and outside of the zero range a second logical value is determined; c. if the difference is within the zero range the logical value of the latest evaluation is kept.

Abstract: A field effect transistor having a gate structure that comprises an interfacial layer positioned in between the transistor channel region and a high-K dielectric layer of the gate stack. The interfacial layer comprises AlxSiyOz, which has a higher relative dielectric constant value than SiO2. A method of forming the gate structure of a field effect transistor. The method includes forming a gate stack comprising, in order: a SiO2-based layer adjacent a channel region of the field effect transistor; a high-K dielectric layer on the SiO2-based layer; and a gate electrode on the high-K dielectric layer. The method also includes introducing Al into the SiO2-based layer to form an AlxSiyOz interfacial layer in between the high-K dielectric layer and the channel region. A heating step to allows Al introduced into channel region to diffuse out of the channel region into the interfacial layer.

Abstract: An integrated circuit comprises at least first and second frequency generating circuits, wherein each frequency generating circuit comprises a reference frequency source; a voltage controlled oscillator; and a feedback control circuit for controlling the voltage controlled oscillator to provide a desired output frequency signal. The output of the voltage controlled oscillator of the first frequency generating circuit is switched into the feedback control circuit of the second frequency generating circuit to provide a test signal for testing one or more components of the feedback control circuit of the second frequency generating circuit.

Abstract: An electronic circuit (10) for controlling a capacitive pressure sensor (1), which capacitive pressure sensor (1) comprises a plate electrode capacitor (C) with a capacity that varies in dependence on pressure changes exerted on a deflectable diaphragm (2) forming one plate electrode of the capacitor (C), wherein the electronic circuit (10) comprises a DC voltage source (12) being adapted to generate a DC bias-voltage (UDC) to be applied across the electrodes of the capacitor (C), an AC voltage source (13) being adapted to generate an AC voltage signal (UAC) to be applied across the electrodes of the capacitor (C) and a controller (18) being adapted to receive an output signal (OUT) of the capacitor (C) and to control the DC voltage source (12) such that the DC bias-voltage (UDC) applied to the capacitor (C) adopts a value that maintains the capacity of the capacitor (C) at a desired value.

Abstract: A multimode receiver has a transconductance amplifier having an input terminal and adapted to receive a voltage RF signal and to deliver a current RF signal. The amplifier has a current mixer coupled to the transconductance amplifier and adapted to receive the current RF signal, the current mixer being adapted to combine the current RF signal with a signal generated by a local oscillator, the mixer generating an intermediate frequency signal having a frequency that equals a combination of a frequency of the current RF signal and a frequency of the local oscillator. A low-pass filter is coupled to the mixer and is adapted to generate a low-pass current signal. A transimpedance amplifier is coupled to the low-pass filter and is adapted to receive the low-pass current signal, the transimpedance amplifier being adapted to generate an intermediate frequency voltage signal proportional with the low-pass current signal.

Abstract: A method for server-based managing of unique memory device identifications, such as serial numbers, of memory devices having unique memory device identifications, like MIFARE devices, preferably emulated MIFARE devices like SmartMX cards, which memory devices are arranged in mobile communication devices, comprises keeping a repository of available memory device identifications; fetching a memory device identification from the repository and sending it to a specific mobile communication device; and instructing the mobile communication device to change the memory device identification of its associated memory device from its present value to the received new value. Further, the server instructs the mobile communication device to return the previous value of the memory device identification of its associated memory device. Finally, the server will add the returned memory device identification value to the repository of memory device identifications.

Abstract: The present invention relates to a video decoder (DEC) for decoding a bit stream (BS) corresponding to pictures (P) of a video signal, the coded pictures being likely to include macroblocks coded in a progressive and in an interlaced way. The decoder includes a decoding unit (DEU) for decoding macroblocks coded in a progressive way, and a hybrid reference construction unit (HRCU) for constructing, for each reference picture, a hybrid reference texture (HRT) which has the property of representing said reference picture in a frame-based and in a field-based manner. Said hybrid reference texture is used by said decoding unit for decoding interlaced macroblocks.

Abstract: A method and circuit for providing a switched current source output has a precharge mode, in which a charge storage device is charged to a reference voltage, and the gate of an output transistor is discharged. In a discharge mode, the charge storage device is discharged to the gate of the output transistor to raise the gate voltage by an amount depending on the charge flow.

Abstract: The present invention relates to a method and system for testing integrity of a passivation layer (108) covering a semiconductor device. A structured layer of electrically conducting material (104) is deposited onto at least a portion of a top surface of a substrate (102) of the semiconductor device. The structured layer (104) comprises a plurality of bands (104.1, 104.2) connected to at least two contacts (106.1, 106.2) and disposed on the at least a portion of the top surface such that one of consecutive bands (104.1, 104.2) and consecutive portions of the bands (104.1, 104.2) are connected to different contacts (106.1, 106.2). A passivation layer (108) is deposited onto the at least a portion of the top surface of the substrate (102) and the structured layer (104) such that material of the passivation layer(108) is disposed between the bands of conducting material (104.1, 104.2) and on top of the structured layer (104).

Abstract: Various exemplary embodiments relate to an integrated circuit device that includes a plurality of input/output pins, device circuitry, a first testing protocol interface connected to the device circuitry and to the plurality of input/output pins, and a second testing protocol interface connected to the device circuitry and to the same plurality of input/output pins as the first testing protocol interface. The first testing protocol interface is configured to test the device circuitry with a first testing protocol, and the second testing protocol interface is configured to test the device circuitry with a second testing protocol.

Abstract: Disclosed is an integrated circuit comprising a substrate (10) including semiconductor devices and a metallization stack (20) over said substrate for interconnecting said devices, the metallization stack comprising a cavity (36), and a thermal conductivity sensor comprising at least one conductive portion (16, 18) of said metallization stack suspended in said cavity. A method of manufacturing such an IC is also disclosed.

Abstract: A MEMS switch (1, 81), and methods of fabricating thereof, the switch comprising: a sealed cavity (24); and a membrane (26); wherein the sealed cavity (24) is defined in part by the membrane (26); and the membrane is a 5 metallic membrane (26), for example consisting of a single type of metal or metal alloy. The MEMS switch (1, 81) may comprise a top electrode (30), for example extending into the cavity (24), located in a hole (32) in the metallic membrane (26). Fabrication may include providing a sacrificial layer (22) in a partly defined cavity (24). The bending stiffness of the membrane (26) may be 10 higher along an RF line (102) than along a line (104) perpendicular to the RF line (102), for example by virtue of the cavity (24) being elliptical.

Abstract: In one embodiment, a circuit-based apparatus that operates on an input data stream includes delay-line circuitry that characterizes the input data stream, modified over time. A plurality of integrators provide a plurality of integrated signals in response to the delay-line circuitry, and a plurality of weighting amplifiers amplify the plurality of integrated signals by a plurality of respective time-varying weighting factors to provide weighted signals. A signal-combining circuit combines the weighted signals. The circuit-based apparatus also includes a plurality of parallel signal-processing circuit paths that couple the weighted signals to the signal-combining circuit. By combining the weighted signals from the parallel signal-processing circuit paths, the signal-combining circuit provides a signal representative of the input data stream.

Abstract: Embodiments of the invention comprise a method of determining a position of a node, comprising receiving a communication from the node; determining a timing of the receiving; and calculating a position of the node from the timing.

Abstract: A system and method for motion estimation involves obtaining input image frames, where the input image frames correspond to different instances in time, and performing motion estimation on the input image frames using depth information from the input image frames, where the depth information from an input image frame indicates how far a pixel in the input image frame is located from a surface of a three dimensional space.

Abstract: Current MAC algorithms impose a significant system performance requirement in order to process messages in real time. According to an exemplary embodiment of the present invention, a hardware implemented generator for generating a MAC is provided, that results in a significant improvement in hardware performance requirements for processing messages in real time. The engine is based on linear feedback shift registers which are adapted to generate secure MACs.

Abstract: An isolation region (14) is formed between an edge termination region (2) having deep trenches (20,34) and the central region (4). The isolation region includes gate fingers (18) extending from the edge gate trench regions (28) to the gate trenches (6) in the central region (4) to electrically connect the edge gate trench regions to the gate trenches (6) in the central region. The isolation region also includes isolation fingers (22,24) extending from the edge termination region (2) towards the central region (4) and gate between the gate fingers (18) for reducing the breakdown voltage with a RESURF effect.

Abstract: A circuit for a switched mode power supply having a winding. The circuit comprising: an input configured to receive a winding voltage derived from the winding; a differentiation element configured to differentiate the winding voltage with respect to time in order to determine a derivative signal and compare the derivative signal with a threshold value; a steady state detector configured to set a zero derivative signal when the derivative signal has not exceeded the threshold value for a predetermined period of time, and a logic arrangement configured to identify an end of a demagnetization stroke of the switched mode power supply when the derivative signal crosses a final threshold value after the zero derivative signal has been set.

Abstract: A method of manufacturing a biosensor semiconductor device in which copper electrodes at a major surface of the device are modified to form Au—Cu alloy electrodes. Such modification is effected by depositing a gold layer over the device, and then thermally treating the device to promote interdiffusion between the gold and the electrode copper. Alloyed gold-copper is removed from the surface of the device, leaving the exposed electrodes. The electrodes are better compatible with further processing into a biosensor device than is the case with conventional copper electrodes, and the process windows are wider than for gold capped copper electrodes. A biosensor semiconductor device having Au—Cu alloy electrodes is also disclosed.

Abstract: A method of forming a biosensor chip enables a bond pad and detector electrode to be formed of different materials (one is formed of a connection layer such as copper and the other is formed of a diffusion barrier layer such as tantalum or tantalum nitride). A single planarizing operation is used for both the bond pad and the detector electrode. By using the same processing, resist patterning on an already-planarized surface is avoided, and the cleanliness of both the bond pad and detector electrode is ensured. Self-aligned nanoelectrodes and bond pads are obtained.