Patents Assigned to NXP
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Patent number: 11509461Abstract: A method for securing an integrated circuit chip includes obtaining a first value from a first storage area in the chip, obtaining a second value from a second storage area in the chip, generating a third value based on the first value and the second value, and converting a first opcode command obfuscated as a second opcode command into a non-obfuscated form of the first opcode command based on the third value. The first value corresponds to a physically unclonable function (PUF) of the chip. The second value is a key including information indicating a type of obfuscation performed to obfuscate the first opcode command as the second opcode command. The third value may be an inversion flag indicating a type of obfuscation performed to obfuscate the first opcode command as the second opcode command.Type: GrantFiled: April 14, 2021Date of Patent: November 22, 2022Assignee: NXP B.V.Inventors: Jan-Peter Schat, Fabrice Poulard, Andreas Lentz
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Patent number: 11508669Abstract: A structure is provided that reduces the stress generated in a semiconductor device package during cooling subsequent to solder reflow operations for coupling semiconductor devices to a printed circuit board (PCB). Stress reduction is provided by coupling solder lands to metal-layer structures using traces on the PCB that are oriented approximately perpendicular to lines from an expansion neutral point associated with the package. In many cases, especially where the distribution of solder lands of the semiconductor device package are uniform, the expansion neutral point is in the center of the semiconductor device package. PCB traces having such an orientation experience reduced stress due to thermal-induced expansion and contraction as compared to traces having an orientation along a line to the expansion neutral point.Type: GrantFiled: August 30, 2019Date of Patent: November 22, 2022Assignee: NXP B.V.Inventors: Leo van Gemert, Jeroen Johannes Maria Zaal, Michiel van Soestbergen, Romuald Olivier Nicolas Roucou
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Patent number: 11509326Abstract: A sigma-delta ADC comprising: a first-input-terminal configured to receive a first-high-voltage-analogue-input-signal; a second-input-terminal configured to receive a second-high-voltage-analogue-input-signal; an output-terminal configured to provide an output-digital-signal, wherein the output-digital-signal is representative of the difference between the first-high-voltage-analogue-input-signal and the second-high-voltage-analogue-input-signal. The sigma-delta ADC also includes a feedback-current-block, which comprises: a first-feedback-transistor having a conduction channel; a second-feedback-transistor having a conduction channel; a first-feedback-switch; a second-feedback-switch; a first-feedback-current-source; and a second-feedback-current-source.Type: GrantFiled: May 17, 2021Date of Patent: November 22, 2022Assignee: NXP USA, Inc.Inventors: Simon Brule, Thierry Dominique Yves Cassagnes, Pascal Sandrez, Soufiane Serser
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Patent number: 11509335Abstract: A radio frequency (RF) multiplexer circuit is provided. The multiplexer includes a first circuit coupled between a first input terminal and a first output terminal. The first circuit is configured and arranged to transfer a first RF signal coupled at the first input terminal to the first output terminal as a first output signal when a first control signal is at a first logic value. The multiplexer includes a second circuit coupled between a second input terminal and the first output terminal. The second circuit is configured and arranged to transfer a second RF signal coupled at the second input terminal to the first output terminal as a second output signal having a gain higher than the gain of the second RF signal when the first control signal is at a second logic value.Type: GrantFiled: July 29, 2020Date of Patent: November 22, 2022Assignee: NXP USA, INC.Inventor: Yi Yin
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Patent number: 11508606Abstract: A technique for handling an integrated circuit/tape assembly having a plurality of integrated circuits supported by underlying dicing tape involves placing the integrated circuit/tape assembly on a bottom file frame carrier (FFC) frame having structure (e.g., an inner rim or flexible pegs), placing a top FFC frame having a central opening over the integrated circuit/tape assembly, and mating the top and bottom FFC frames such that the dicing tape is pulled over the structure thereby laterally stretching the dicing tape, which breaks wafer saw bows holding the integrated circuits together. The lateral stretching of the dicing tape increases distance between adjacent integrated circuits in at least two mutually orthogonal lateral directions, thereby inhibiting the adjacent integrated circuits from colliding during shipment or storage for subsequent processing. The resulting assembly can be thinner than conventional FFC configurations, which results in more efficient shipment and storage.Type: GrantFiled: November 5, 2019Date of Patent: November 22, 2022Assignee: NXP B.V.Inventors: Antonius Hendrikus Jozef Kamphuis, Guido Albermann, Johannes Cobussen
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Patent number: 11509495Abstract: The present disclosure includes systems and techniques relating to broadcast and multicast in a wireless communication system. In some implementations, an announcement frame indicating a broadcast or multicast service period to multiple second wireless devices is transmitted by a first wireless device. The announcement frame indicates (i) an end time of the broadcast or multicast service period and (ii) an order of a sequence of frames to be directed to the multiple second wireless devices. Each of the sequence of frames is transmitted at the first wireless device using a directional antenna pattern to a respective one of the multiple second wireless devices, according to the order of the sequence of frames indicated in the announcement frame. An acknowledgement frame in response to the each of the sequence of frames is received at the first wireless device from the respective one of the multiple second wireless devices.Type: GrantFiled: March 2, 2020Date of Patent: November 22, 2022Assignee: NXP USA, Inc.Inventors: Jinjing Jiang, Liwen Chu, Lei Wang, Yakun Sun, Hongyuan Zhang, Huiling Lou
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Patent number: 11507491Abstract: First and second processors that are in communication with each other are disclosed. The first processor includes a sampling controller, a sampling circuit, and a data flow controller. The sampling controller is configured to receive multiple identifiers and corresponding enable signals associated with data that is to be transmitted to or received from the second processor, and generate an identification signal and a sampling signal based on one of the identifiers and the corresponding enable signal. The sampling circuit is configured to sample multiple data counts to generate corresponding sampled counts based on the identification signal and the sampling signal. The data flow controller is configured to generate a control signal based on the identifiers, the corresponding enable signals, the data counts, and the corresponding sampled counts to control data flow between the first and second processors.Type: GrantFiled: September 25, 2020Date of Patent: November 22, 2022Assignee: NXP USA, Inc.Inventors: Arvind Kaushik, Amrit Pal Singh, Puneet Khandelwal
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Patent number: 11509171Abstract: A controller for generating a sequence of pulse is disclosed. The controller includes a plurality of pulse width modulation (PWM) modules. Each PWM Module configured to generate a first sequence of pulses and a second sequence of pulses each having a width that is modulated by a PWM value stored in a PWM register of the PWM module. Each PWM module includes two outputs. The first sequence of pulses is outputted on the first output and the second sequence of pulses is outputted on the second output. The controller also includes a memory having a plurality of memory tables and a plurality of direct memory access (DMA) modules. Each memory table configured to store PWM values to be written into the PWM register and each DMA module is coupled to a respective PWM module in the plurality of PWM modules and to a respective memory table in the plurality of memory tables and configured to write a PWM value from the memory table into the PWM register in response to a DMA trigger.Type: GrantFiled: October 20, 2020Date of Patent: November 22, 2022Assignee: NXP USA, Inc.Inventors: Lukas Vaculik, Ivan Sieklik, Radek Holis
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Patent number: 11501206Abstract: A method and machine learning system for detecting adversarial examples is provided. A first machine learning model is trained with a first machine learning training data set having only training data samples with robust features. A second machine learning model is trained with a second machine learning training data set, the second machine learning training data set having only training data samples with non-robust features. A feature is a distinguishing element in a data sample. A robust feature is more resistant to adversarial perturbations than a non-robust feature. A data sample is provided to each of the first and second trained machine learning models during an inference operation. if the first trained machine learning model classifies the data sample with high confidence, and the second trained machine learning model classifies the data sample differently with a high confidence, then the data sample is determined to be an adversarial example.Type: GrantFiled: September 20, 2019Date of Patent: November 15, 2022Assignee: NXP B.V.Inventors: Brian Ermans, Peter Doliwa, Christine van Vredendaal
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Patent number: 11500970Abstract: A method and data processing system are provided for determining if a machine learning model has been copied. The machine learning model has a plurality of nodes, the plurality of nodes is organized as a plurality of interconnected layers, and the plurality of interconnected layers includes an input layer and an output layer. The output layer has a predetermined number of output nodes for classifying input samples into a predetermined number of categories, where each output node corresponds to a category. An additional watermarking node is added to the output layer. The model is trained to classify the input data into the predetermined number of categories and into an additional category for the additional node. The additional node may be added to another model to determine if the another model is a copy or clone of the ML model.Type: GrantFiled: August 2, 2019Date of Patent: November 15, 2022Assignee: NXP B.V.Inventors: Joppe Willem Bos, Simon Johann Friedberger, Nikita Veshchikov, Christine van Vredendaal
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Patent number: 11502558Abstract: One example discloses an inductive power transmit device, including: a power controller configured to be coupled to a set of primary inductive coils; wherein the power controller is configured to supply power to a first subset of the primary coils; wherein the first subset of primary coils are configured to inductively transfer power to a set of secondary inductive coils; wherein the power controller is configured to supply the power to a second subset of the primary coils in response to a threshold movement of the secondary inductive coils with respect to the primary inductive coils; and wherein the power controller is configured to determine the movement based on the power supplied to the first subset of primary coils, and a ratio of power supplied to one primary coil in the first subset of primary coils as compared to power supplied to all coils in the first subset of coils.Type: GrantFiled: November 4, 2019Date of Patent: November 15, 2022Assignee: NXP USA, Inc.Inventor: Ivan Sieklik
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Patent number: 11502068Abstract: A semiconductor device package having galvanic isolation is provided. The semiconductor device includes a package substrate having a first inductive coil formed from a first conductive layer and a second inductive coil formed from a second conductive layer. The first conductive layer and the second conductive layer are separated by a non-conductive material. A first semiconductor die is attached to a first major side of the package substrate. The first semiconductor die is conductively interconnected to the first inductive coil. A second semiconductor die is attached to the first major side of the package substrate. A first wireless communication link between the first semiconductor die and the second semiconductor die is formed by way of the first and second inductive coils.Type: GrantFiled: March 3, 2021Date of Patent: November 15, 2022Assignee: NXP USA, INC.Inventors: Burton Jesse Carpenter, Fred T. Brauchler
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Patent number: 11501108Abstract: Various embodiments relate to a method of producing a machine learning model with a fingerprint that maps an input value to an output label, including: selecting a set of extra input values, wherein the set of extra input values does not intersect with a set of training labeled input values for the machine learning model; selecting a first set of artificially encoded output label values corresponding to each of the extra input values in the set of extra input values, wherein the first set of artificially encoded output label values are selected to indicate the fingerprint of a first machine learning model; and training the machine learning model using a combination of the extra input values with associated first set of artificially encoded output values and the set of training labeled input values to produce the first learning model with the fingerprint.Type: GrantFiled: July 24, 2018Date of Patent: November 15, 2022Assignee: NXP B.V.Inventors: Wilhelmus Petrus Adrianus Johannus Michiels, Gerardus Antonius Franciscus Derks, Marc Vauclair, Nikita Veshchikov
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Patent number: 11502698Abstract: A passive sigma-delta modulator including first modulator loop, a second modulator loop, and a digital combiner providing an output signal. The first modulator loop includes a first quantizer, a first passive summing junction, a first continuous-time passive analog loop filter, and a first feedback path. The second modulator loop includes a second quantizer, analog transfer circuitry, a second continuous-time passive summing junction, a second passive analog loop filter, a second feedback path, and digital transfer circuitry having a gain that is substantially a reciprocal of the analog transfer circuitry. A digital noise cancelation filter may be located between the first quantizer and the digital combiner, or an analog noise cancelation filter may be provided within the second modulator loop. Single-ended or differential configurations are contemplated.Type: GrantFiled: August 10, 2021Date of Patent: November 15, 2022Assignee: NXP B.V.Inventor: Robert van Veldhoven
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Patent number: 11502054Abstract: A method of forming a packaged semiconductor device includes attaching a backside surface of a semiconductor die to a major surface of a package substrate. A first conductive connector is formed over a portion of an active surface of the semiconductor die and a portion of the major surface of the package substrate. A first conductive connection between a first bond pad of the semiconductor die and a first substrate pad of the package substrate is formed by way of the first conductive connector. A bond wire connects a second bond pad of the semiconductor die to a second substrate pad of the package substrate. The first bond pad located between the second bond pad and an edge of the semiconductor die.Type: GrantFiled: November 11, 2020Date of Patent: November 15, 2022Assignee: NXP USA, INC.Inventor: Jinbang Tang
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Patent number: 11500976Abstract: A biometric authentication method is provided. In the method, identification information is collected from a user. A biometric scanner is used to scan a particular biometric characteristic of the user. If the user identification corresponds to the scanned biometric characteristic, then the scanner requests the user perform a predetermined action of a portion of the user's body. The predetermined action may be, for example, a hand gesture. The biometric characteristic is monitored while the predetermined action is being scanned. The scanner determines that the predetermined action is performed with the same portion of the user's body that was scanned for the biometric characteristic. The scanner determines if the portion of the user's body leaves the scanning area and monitors the scanning area for extraneous objects. The method provides more resistance against a replay attack.Type: GrantFiled: November 3, 2020Date of Patent: November 15, 2022Assignee: NXP B.V.Inventors: Nikita Veshchikov, Christine van Vredendaal
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Patent number: 11502682Abstract: A radio frequency, RF, switch circuit (201, 301, 401, 501, 601, 701, 751, 801) includes at least one first PiN diode device (252, 352, 452, 552, 652, 752, 852, 945) configured to sink or source a first alternating current; and an impedance inversion circuit (222, 322, 422, 522, 622, 722, 822, 922), connected to the at least one first PiN diode device and arranged to provide a transformed impedance between a first side of the impedance inversion circuit and a second side of the impedance inversion circuit. The RF switch further includes a second diode-based device (254, 354, 454, 554, 654, 754, 854, 945) configured to source or sink a second alternating current; and a bias circuit (330, 430, 530, 630, 830, 930) connected to at least one of the at least one first PiN diode device and the second diode-based device, wherein the at least one first PiN diode device cooperates with the second diode-based device as a push-pull current circuit.Type: GrantFiled: June 17, 2021Date of Patent: November 15, 2022Assignee: NXP B.V.Inventors: Xin Yang, Mark Pieter van der Heijden, Jozef Reinerus Maria Bergervoet, Jasper Pijl
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Patent number: 11501212Abstract: A method for protecting a first machine learning (ML) model is provided. In the method, a dataset of non-problem domain (NPD) data is selected from a large dataset using a second ML model. The second ML model classifies the large dataset into NPD classifications and PD classifications. The PD classified data is excluded. A distinguisher includes a third ML model that is trained using selected NPD data from the large dataset. The distinguisher receives input samples that are intended for the first ML model. The third ML model provides either a PD classification or NPD classification in response to receiving each input sample. An indication of a likely extraction attempt may be provided when a predetermined number of NPD classifications are provided. The method provides an efficient way to create a training dataset for a distinguisher and for protecting a ML model with the distinguisher.Type: GrantFiled: April 21, 2020Date of Patent: November 15, 2022Assignee: NXP B.V.Inventors: Christine van Vredendaal, Wilhelmus Petrus Adrianus Johannus Michiels
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Patent number: 11498829Abstract: A no-gel sensor package is disclosed. In one embodiment, the package includes a microelectromechanical system (MEMS) die having a first substrate, which in turn includes a first surface on which is formed a MEMS device. The package also includes a polymer ring with an inner wall extending between first and second oppositely facing surfaces. The first surface of the polymer ring is bonded to the first surface of the first substrate to define a first cavity in which the MEMS device is contained. A molded compound body having a second cavity that is concentric with the first cavity, enables fluid communication between the MEMS device and an environment external to the package.Type: GrantFiled: January 16, 2020Date of Patent: November 15, 2022Assignee: NXP USA, INC.Inventors: Stephen Ryan Hooper, Mark Edward Schlarmann, Michael B. Vincent, Scott M. Hayes, Julien Juéry
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Patent number: 11502727Abstract: Disclosed is a method for determining a type of an object arranged in a radio frequency, RF, field transmitted by an NFC reader device. This method involves analyzing the oscillatory behavior in the NFC reader device, after the RF field transmitted by the reader has been switched off, using a decomposition scheme with a degree M for decomposing a decay signal trace into M superimposed components. The method involves predetermining the decomposition scheme with a degree M for decomposing a decay signal trace into M superimposed components, e.g. weighted oscillation components, wherein each one of said M superimposed components is defined by a predetermined superimposition function, which in turn is determined by an associated set of characteristic parameters, and storing, e.g. in a database that is accessible for the P&E unit, an indication of the decomposition scheme and the M predetermined superimposition functions.Type: GrantFiled: September 22, 2021Date of Patent: November 15, 2022Assignee: NXP B.V.Inventors: Johannes Stahl, Ulrich Andreas Muehlmann