Abstract: Aspects of the disclosure provide an apparatus for wireless communication. The apparatus includes a transceiver and a processing circuit. The transceiver is configured to transmit and receive wireless signals. The processing circuit is configured to configure a field within a data unit for buffer information report, determine a first scale factor for scaling a first value indicative of buffered traffic of a first category, and a second scale factor for scaling a second value indicative of buffered traffic of a category, configure the field to include the first scale factor with the first value and the second scale factor with the second value, and provide the data unit to the transceiver for transmitting to another apparatus that allocates resources for transmission between the two apparatuses.

Abstract: An electronic control key including security check circuitry used by an inductive system to perform at least one security check to determine whether to enable authorized functions. The inductive system receives power and enables communications via an inductive link for backup operation. The security check circuitry may include battery status circuitry and distance measurement circuitry. The inductive system invokes the distance measurement circuitry to perform a secure distance check when the battery status is good, in which the inductive system enables authorized functions only when the secure distance check passes. The security check circuitry may include a motion detector for performing a motion inquiry. The motion inquiry may include detecting motion of the electronic control key or detecting a predetermined characteristic movement or a programmed motion pattern. The security check circuitry may be a button in which authorized functions are enabled only when the button is pressed.

Abstract: A packaged semiconductor device includes a substrate having input/output (I/O) pads, a semiconductor die attached to the substrate and electrically connected to the substrate with bond wires. A bond-wire reinforcement structure is formed over the bond wires before the assembly is covered with a molding compound. The bond-wire reinforcement structure prevents wire sweep during molding and protects the wires from shorting with other wires. In one embodiment, the bond-wire reinforcement structure is formed with a fiberglass and liquid epoxy mixture.

Abstract: In accordance with a first aspect of the present disclosure, a power converter is disclosed, comprising: an input configured to receive an input voltage; an output configured to provide an output voltage; a power switching block coupled between the input and the output; a controller configured to control the power switching block, wherein the controller is configured to open and close switches comprised in the power switching block, wherein the controller is further configured to control a resistance of the power switching block. In accordance with a second aspect of the present disclosure, a corresponding method of operating a power converter is conceived.

Abstract: An apparatus for electrostatic discharge protection. In one embodiment, an integrated circuit (IC) includes a trigger circuit configured to generate a trigger voltage VT in response to an electrostatic discharge (ESD) event. A plurality of metal oxide semiconductor (MOS) transistors are coupled to the trigger circuit. The plurality of MOS transistors are configured to conduct ESD current from a plurality of circuit nodes, respectively, to a ground conductor in response to the trigger circuit generating the trigger voltage VT. A voltage limiter circuit is also included and is configured to limit the trigger voltage VT.

Abstract: A method and apparatus for battery stack monitoring and balancing. In one embodiment the apparatus includes a first low-pass filter (LPF) coupled between a first terminal and a first input node of a circuit that comprises a plurality of input nodes, wherein the first terminal is configured to be coupled to a positive terminal of a battery cell. A second LPF is coupled between the first terminal and a second input node of the circuit. A first circuit is coupled between the first terminal and a second terminal, wherein the first circuit is configured to transmit current between the first and second terminals when activated, and wherein the second terminal is configured to be coupled to a negative terminal of the battery cell. A second circuit is coupled between the second and third input nodes, wherein the second circuit is configured to activate the first circuit in response to the second circuit receiving a control signal.

Abstract: Aspects of the present disclosure are directed to a method and/or apparatus for use with battery cells having an actual voltage-sourcing level that is at or above a specified battery-output level. Switch circuitry is selectively activated for passing current, and a monitoring circuit is responsive to activation of the switching circuitry by distributing energy corresponding to an actual voltage-sourcing level of a particular one of the battery cells to a voltage node. A voltage-measurement circuit provides an indication of the actual voltage-sourcing level across the particular battery cell by ascertaining voltage differentials between the voltage node and respective voltage nodes of the battery cell, the ascertained voltage differentials being less than the specified battery-output level.

Abstract: A data processing system and method for generating a digital code for use as a physically unclonable function (PUF) response is provided. The method includes activating a plurality of word lines for a read operation. A first bit line is coupled to a first input of a comparator during the read operation. A second bit line is coupled to a second input of the comparator during the read operation. A current is generated on each of the first and second bit lines. The currents on the first and second bit lines are converted to voltages. The voltage on the first bit line is compared to the voltage on the second bit line. A logic bit is output from the comparator as part of the digital code, a logic state of the logic bit is determined in response to the comparison. By selecting multiple word lines to determine a PUF response, noise immunity is improved.

Abstract: A controller for a secondary side of a switched mode power supply. A thermistor and an LED of an optocoupler are connected in parallel with each other between a voltage-supply-pin and a STOP pin of the controller. A reference-source provides a reference-signal between the STOP pin and the voltage-supply-pin. The STOP pin receives a temperature-measurement-signal from the thermistor, wherein the temperature-measurement-signal is representative of the resistance of the thermistor. The controller also includes an OTP-comparator that compares: (i) the temperature-measurement-signal; with (ii) a threshold-level, and provides an OTP-signal that is representative of whether or not the temperature-measurement-signal at the STOP pin crosses the threshold-level; and a switchable-current-source that selectively provides a bias-current to the STOP pin based on the OTP-signal, wherein the bias-current causes the LED to emit a light-signal that is representative of a fault to an associated photo-detector.

Abstract: A communication unit (700) is described that includes a plurality of cascaded devices that comprise at least one master device (710) and at least one slave device (720, 723) configured in a master-slave arrangement. The at least one master device (710) and at least one slave device (720, 723) each comprise: an analog-to-digital converter, ADC, (741, 742) configured to use a same re-created system clock signal (788, 790) to align respective sampling instants between each ADC (741, 742). The at least one master device (710) comprises: a clock generation circuit comprising an internally-generated reference phase locked loop circuit (708), configured to output a system clock signal (782, 784); and a modulator circuit (762) coupled to the clock generation circuit and configured to receive and distribute the system clock signal (784).

Abstract: Embodiments are provided for a radar system including: an N number of transmit antennas; a chirp generator configured to produce linear chirp waveforms; an N number of phase shift keying (PSK) coders, each assigned a respective optimized transmitter code of a set of optimized transmitter codes, each optimized transmitter code of the set comprises a sequence of K code chips, each optimized transmitter code of the set is orthogonal to every other optimized transmitter code of the set, spectral analysis of a cross-correlation between any two optimized transmitter codes results in sidelobes no greater than a predetermined detection threshold, each PSK coder encodes K linear chirp waveforms according to the sequence of K code chips of the respective optimized transmitter code and produces a respective optimized coded chirp sequence, and each of the N transmit antennas outputs the respective optimized coded chirp sequence at the same time.

Abstract: Embodiments of a power amplifier and method of operating a power amplifier are disclosed. In one embodiment, a power amplifier includes a pulse wave modulation (PWM) controller, a first power control stage configured to drive a first output between VDD and VSS in response to a control signal from the PWM controller, a second power control stage configured to drive a second output between VDD and VSS in response to a control signal from the PWM controller, and a mid-voltage control circuit configured to hold the voltage of the first output at a mid-voltage that is between VDD and VSS during an interval between when the first output is driven between VDD and VSS and hold the voltage of the second output at the mid-voltage during an interval between when the first output is driven between VDD and VSS.

Abstract: A method for facilitating a relative position determination is disclosed, comprising: a first radio frequency (RF) communication device measures a first angle of arrival, being an angle of arrival of a first RF signal received from a second RF communication device; the first RF communication device senses its orientation at a first time, resulting in a first orientation; the first RF communication device measures a second angle of arrival, being an angle of arrival of a second RF signal received from the second RF communication device; the first RF communication device senses its orientation at a second time, resulting in a second orientation; the relative position of the second RF communication device with respect to the first RF communication device is determined using a difference between the first angle of arrival and the second angle of arrival and a difference between the first orientation and the second orientation.

Abstract: As disclosed herein, a non-volatile memory circuit includes an array of memory cells. The non-volatile memory circuit also includes circuitry for performing a hard write to selective bits of addressed cells simultaneously with a normal write to the other bits of the addressed cells during a write operation to the addressed cells.

Abstract: A wireless power receiver has over-voltage protection (OVP) circuitry that performs different techniques for different over-voltage conditions. The OVP circuitry includes controllable resistive clamp circuitry (a resistor in series with a resistor control switch) and controllable capacitive clamp circuitry (a capacitor in series with a capacitor control switch). Based on an output-based feedback signal and a reference signal, comparison circuitry generates comparison signals, based on which a controller selectively enables (i) the resistive clamp circuitry intermittently for a relatively low over-voltage condition and continuously for a higher over-voltage condition and (ii) the capacitive clamp circuit to detune the receiver, both in order to decrease the rectified output voltage.

Abstract: Various embodiments relate to a circuit for power factor correction (“PFC”), the circuit including: a mains filter and rectifier configured to generate an input voltage for power factor correction and transmit the input voltage to a PFC controller and a load block; a voltage regulator configured to regulate the input voltage and output a control signal to an adder; a mains voltage sensor configured to sense a mains voltage and output a sensed mains voltage; a bandpass filter configured to filter out frequencies in a range of resonance frequencies of the sensed mains voltage and output an additional signal; and an adder configured to add the additional signal to the control signal and output a desired input current to the PFC controller.

Abstract: An integrated circuit for use in a differential network bus node comprising: a transceiver having a first transceiver input-output terminal and a second transceiver input-output terminal; a physical layer high terminal connected to the first transceiver input-output-terminal; a physical layer low terminal connected to the second transceiver input-output terminal; and a physical layer interface circuit comprising: a first low frequency RC matching circuit and a first high frequency RC matching circuit each connected between the first transceiver input-output-terminal and a first reference terminal; and a second low frequency RC matching circuit and a second high frequency RC matching circuit each connected between the second transceiver input-output terminal and a second reference terminal.

Abstract: Various embodiments relate to a single slope analog to digital converter (ADC), including: a voltage slope generator configured to generate a voltage slope based upon a fixed current and variable current; an analog comparator configured to compare a voltage to a voltage output from the voltage slope generator; a first register configured to store a first count based upon a reference voltage being input into the analog comparator; a second register configured to store a second count based upon an input voltage being input into the analog comparator, wherein the input voltage is the voltage to be converted to a digital value by the ADC; and a digital to analog converter (DAC) configured to produce a slope trim signal based upon the voltage slope output by the voltage slope generator, the first count, and a count target associated with the voltage reference, wherein the variable current in the voltage slope generator is based upon the slope trim signal.

Abstract: A current operating system that is stored in a persistent storage circuit of a secure element is replaced by receiving a set of migration rules that specify changes to a set of data object types. Based upon the set of migration rules, a migration engine identifies data objects stored in a persistent storage circuit and corresponding to the set of data object types. For each of the identified data objects: a subset of the migration rules are selected that correspond to a data object type that corresponds to a particular data object, and based upon the selected subset, the particular data object is transformed. A new operating system can then be enabled.

Abstract: Systems and methods are provided for continuously monitoring operation of a sensing device, in which the sensing device includes a MEMS gyroscope and a quadrature feedback loop coupled to the MEMS gyroscope, the quadrature feedback loop including a quadrature feedback controller. A test signal generator is configured to generate and apply a test signal to the quadrature feedback loop at an input of the quadrature feedback controller. A fault detector is coupled to an output of the quadrature feedback controller. The fault detector is configured to receive a quadrature feedback signal, detect effects of the test signal in the quadrature feedback signal, and generate a monitor output indicative of the operation of the sensing device base on the detected effects of the test signal.