Patents Assigned to OmniVision Technologies, Inc.
  • Patent number: 12005890
    Abstract: A failure detection circuit for an image sensor includes a first input node, an array of second input nodes, and an output stage. The first input node is coupled to a reference voltage. The array of second input nodes has each input node coupled to receive a signal from a bitline of a bitline array in an image sensor that includes an array of pixels with each pixel is coupled to at least one bitline of the bitline array. The output stage is coupled to generate an output voltage indicative of any of the second input nodes being lower than the reference voltage.
    Type: Grant
    Filed: April 1, 2022
    Date of Patent: June 11, 2024
    Assignee: OmniVision Technologies, Inc.
    Inventors: Zhenfu Tian, Liang Zuo, Yan Li, Wen He, Satoshi Sakurai
  • Publication number: 20240187751
    Abstract: The pixel circuit of the image sensor includes one or more photoelectric conversion elements that generates charges in response to incident light, a first capacitance that receives and stores the charges generated in the one or more photoelectric conversion elements, a second capacitance that is connected to the first capacitance via a switch, and a comparator that compares the amount of charges stored in the first capacitance with a predetermined value. The second capacitance is connected to the first capacitance via the switch, and the pixel circuit includes a comparator that compares the amount of the charges stored in the first capacitance with a predetermined value. When the amount of the charges accumulated in the first capacitance in the comparator is greater than the predetermined value, the switch is turned on and the charges are accumulated by the capacitance that is the sum of the first capacitance and the second capacitance.
    Type: Application
    Filed: July 27, 2023
    Publication date: June 6, 2024
    Applicant: OmniVision Technologies, Inc.
    Inventors: Hiroki Ui, Eiichi Funatsu
  • Patent number: 11990496
    Abstract: Pixels, such as for image sensors and electronic devices, include a photodiode formed in a semiconductor substrate, a floating diffusion, and a transfer structure selectively coupling the photodiode to the floating diffusion. The transfer structure includes a transfer gate formed on the semiconductor substrate, and a vertical channel structure including spaced apart first doped regions formed in the semiconductor substrate between the transfer gate and the photodiode. Each spaced apart first doped region is doped at a first dopant concentration with a first-type dopant. The spaced apart first doped regions are formed in a second doped region doped at a second dopant concentration with a second-type dopant of a different conductive type.
    Type: Grant
    Filed: January 5, 2022
    Date of Patent: May 21, 2024
    Assignee: OMNIVISION TECHNOLOGIES, INC.
    Inventors: Qin Wang, Hui Zang
  • Patent number: 11991465
    Abstract: Low power event driven pixels with passive, differential difference detection circuitry (and reset control circuits for the same) are disclosed herein. In one embodiment, an event driven pixel comprises a photosensor, a photocurrent-to-voltage converter, and a difference circuit. The difference circuit includes (a) a first circuit branch configured to sample a reference light level based on a voltage output by the photocurrent-to-voltage converter, and to output a first analog light level onto a first column line that is based on the reference light level; and (b) a second circuit branch configured to sample a light level based on the voltage, and to output a second analog light level onto a second column line that is based on the light level. A difference between the second analog light level and the first analog light level indicates whether the event driven pixel has detected an event in an external scene.
    Type: Grant
    Filed: July 27, 2022
    Date of Patent: May 21, 2024
    Assignee: OmniVision Technologies, Inc.
    Inventors: Andreas Suess, Shoushun Chen
  • Patent number: 11991458
    Abstract: An arithmetic logic unit (ALU) includes a front end latch stage coupled to a signal latch stage coupled to a Gray code (GC) to binary stage. First inputs of an adder stage are coupled to receive outputs of the GC to binary stage. Outputs of the adder stage are generated in response to the first inputs and second inputs of the adder stage. A pre-latch stage is coupled to latch outputs of the adder stage. A feedback latch stage is coupled to latch outputs of the pre-latch stage. The second inputs of the adder stage are coupled to receive outputs of the feedback latch stage. The feedback stage includes first conversion gain feedback latches configured to latch outputs of the pre-latch stage having a first conversion gain and second conversion gain feedback latches configured to latch outputs of the pre-latch stage having a second conversion gain.
    Type: Grant
    Filed: September 21, 2022
    Date of Patent: May 21, 2024
    Assignee: OmniVision Technologies, Inc.
    Inventors: Lihang Fan, Nijun Jiang, Rui Wang
  • Patent number: 11984464
    Abstract: Examples of the disclosed subject matter propose disposing trench isolation structure around the perimeter of the pixel transistor region of the pixel cell. The trench isolation structure includes front side (e.g., shallow and deep) trench isolation structure and back side deep trench isolation structure that abut against or contacts the bottom of front side deep trench isolation structure for isolating the pixel transistor channel of the pixel cell's pixel transistor region. The formation and arrangement of the trench isolation structure in the pixel transistor region forms a floating doped well region, containing, for example, a floating diffusion (FD) and source/drains (e.g., (N) doped regions) of the pixel transistors. This floating P-well region aims to reduce junction leakage associated with the floating diffusion region of the pixel cell.
    Type: Grant
    Filed: July 8, 2020
    Date of Patent: May 14, 2024
    Assignee: OmniVision Technologies, Inc.
    Inventors: Seong Yeol Mun, Yuanliang Liu
  • Patent number: 11985435
    Abstract: A compact camera includes an image sensor, a transparent layer, and a microlens (ML) layer, between the image sensor and the transparent layer. The ML layer forms (a) a first ML array having a plurality of first MLs, and (b) a second ML array with a plurality of second MLs interleaved with the plurality of first MLs. The compact camera also includes a baffle layer, between the ML layer and the image sensor, that forms a plurality of first aperture stops each aligned with a different one of the first MLs and a plurality of second aperture stops each aligned with a different one of the second MLs. The first MLs each have a first set of optical characteristics and the second MLs each have a second set of optical characteristics that are different from the first set of optical characteristics.
    Type: Grant
    Filed: June 8, 2022
    Date of Patent: May 14, 2024
    Assignee: OmniVision Technologies, Inc.
    Inventor: Shih-Hsin Hsu
  • Patent number: 11985437
    Abstract: A time-of-flight pixel array includes photodiodes that generate charge in response to incident reflected modulated light. First transfer transistors transfer a first portion of the charge from the photodiodes in response to a first modulation signal and second transfer transistors transfer a second portion of the charge from the photodiodes in response to a second modulation signal, which is an inverted first modulation signal. First floating diffusions are coupled to the first transfer transistors. A binning transistor is coupled between one of the first floating diffusions and another one of the first floating diffusions. A first memory node is coupled to one of the first floating diffusions through a first sample and hold transistor and a second memory node is coupled to another one of the first floating diffusions through a second sample and hold transistor.
    Type: Grant
    Filed: November 3, 2021
    Date of Patent: May 14, 2024
    Assignee: OmniVision Technologies, Inc.
    Inventors: Andreas Suess, Zheng Yang
  • Patent number: 11984463
    Abstract: A flare-reducing image sensor includes a plurality of pixels, NP in number, and a plurality of microlenses, NML in number, where each of the plurality of microlenses is aligned to a respective one of the plurality of pixels, such that NP=NML. The flare-reducing image sensor further includes a plurality of phase-shifting layers, NL, in number, where each phase-shifting layer is aligned with a respective one of the plurality of microlenses, where NL, is less than or equal to NML.
    Type: Grant
    Filed: September 1, 2021
    Date of Patent: May 14, 2024
    Assignee: OmniVision Technologies, Inc.
    Inventors: Qin Wang, Chao Niu
  • Patent number: 11978753
    Abstract: Process to release Silicon stress in forming CMOS image sensor. In one embodiment, a method for manufacturing an image sensor includes providing a first wafer that is a semiconductor substrate, where the first wafer has a first side and a second side opposite from the first side. The method also includes attaching a second wafer to the second side of the first wafer. The method further includes forming isolation structures in the second wafer by etching. The isolation structures are bounded by the second side of the first wafer. The method also includes growing an epitaxial layer between individual isolation structures.
    Type: Grant
    Filed: May 4, 2021
    Date of Patent: May 7, 2024
    Assignee: OMNIVISION TECHNOLOGIES, INC.
    Inventors: Yuanliang Liu, Hui Zang
  • Patent number: 11973098
    Abstract: An image sensor module comprises an image sensor having a light sensing area, a cover glass for covering the light sensing area, a dam between the image sensor and the cover glass, which surrounds the light sensing area, and has an outer wall and an inner wall, where a cross-section of the inner wall parallel to the surface of the light sensing area of the image sensor forms a sawtooth pattern and/or, where a cross-section of the inner wall orthogonal to the surface of the light sensing area of the image sensor forms an inclined surface.
    Type: Grant
    Filed: October 26, 2022
    Date of Patent: April 30, 2024
    Assignee: OmniVision Technologies, Inc.
    Inventors: Wei-Feng Lin, En-Chi Li, Chi-Chih Huang
  • Patent number: 11968468
    Abstract: A ramp buffer circuit includes a ramp buffer input device having an input coupled to receive a ramp signal. A current monitor is circuit coupled to a power line and the ramp buffer input device to generate a current monitor signal in response to an input current conducted through the ramp buffer input device. A corner bias circuit is coupled to the current monitor circuit to generate an assist bias voltage in response to the current monitor signal. A bias current source is coupled to an output of the ramp buffer input device. An assist current source is coupled to the corner bias circuit and coupled between the output of the ramp buffer input device and ground to conduct an assist current from the output of the ramp buffer input device to ground in response to the assist bias voltage.
    Type: Grant
    Filed: April 13, 2022
    Date of Patent: April 23, 2024
    Assignee: OMNIVISION TECHNOLOGIES, INC.
    Inventors: Hiroaki Ebihara, Zhenfu Tian, Peter Bartkovjak, Satoshi Sakurai
  • Patent number: 11967602
    Abstract: A multi-pixel detector of an image sensor is described. The multi-pixel detector includes a first photodiode region disposed within a semiconductor substrate to form a first pixel, a second photodiode region disposed within the semiconductor substrate to form a second pixel adjacent to the first pixel, and a partial isolation structure extending from a first side of the semiconductor substrate towards a second side of the semiconductor substrate between the first photodiode region and the second photodiode region. A length of a lateral portion of the partial isolation structure between the first photodiode region and the second photodiode region is less than a lateral length of the first photodiode region.
    Type: Grant
    Filed: June 15, 2020
    Date of Patent: April 23, 2024
    Assignee: OmniVision Technologies, Inc.
    Inventors: Chun-Yung Ai, Kazufumi Watanabe, Chih-Wei Hsiung, Vincent Venezia
  • Patent number: 11948965
    Abstract: An uneven-trench pixel cell includes a semiconductor substrate that includes a floating diffusion region, a photodiode region, and, between a front surface and a back surface: a first sidewall surface, a shallow bottom surface, a second sidewall surface, and a deep bottom surface. The first sidewall surface and a shallow bottom surface define a shallow trench, located between the floating diffusion region and the photodiode region, that extends into the semiconductor substrate from the front surface. A shallow depth of the shallow trench exceeds a junction depth of the floating diffusion region. The second sidewall surface and a deep bottom surface define a deep trench, located between the floating diffusion region and the photodiode region, that extends into the semiconductor substrate from the front surface. A distance between the deep bottom surface and the front surface defines a deep depth, of the deep trench, that exceeds the shallow depth.
    Type: Grant
    Filed: April 1, 2021
    Date of Patent: April 2, 2024
    Assignee: OmniVision Technologies, Inc.
    Inventors: Hui Zang, Gang Chen
  • Patent number: 11942504
    Abstract: Image sensors include a pixel die that is stacked on a logic die. The logic die includes at least one function logic element disposed on a bond side thereof, and a logic oxide array of raised logic oxide features also disposed on the bond side. The pixel die includes a pixel array disposed on a light receiving side thereof, and a pixel oxide array of raised pixel oxide features disposed on a bond side of the pixel die. A plurality of outer bonds is disposed between an outer region of the logic die and an outer region of the pixel die. A plurality of inner bonds is formed at an inner region of the image sensor between the pixel oxide array and the logic oxide array, the inner bonds being spaced apart by a plurality of fluidly connected air gaps that extend between the logic die and the pixel die.
    Type: Grant
    Filed: August 15, 2022
    Date of Patent: March 26, 2024
    Assignee: OMNIVISION TECHNOLOGIES, INC.
    Inventor: Sing-Chung Hu
  • Patent number: 11943525
    Abstract: An electronic camera assembly includes a camera chip cube bonded to camera bondpads of an interposer; at least one light-emitting diode (LED) bonded to LED bondpads of the interposer at the same height as the camera bondpads; and a housing extending from the interposer and LEDs to the height of the camera chip cube, with light guides extending from the LEDs through the housing to a top of the housing. In embodiments, the electronic camera assembly includes a cable coupled to the interposer. In typical embodiments the camera chip cube has footprint dimensions of less than three and a half millimeters square.
    Type: Grant
    Filed: February 17, 2022
    Date of Patent: March 26, 2024
    Assignee: OmniVision Technologies, Inc.
    Inventors: Teng-Sheng Chen, Wei-Ping Chen, Jau-Jan Deng, Wei-Feng Lin
  • Patent number: 11901383
    Abstract: Methods of forming transistors include providing a substrate material, forming a recess to a first depth in the substrate material, the recess corresponding to a gate region and extending in a channel length direction and a channel width direction that is perpendicular to the channel length direction, forming a trench structure in the substrate material by deepening the recess to a second depth using an isotropic process, forming an isolation layer on the substrate material, forming a gate portion of the isolation layer on the substrate material such that the gate portion of the isolation layer extends into the trench structure, and forming a gate on the isolation layer such that the gate extends into the trench structure.
    Type: Grant
    Filed: April 22, 2022
    Date of Patent: February 13, 2024
    Assignee: OMNIVISION TECHNOLOGIES, INC.
    Inventors: Seong Yeol Mun, Young Woo Jung
  • Patent number: 11892654
    Abstract: A passive speckle-suppressing diffuser includes a microlens array for diffusing a light field originating from one or more coherent light beams, and a diffractive optical element mounted in series with the microlens array and having a pixelated thickness distribution, characterized by a spatial variation across the diffractive optical element, to impose a spatially varying phase shift on the light field. The pixelated thickness distribution may be configured such that the spatially varying phase shift suppresses speckle of the light field while minimizing introduction of distinct diffraction structure.
    Type: Grant
    Filed: October 7, 2019
    Date of Patent: February 6, 2024
    Assignee: OmniVision Technologies, Inc.
    Inventors: Shih-Hsin Hsu, Jau-Jan Deng, Wei-Ping Chen
  • Patent number: 11876110
    Abstract: SiGe photodiode for crosstalk reduction. In one embodiment, an image sensor includes a plurality of pixels arranged in rows and columns of a pixel array disposed in a semiconductor material. Each pixel includes a plurality of photodiodes. The plurality of pixels are configured to receive an incoming light through an illuminated surface of the semiconductor material. Each pixel includes a first photodiode comprising a silicon (Si) material; and a second photodiode having the Si material and a silicon germanium (SiGe) material.
    Type: Grant
    Filed: June 9, 2021
    Date of Patent: January 16, 2024
    Assignee: OMNIVISION TECHNOLOGIES, INC.
    Inventors: Heesoo Kang, Bill Phan, Seong Yeol Mun
  • Patent number: 11869267
    Abstract: A multiple-lens optical fingerprint reader for reading fingerprints through a display has a spacer; and multiple microlenses with concave and convex surfaces in a microlens array, each microlens of multiple lenses focuses light arriving at that microlens from a finger adjacent the display through the spacer forms an image on associated photosensors on a photosensor array of an image sensor integrated circuit. A method of verifying identity of a user includes illuminating a finger of the user with an OLED display; focusing light from the finger through arrayed microlenses onto a photosensor array, reading the array into overlapping electronic fingerprint images; extracting features from the overlapping fingerprint images or from a stitched fingerprint image, and comparing the features to features of at least one user in a library of features and associated with one or more fingers of one or more authorized users.
    Type: Grant
    Filed: October 27, 2021
    Date of Patent: January 9, 2024
    Assignee: OmniVision Technologies, Inc.
    Inventors: Jau-Jan Deng, Kuang-Ju Wang, Chun-Jen Wei