Abstract: A novel liquid crystal on silicon (LCoS) device includes an array of pixel electrodes having a highly reflective material formed thereon. In a particular embodiment, the pixel electrodes are aluminum and have silver pixel mirrors electroplated thereon. In a more particular embodiment, the LCoS device includes auxiliary circuitry facilitating the electroplating of the pixel mirrors.

Abstract: An image sensor has multiple blocks each with multiple pixels; each block uses a separate analog-to-digital converter (ADC). The ADCs feed digitized images into an image DRAM, and the image DRAM feeds digitized images to an alignment buffer in turn providing images to an image processor. The ADCs feed digitized image data into the image DRAM in hyperlong words, using staggered, overlapping, word lines to write each hyperlong word. A method of imaging includes exposing a photosensor array to light, reading pixels of the array in sequence within each block of pixels, one pixel in each block simultaneously; and digitizing pixels in separate ADCs for each block. Digitized pixels are written to image DRAM as hyperlong words with one pixel from each block in parallel using staggered, overlapping, word lines. Pixels are read from the image DRAM into an alignment buffer and thence to the image processor.

Abstract: An image sensor pixel includes a photodiode disposed in a semiconductor material to generate image charge in response to light incident on a backside of the semiconductor material, and a pinning layer disposed in the semiconducting material and coupled to the photodiode. The pixel also includes a vertical overflow drain disposed in the semiconductor material and coupled to the pinning layer such that the pinning layer is disposed between the vertical overflow drain and the photodiode. A floating diffusion disposed in the semiconductor material proximate to the photodiode, and a vertical transfer transistor is disposed in part in the semiconductor material and coupled to the photodiode to transfer the image charge from the photodiode to the floating diffusion in response to a transfer signal applied to the gate terminal of the vertical transfer transistor.

Abstract: A chip-scale packaging process for wafer-level camera manufacture includes aligning an optics component wafer with an interposer wafer having a photoresist pattern that forms a plurality of transparent regions, bonding the aligned optics component wafer to the interposer wafer, and dicing the bonded optics component wafer and interposer wafer such that each optics component with interposer has a transparent region. The process further includes dicing an image sensor wafer, aligning the pixel array of each image sensor with the transparent region of a respective optics component with interposer, and bonding each image sensor to its respective optics component with interposer. Each interposer provides alignment between its respective optics component center and its respective pixel array center of the image sensor based on the respective transparent region. The interposer further provides a back focal length for focusing light from the optics component onto a top surface of the pixel array.

Abstract: A chip comprises a semiconductor substrate having a first side and a second side opposite to the first side, a plurality of conductive metal patterns formed on the first side of the semiconductor substrate, a plurality of solder balls formed on the first side of the semiconductor substrate, and at least one code pattern formed using laser marking on the first side of the semiconductor substrate in a space free from the plurality of conductive metal patterns and the plurality of solder balls, wherein the at least one code pattern is visible from a backside of the chip, the at least one code pattern represents a binary number having four bits; and the binary number represents a decimal number to represent a tracing number of the chip.

Abstract: A chip comprises a semiconductor substrate having a first side and a second side opposite to the first side, a plurality of conductive metal patterns formed on the first side of the semiconductor substrate, a plurality of solder balls formed on the first side of the semiconductor substrate, and at least one code pattern of a first group and at least one code pattern of a second group formed on the first side of the semiconductor substrate in a space free from the plurality of conductive metal patterns and the plurality of solder balls, wherein the code patterns are visible from a backside of the chip, and wherein a tracing number of the chip is represented by the code patterns.

Abstract: A flexible printed circuit board (PCB) includes a flexible first layer proximate to a flexible second layer. Conductive traces are arranged in the flexible first layer and coupled to a first circuit block at a first end of the flexible PCB and coupled to a second circuit block at a second end of the flexible PCB such that the first circuit block is coupled to the second circuit block through the conductive traces. Companion traces re arranged in the flexible second layer to provide a reference plane coupled to the first and second circuit blocks. The companion traces are arranged in the flexible second layer to be replicas of the conductive traces such that each one of the conductive traces is proximate to and aligned with a corresponding one of the companion traces along an entire length between the first and second circuit blocks.

Abstract: A pixel array for use in a high dynamic range image sensor includes a plurality of pixels arranged in a plurality of rows and columns in the pixel array. Each one of the pixels includes a linear subpixel and a log subpixel disposed in a semiconductor material. The linear subpixel is coupled to generate a linear output signal having a linear response, and the log subpixel is coupled to generate a log output signal having a logarithmic response in response to the incident light. A bitline is coupled to the linear subpixel and to the log subpixel to receive the linear output signal and the log output signal. The bitline is one of a plurality of bitlines coupled to the plurality of pixels. Each one of the plurality of bitlines is coupled to a corresponding grouping of the plurality of pixels.

Abstract: A near-eye display device includes (a) a display unit for displaying a display image, (b) a viewing unit for presenting the display image to the eye and transmitting ambient light from an ambient scene toward the eye, and (c) an eye imaging unit including (i) an illumination module for generating at least three infrared light beams propagating along at least three different, non-coplanar directions, respectively, (ii) a first beamsplitter interface, disposed between the display unit and the viewing unit, for merging at least a portion of each of the infrared light beams with visible display light to direct each portion toward the eye via the viewing unit, and (iii) a camera for imaging, via the viewing unit and the first beamsplitter interface, pupil of the eye and reflections of the infrared light beams incident on the eye, to form one or more images indicative of gaze direction of the eye.

Abstract: An image sensor including a photodiode, a first doped region, a second doped region, a first storage node, a second storage node, a first vertical transfer gate, and a second vertical transfer gate is presented. The photodiode is disposed in a semiconductor material to convert image light to an electric signal. The first doped region and the second doped region are disposed in the semiconductor material between a first side of the semiconductor material and the photodiode. The first doped region is positioned between the first storage node and the second storage node while the second doped region is positioned between the second storage node and the first doped region. The vertical transfer gates are coupled between the photodiode to transfer the electric signal from the photodiode to a respective one of the storage nodes in response to a signal.

Abstract: A method for manufacturing a stepped spacer wafer for a wafer-level camera includes a step of measuring a plurality of focal lengths f1,2, . . . , N of a respective one of a plurality of lenses L1,2, . . . , N of a lens wafer. The method also includes a step of fabricating a stepped spacer wafer including (i) a plurality of apertures A1,2, . . . , N therethrough, and (ii) a plurality of thicknesses T1,2, . . . , N defining a respective thickness of the stepped spacer wafer at least partially surrounding a respective one of the plurality of apertures A1,2, . . . , N. Each of the plurality of thicknesses T1,2, . . . , N is equal to a difference between (a) a respective one of the plurality of focal lengths f1,2, . . . , N, and (b) a uniform thickness that is the same for each of the plurality of thicknesses.

Abstract: A time of flight camera includes a light source, a first pixel, a time-to-digital converting, and a controller. The light source is configured to emit light towards an object to be reflected back to the time of flight camera as image light. The first pixel includes a photodetector to detect the image light and to convert the image light into an electric signal. The time-to-digital converter is configured to generate timing signals representative of when the light source emits the light and when the photodetector detects the image light. The controller is coupled to the light source, the first pixel, and the time-to-digital converter. The controller includes logic that when executed causes the time of flight camera to perform operations. The operations include determining a detection window for a round-trip time of the image light based, at least in part, on the timing signals and first pulses of the light.

Abstract: A system for capturing a high dynamic range (HDR) image comprises an image sensor comprising a split pixel including a first pixel having higher effective gain and a second pixel having lower effective gain. The second pixels exposed with a capture window capture at least a pulse emitted by a light emitting diode (LED) controlled by a pulse width modulation. A first HDR image is produced by a combination including an image produced by the second pixels, and images produced by multiple exposures of the first pixels. A weight map of LED flicker correction is generated from the difference of the image produced by second pixels and the images produced by the first pixels, and the flicker areas in the first HDR image are corrected with the weight map and the image from the second pixels.

Abstract: A bond-per-pixel-block image sensor has a pixel array including multiple pixel blocks with selection circuitry to couple signals to an ADC. The image sensor has an image RAM of DRAM superblocks, each superblock with multiple DRAM blocks each having tristate output driving an image RAM output bus, and data input from several of the ADCs. Each DRAM block has an address multiplexor coupled to read and write addresses. DRAM blocks of each superblock are written simultaneously with data wider than a width of the image RAM output bus. A method of capturing and processing images includes reading a first image frame from pixels of a pixel block through ADCs; writing digital pixel data for the first image frame in a first DRAM superblock; and reading pixel data into an alignment buffer. The method includes overlapping reading the first image frame with writing a second image frame into a second superblock.

Abstract: An N bit counter includes a lower counter having a first output having M bits that operates a first counting frequency. An upper counter having a second output having N?M+L bits operates a second counting frequency. The second counting frequency is equal to the first counting frequency divided by 2(M-L). An error correction controller is coupled to receive the first and second outputs and perform operations that include comparing the L least significant bits (LSBs) of the second output and at least one most significant bit (MSB) of the first output, and correcting the N?M MSBs of the second output in response to the comparison. The lower bits of the N bit counter are the M bits of the first output, and the upper bits of the N bit counter are the corrected N?M MSBs of the second output.

Abstract: A counter distribution system includes an N bit counter to receive a first counting clock to generate a plurality of data bits including lower data bits on lower data bit lines and upper data bits on upper data bit lines. The upper data bits include at least one redundant bit to provide error correction for the counter distribution system. A plurality of latches is coupled to the N bit counter. Each one of the lower data bit lines and each one of the upper data bit lines is coupled to at least one of the latches. The latches are arranged into a plurality of groupings of latches. Each grouping of latches is coupled to a respective latch enable signal. Each latch in each grouping of latches is coupled to latch a respective one of the plurality of data bits in response to the respective latch enable signal.

Abstract: An image sensor includes a photodiode disposed in a first semiconductor material to absorb photons incident on the image sensor and generate image charge. A floating diffusion is disposed in the first semiconductor material and positioned to receive the image charge from the photodiode, and a transfer transistor is coupled between the photodiode and the floating diffusion to transfer the image charge out of the photodiode into floating diffusion in response to a transfer signal. A source follower transistor with a gate terminal is coupled to the floating diffusion to output an amplified signal of the image charge in the floating diffusion. The gate terminal includes a second semiconductor material in contact with the floating diffusion, and a gate oxide is partially disposed between the second semiconductor material and the first semiconductor material. The second semiconductor material extends beyond the lateral bounds of the floating diffusion.

Abstract: An optical element comprising a transparent substrate and an anti-reflective coating, wherein the anti-reflective coating further comprises at least a transparent, high refractive index layer and a transparent, low refractive index layer, wherein the high refractive index layer is in contact with the low refractive index layer; and wherein the high refractive index layer is situated at an interface between the anti-reflective coating and air. Further, the low refractive index layer may be silicon oxide; the high refractive index layer may be tantalum oxide or silicon nitride.

Abstract: Systems and methods for buffer-aware transmission rate control for real-time video streaming are disclosed herein. An example method includes transmitting a first video packet at a transmission rate based on a buffer fill ratio of a buffer, where the transmission rate is adjusted in response to changes of the buffer fill ratio, selectively retransmitting a second video packet in response to a negative acknowledgement packet, where selectively retransmitting the second video packet is at least based on whether the second video packet has been previously retransmitted, a buffer level of the buffer, and a retransmission rate, and selectively retransmitting a third video packet in response to a non-receipt of an acknowledgement packet within a retransmission timeout, wherein selectively retransmitting the third video packet is at least based on whether the third video packet has been previously retransmitted, the buffer level of the buffer, and the retransmission rate.

Abstract: Counters with various widths for an image sensor. An image sensor includes a plurality of image pixels arranged in rows and columns of a pixel array. A plurality of memory cells are individually coupled to corresponding columns of the pixel array. The memory cells are arranged in a memory bank. The memory bank includes a first memory cell coupled to a first column of the pixel array. The first memory cell includes a first counter having a first width. A second memory cell is coupled to a second column of the pixel array. The second memory cell comprises a second counter having a second width. The first width and the second width are different.