Abstract: An image sensor module comprises an image sensor having a light sensing area, a cover glass for covering the light sensing area, a dam between the image sensor and the cover glass, which surrounds the light sensing area, and has an outer wall and an inner wall, where a cross-section of the inner wall parallel to the surface of the light sensing area of the image sensor forms a sawtooth pattern and/or, where a cross-section of the inner wall orthogonal to the surface of the light sensing area of the image sensor forms an inclined surface.

Abstract: A multi-pixel detector of an image sensor is described. The multi-pixel detector includes a first photodiode region disposed within a semiconductor substrate to form a first pixel, a second photodiode region disposed within the semiconductor substrate to form a second pixel adjacent to the first pixel, and a partial isolation structure extending from a first side of the semiconductor substrate towards a second side of the semiconductor substrate between the first photodiode region and the second photodiode region. A length of a lateral portion of the partial isolation structure between the first photodiode region and the second photodiode region is less than a lateral length of the first photodiode region.

Abstract: An uneven-trench pixel cell includes a semiconductor substrate that includes a floating diffusion region, a photodiode region, and, between a front surface and a back surface: a first sidewall surface, a shallow bottom surface, a second sidewall surface, and a deep bottom surface. The first sidewall surface and a shallow bottom surface define a shallow trench, located between the floating diffusion region and the photodiode region, that extends into the semiconductor substrate from the front surface. A shallow depth of the shallow trench exceeds a junction depth of the floating diffusion region. The second sidewall surface and a deep bottom surface define a deep trench, located between the floating diffusion region and the photodiode region, that extends into the semiconductor substrate from the front surface. A distance between the deep bottom surface and the front surface defines a deep depth, of the deep trench, that exceeds the shallow depth.

Abstract: An electronic camera assembly includes a camera chip cube bonded to camera bondpads of an interposer; at least one light-emitting diode (LED) bonded to LED bondpads of the interposer at the same height as the camera bondpads; and a housing extending from the interposer and LEDs to the height of the camera chip cube, with light guides extending from the LEDs through the housing to a top of the housing. In embodiments, the electronic camera assembly includes a cable coupled to the interposer. In typical embodiments the camera chip cube has footprint dimensions of less than three and a half millimeters square.

Abstract: A passive speckle-suppressing diffuser includes a microlens array for diffusing a light field originating from one or more coherent light beams, and a diffractive optical element mounted in series with the microlens array and having a pixelated thickness distribution, characterized by a spatial variation across the diffractive optical element, to impose a spatially varying phase shift on the light field. The pixelated thickness distribution may be configured such that the spatially varying phase shift suppresses speckle of the light field while minimizing introduction of distinct diffraction structure.

Abstract: A pixel cell with an elevated floating diffusion region is formed to reduce diffusion leakage (e.g., gate induced drain leakage, junction leakage, etc.). The floating diffusion region can be elevated by separating a doped floating diffusion region from the semiconductor substrate by disposing an intervening layer (e.g., undoped, lightly doped, etc.) on the semiconductor substrate and beneath the doped floating diffusion region. For instance, the elevated floating diffusion region can be formed by stacked material layers composed of a lightly or undoped base or intervening layer and a heavy doped (e.g., As doped) “elevated” layer. In some examples, the stacked material layers can be formed by first and second epitaxial growth layers.

Abstract: A multiple-lens optical fingerprint reader for reading fingerprints through a display has a spacer; and multiple microlenses with concave and convex surfaces in a microlens array, each microlens of multiple lenses focuses light arriving at that microlens from a finger adjacent the display through the spacer forms an image on associated photosensors on a photosensor array of an image sensor integrated circuit. A method of verifying identity of a user includes illuminating a finger of the user with an OLED display; focusing light from the finger through arrayed microlenses onto a photosensor array, reading the array into overlapping electronic fingerprint images; extracting features from the overlapping fingerprint images or from a stitched fingerprint image, and comparing the features to features of at least one user in a library of features and associated with one or more fingers of one or more authorized users.

Abstract: In an embodiment, a method of reducing resistance-capacitance delay along photodiode transfer lines of an image sensor includes forking a plurality of photodiode transfer lines each into a plurality of sublines coupled together and to a first decoder-driver at a first end of each subline; and distributing selection transistors of a plurality of multiple-photodiode cells among the plurality of sublines. In embodiments, the sublines may be recombined at a second end of the sublines and driven by a second decoder-driver at the second end.

Abstract: A method for estimating a signal charge collected by a pixel of an image sensor includes determining an average bias that depends on the pixel's floating-diffusion dark current and pixel-sampling period. The method also includes determining a signal-charge estimate as the average bias subtracted from a difference between a weighted sum of a plurality of N multiple-sampling values each multiplied by a respective one of a plurality of N sample-weights.

Abstract: A pixel-array substrate includes a semiconductor substrate with a pixel array, a back surface, and a front surface, and a guard ring formed of a doped semiconductor, enclosing the pixel array, and extending into the semiconductor substrate from the front surface, the back surface forming a trench extending into the semiconductor substrate, the trench overlapping the guard ring. A method for reducing leakage current into a pixel-array includes doping a semiconductor substrate to form a guard ring that extends into the semiconductor substrate from a front surface, encloses a pixel array, excludes a periphery region, and resists a flow of electric current, and forming, into a back surface of the semiconductor substrate, a trench that penetrates into the back surface and overlaps the guard ring, the guard ring and the trench configured to resist the flow of electric current between the pixel array and the periphery region.

Abstract: A shallow trench isolation (STI) structure and method of fabrication includes forming a shallow trench isolation (STI) structure having a polygonal shaped cross-section in a semiconductor substrate of an image sensor includes a two-step etching process. The first step is a dry plasma etch that forms a portion of the trench to a first depth. The second step is a wet etch process that completes the trench etching to the desired depth and cures damage caused by the dry etch process. A CMOS image sensor includes a semiconductor substrate having a photodiode region and a pixel transistor region separated by a shallow trench isolation (STI) structure having a polygonal shaped cross-section.

Abstract: Embodiments disclosed herein reduce petal flare. A flare-suppressing image sensor includes a plurality of pixels including a first set of pixels and a second set of pixels. The flare-suppressing image sensor further includes plurality of microlenses, where each microlens is aligned to a respective one of the first set of pixels. The flare-suppressing image sensor further includes plurality of sub-microlens, where each microlens array is aligned to a respective one of the second set of pixels.

Abstract: A light-trapping image sensor includes a pixel array and a lens array. The pixel array is formed in and on a semiconductor substrate and including photosensitive pixels each including a reflective material forming a cavity around a portion of semiconductor material to at least partly trap light that has entered the cavity. The cavity has a ceiling at a light-receiving surface of the semiconductor substrate, and the ceiling forms an aperture for receiving the light into the cavity. The lens array is disposed on the pixel array. Each lens of the lens array is aligned to the aperture of a respective cavity to focus the light into the cavity through the aperture.

Abstract: An optical fingerprint sensor with spoof detection includes a plurality of lenses, an image sensor including a pixel array that includes a plurality of first photodiodes and a plurality of second photodiodes, and at least one apertured baffle-layer having a plurality of aperture stops, wherein each second photodiode is configured to detect light having passed through a lens and at least one aperture stop not aligned with the lens along an optical axis. A method for detecting spoof fingerprints detected using an optical fingerprint sensor includes detecting large-angle light incident on a plurality of anti-spoof photodiodes, wherein the plurality of anti-spoof photodiodes is interleaved with a plurality of imaging photodiodes, determining an angular distribution of light based at least in part one the large-angle light, and detecting spoof fingerprints based at least in part on the angular distribution of light.

Abstract: An imaging system includes a pixel array with pixel circuits, each including a photodiode, a floating diffusion, a source follower transistor, and a row select transistor. The imaging system further includes rolling clamp (RC) drivers, each coupled to a gate terminal of a row select transistor of one of the pixel circuits and each including first and second PMOS transistors coupled between a clamp voltage and the gate terminal of the row select transistor of the one of the pixel circuits, and first, second, and third NMOS transistors coupled between the clamp voltage and the gate terminal of the row select transistor of the one of the pixel circuits. The PMOS transistors and the NMOS transistors are coupled in parallel. The PMOS transistors are configured to provide an upper clamp voltage range, and the NMOS transistors are configured to provide a lower clamp voltage range.

Abstract: An image sensor element includes a transfer transistor TX, a LOFIC select transistor LF, a photodiode PD, and a first overflow path OFP. The transfer transistor TX outputs a readout signal from a first end. The LOFIC select transistor LF includes a first end connected to a second end of the transfer transistor TX, and a second end connected to a capacitor. The photodiode PD is connected in common to a third end of the transfer transistor and a third end of the LOFIC select transistor LF. The first overflow path OFP is formed between the photodiode PD and a second end of the LOFIC select transistor LF. Each of the transfer transistor TX and the LOFIC select transistor LF is configured with a vertical gate transistor.

Abstract: A pixel-array substrate includes (i) a semiconductor substrate including a photodiode region and a floating diffusion region, and (ii) a vertical-transfer-gate structure that includes a trench and a gate electrode. The trench is defined by a bottom surface and a sidewall surface of the substrate each located between a front substrate-surface and a back substrate-surface thereof. The trench extends into the substrate. In a cross-sectional plane perpendicular to the front substrate-surface and intersecting the floating diffusion region, the photodiode region, and the sidewall surface, (a) the trench is located between the floating diffusion region and the photodiode region, and (b) a top section of the sidewall surface is adjacent to the floating diffusion region. A gate electrode partially fills the trench such that the top section and a conductive-surface of the gate electrode in-part define a recess located between the floating diffusion region and the gate electrode.

Abstract: A pointed-trench pixel-array substrate includes a floating diffusion region and a photodiode region formed in a semiconductor substrate. The semiconductor substrate includes, between a top surface and a back surface thereof, a sidewall surface and a bottom surface defining a trench extending into the semiconductor substrate away from a planar region of the top surface surrounding the trench. In a cross-sectional plane perpendicular to the top surface and intersecting the floating diffusion region, the photodiode region, and the trench, (i) the bottom surface is V-shaped and (ii) the trench is located between the floating diffusion region and the photodiode region.

Abstract: An endoscope imager includes a system-in-package and a specularly reflective surface. The system-in-package includes (a) a camera module having an imaging lens with an optical axis and (b) an illumination unit. The system-in-package includes (a) a camera module having an imaging lens with an optical axis and (b) an illumination unit configured to emit illumination propagating in a direction away from the imaging lens, the direction having a component parallel to the optical axis. The specularly reflective surface faces the imaging lens and forming an oblique angle with the optical axis, to deflect the illumination toward a scene and deflect light from the scene toward the camera module.

Abstract: A pixel-array substrate includes a floating diffusion region and a first photodiode formed in a semiconductor substrate. A top surface of the semiconductor substrate defines a trench 1A and a trench 1B each (i) extending into the semiconductor substrate away from a planar region of the top surface between the trench 1A and the trench 1B and (ii) having a respective distal end, with respect to the floating diffusion region, located between the floating diffusion region and the first photodiode. In a horizontal plane parallel to the top surface and along an inter-trench direction between the trench 1A and the trench 1B, a first spatial separation between the trench 1A and the trench 1B increases with increasing distance from the floating diffusion region.