Abstract: A 3D imaging system comprises a phase detection autofocus (PDAF) image sensor, a lens for imaging a cross-section of a 3D object on the PDAF image sensor and an actuator for driving the lens for focusing each cross-section of the 3D object on the PDAF image sensor. The actuator drives the lens until the PDAF image sensor identifies an image of a first cross-section of the 3D object in-focus and records the image of the first cross-section. The PDAF image sensor records images of subsequent cross-sections of the 3D object formed by the lens driven by the actuator on the PDAF image sensor. The recorded images of each cross-section of the 3D object are stacked to form a 3D image of the 3D object.

Abstract: An image-sensor package includes a cover glass, an image sensor, and an integrated circuit. The cover glass has a cover-glass bottom surface, to which the image sensor is bonded. The integrated circuit is beneath the cover-glass bottom surface, adjacent to the image sensor, and electronically connected to the image sensor. A method for packaging an image sensor includes attaching an image sensor to a cover-glass bottom surface of a cover glass, a light-sensing region of the image sensor facing the cover-glass bottom surface. The method also includes attaching an integrated circuit to the cover-glass bottom surface, a top IC-surface of the integrated circuit facing the cover-glass bottom surface.

Abstract: A chip comprises a semiconductor substrate having a first side and a second side opposite to the first side, a plurality of conductive metal patterns formed on the first side of the semiconductor substrate, a plurality of solder balls formed on the first side of the semiconductor substrate, and at least one code pattern of a first group and at least one code pattern of a second group formed on the first side of the semiconductor substrate in a space free from the plurality of conductive metal patterns and the plurality of solder balls, wherein the code patterns are visible from a backside of the chip, and wherein a tracing number of the chip is represented by the code patterns.

Abstract: An image sensor includes a photodiode disposed in a semiconductor material to generate image charge in response to incident light, and a first transfer gate is coupled to the photodiode to extract image charge from the photodiode in response to a first transfer signal. A first storage gate is coupled to the first transfer gate to receive the image charge from the first transfer gate, and a first output gate is coupled to the first storage gate to receive the image charge from the first storage gate. A first capacitor is coupled to the first output gate to store the image charge.

Abstract: A semiconductor device package includes a transparent substrate, a photo detector and a first conductive layer. The transparent substrate has a first surface and a first cavity underneath the first surface. The photo detector is disposed within the first cavity. The photo detector has a sensing area facing toward a bottom surface of the first cavity of the transparent substrate. The first conductive layer is disposed over the transparent substrate and electrically connected to the photo detector.

Abstract: A subrange analog-to-digital converter (ADC) converts analog image signal received from a bitline to a digital signal through an ADC comparator. The comparator is shared by a successive approximation register (SAR) ADC coupled to provide M upper output bits (UOB) of the subrange ADC and a ramp ADC coupled to provide N lower output bits (LOB). The digital-to-analog converter (DAC) of the SAR ADC comprises M buffered bit capacitors connected to the comparator. Each buffered bit capacitor comprises a bit capacitor, a bit buffer, and a bit switch controlled by one of the UOB of the SAR ADC. A ramp buffer is coupled between a ramp generator and a ramp capacitor. The ramp capacitor is further coupled to the same comparator. The implementation of ramp buffer and the bit buffers as well as their sharing of the same kind of buffer reduces differential nonlinear (DNL) error of the subrange ADC.

Abstract: An image sensor including a photodiode, a first doped region, a second doped region, a first storage node, a second storage node, a first vertical transfer gate, and a second vertical transfer gate is presented. The photodiode is disposed in a semiconductor material to convert image light to an electric signal. The first doped region and the second doped region are disposed in the semiconductor material between a first side of the semiconductor material and the photodiode. The first doped region is positioned between the first storage node and the second storage node while the second doped region is positioned between the second storage node and the first doped region. The vertical transfer gates are coupled between the photodiode to transfer the electric signal from the photodiode to a respective one of the storage nodes in response to a signal.

Abstract: An image sensor includes one or more photodiodes disposed in a semiconductor material to receive image light and generate image charge, and a floating diffusion to receive the image charge from the one or more photodiodes. One or more transfer transistors is coupled to transfer image charge in the one or more photodiodes to the floating diffusion, and a source follower transistor is coupled to amplify the image charge in the floating diffusion. The source follower includes a gate electrode (coupled to the floating diffusion), source and drain electrodes, and an active region disposed in the semiconductor material between the source and drain electrodes. A dielectric material is disposed between the gate electrode and the active region and has a first thickness and a second thickness. The second thickness is greater than the first thickness, and the second thickness is disposed closer to the drain electrode than the first thickness.

Abstract: Backside illuminated sensor pixel structure. In one embodiment, an image sensor includes a plurality of photodiodes arranged in rows and columns of a pixel array that are disposed in a semiconductor substrate. Individual photodiodes of the pixel array are configured to receive incoming light through a backside of the semiconductor substrate. The individual photodiodes have a diffusion region formed in an epitaxial region and a plurality of storage nodes (SGs) that are disposed on the front side of the semiconductor substrate and formed in the epitaxial region. An opaque isolation layer having a plurality of opaque isolation elements is disposed proximate to the front side of the semiconductor substrate and proximate to the diffusion region of the plurality of photodiodes. The opaque isolation elements are configured to block a path of incoming light from the backside of the semiconductor substrate toward the storage nodes.

Abstract: A checking module is coupled to one or more registers to verify data written to the one or more registers. The checking module includes a memory coupled to an arbiter to receive data and an address (corresponding to the data) from the arbiter. The data is written to the one or more registers at the address. Comparator logic is coupled to the memory and to the one or more registers to compare the data written to the one or more registers and the data in the memory. An error flag circuit is coupled to the comparator logic, and in response to a difference between the data in the memory and the data written to the one or more registers, the error flag circuit outputs an error signal.

Abstract: An athermal lens system includes a converging lens element having a negative first thermo-optic coefficient, and a diverging lens element having a second thermo-optic coefficient more negative than the first thermo-optic coefficient, wherein the diverging lens element is coupled with the converging lens element to form a converging athermal doublet lens.

Abstract: Light control for improved near infrared sensitivity and channel separation for an image sensor. In one embodiment, an image sensor includes: a plurality of photodiodes arranged in rows and columns of a pixel array; and a light filter layer having a plurality of light filters configured over the plurality of photodiodes. The light filter layer has a first side facing the plurality of photodiodes and a second side facing away from the first side. The image sensor also includes a color filter layer having a plurality of color filters configured over the plurality of photodiodes. The color filter layer has a first surface facing the second side of the light filter layer and a second surface facing away from the first layer. Individual micro-lenses are configured to direct incoming light through corresponding light filter and color filter onto the respective photodiode.

Abstract: A surveillance system includes an infrared sensor system coupled to output an infrared signal in response to receiving infrared light, and an audio recording system coupled to output an audio signal in response to recording sound. An image sensor is system coupled to output an image signal in response to receiving image light. A controller is coupled to the infrared sensor system, the audio recording system, and the image sensor system. The controller includes logic that when executed by the controller causes the surveillance system to perform operations including receiving the infrared signal from the infrared sensor system, activating the audio recording system to record the sound, and activating the image sensor system to output the image signal.

Abstract: A photodiode array circuit includes a plurality of photodiode circuits, binning circuitry, and a plurality of output circuits. Each of the plurality of photodiode circuits is coupled to receive a different one of the plurality of transfer control signals as a proximate photodiode circuit, proximate in a first direction. The binning circuitry is coupled to electrically connect the plurality of photodiode circuits into groups of photodiode circuit sense nodes in response to a binning control signal. Each of the plurality of output circuits is coupled to one of the groups of photodiode circuit sense nodes. Each of the plurality of output circuits are coupled to receive the output charge from the photodiode circuits in the one of the groups of photodiode circuit sense nodes and output an output signal to a bitline in response to the output charge and an row select signal.

Abstract: A photodiode array circuit includes a plurality of photodiode circuits, binning circuitry, and a plurality of output circuits. Each of the plurality of photodiode circuits is coupled to receive a different one of the plurality of transfer control signals as a proximate photodiode circuit, proximate in a first direction. The binning circuitry is coupled to electrically connect the plurality of photodiode circuits into groups of photodiode circuit sense nodes in response to a binning control signal. Each of the plurality of output circuits is coupled to one of the groups of photodiode circuit sense nodes. Each of the plurality of output circuits are coupled to receive the output charge from the photodiode circuits in the one of the groups of photodiode circuit sense nodes and output an output signal to a bitline in response to the output charge and an row select signal.

Abstract: A method for reducing a clock-data skew in a serial interface. A clock signal and a data signal are received through the serial interface at first and second inputs of an exclusive OR (XOR) averaging (XOR-averaging) gate. An output of the XOR-averaging gate is determined and compared with a target value. At least one of a delay of the clock signal and a delay of the data signal is determined based on comparing the output of the XOR-averaging gate with the target value. A skew between the clock signal and the data signal is reduced by delaying at least one of the clock signal and the data signal.

Abstract: A 3D imaging system comprises a phase detection autofocus (PDAF) image sensor, a lens for imaging a cross-section of a 3D object on the PDAF image sensor and an actuator for driving the lens for focusing each cross-section of the 3D object on the PDAF image sensor. The actuator drives the lens until the PDAF image sensor identifies an image of a first cross-section of the 3D object in-focus and records the image of the first cross-section. The PDAF image sensor records images of subsequent cross-sections of the 3D object formed by the lens driven by the actuator on the PDAF image sensor. The recorded images of each cross-section of the 3D object are stacked to form a 3D image of the 3D object.

Abstract: An image sensor includes a substrate. An array of photodiodes is disposed in the substrate. A plurality of spacers is arranged in a spacer pattern. At least one spacer of the plurality of spacers has an aspect ratio of 18:1 or greater. A buffer layer is disposed between the substrate and the spacer pattern. An array of color filters is disposed in the spacer pattern.

Abstract: A column amplifier with a comparator for use in an image sensor includes an amplifier coupled to receive an input signal representative of an image charge from a pixel cell of the image sensor. An amplifier auto-zero switch is coupled between an input of the amplifier and an output of the amplifier. A feedback capacitor coupled to an input of the amplifier. An amplifier output switch coupled between the output of the amplifier and the feedback capacitor. A comparator includes a first input coupled the amplifier output switch. A comparator auto-zero switch is coupled between the first input of the comparator and an output of the comparator.

Abstract: An electronic device to equalize sound includes a microphone coupled to receive the sound and output sound data. The sound has amplitude that changes with respect to time, and the sound includes one or more frequencies. The sound data indexes the amplitude with respect to the time. The electronic device also includes a controller coupled to microphone, and the controller includes logic that when executed by the controller causes the electronic device to perform operations. The operations may include: receiving the sound data from the microphone with the controller; adjusting the amplitude of the sound included in the sound data across the one or more frequencies using a filter disposed in the logic; and outputting filtered sound data.