Patents Assigned to ON Semiconductor
  • Patent number: 11477797
    Abstract: Methods and systems of a wireless access point (WAP) configured to support wireless communications on a wireless local area network (WLAN). In an example system, a WAP with a non-volatile memory storing network event rules that indicate conditional parameters for an action for a targeted device, includes an event detection circuit to gather and analyze wireless communications activity, and a rule initiation circuit to initiate an action for a target device indicated by a network event rule. In an example, the rule initiation circuit is to initiate an action for a target device indicated by a network event rule, where the conditional parameters are satisfied at least in part by the gathered wireless communications activity from the one or more wireless stations.
    Type: Grant
    Filed: July 29, 2019
    Date of Patent: October 18, 2022
    Assignee: ON SEMICONDUCTOR CONNECTIVITY SOLUTIONS, INC.
    Inventors: Debashis Dash, Bahador Amiri
  • Patent number: 11467268
    Abstract: Disclosures of the present invention describe an optical proximity sensor, which is particularly designed to have functionality of canceling an ambient light noise and/or an optical crosstalk noise by using light-to-frequency conversion technique, and comprises: a controlling and processing circuit, a lighting unit, a light receiving unit, an analog adder, a first DAC unit, a second DAC unit, and a light-to-digital conversion (LDC) unit. In the controlling of the controlling and processing circuit, the first DAC unit and the second DAC unit would respectively generate a first compensation current signal and a second compensation current signal to the analog adder, such that a noise signal of ambient light and a noise signal of optical crosstalk existing in an optical current signal of object reflection light would be canceled by the two compensation current signals in the analog adder.
    Type: Grant
    Filed: June 23, 2019
    Date of Patent: October 11, 2022
    Assignees: Dyna Image Corporation, Lite-On Semiconductor Corporation
    Inventors: Wen-Sheng Lin, Sheng-Cheng Lee, Yu-Cheng Su, Peng-Han Chan, Chun-Hsien Lin
  • Publication number: 20220321188
    Abstract: Example implementations are directed to methods and systems employing a solicited sounding protocol that includes an efficient communication sequence for operating a wireless transceiver transmitting a sounding trigger to one or more beamformees via a forward channel, receiving at least one dedicated training signal from the one or more beamformees via a reverse channel in response to the sounding trigger, and for each of the received dedicated training signal. The method also includes estimating forward CSI derived based on the dedicated training signal from an associated beamformee; and where subsequent packets are precoded with precoding derived from the forward CSI for transmission to the associated beamformee via the forward channel. Example aspects including scheduling multiple dedicated training signals from one or more beamformees based on a single sounding trigger.
    Type: Application
    Filed: June 16, 2022
    Publication date: October 6, 2022
    Applicant: ON SEMICONDUCTOR CONNECTIVITY SOLUTIONS, INC.
    Inventors: Sigurd SCHELSTRAETE, Hossein Dehghan-Fard, Debashis DASH
  • Patent number: 11394441
    Abstract: Example implementations are directed to methods and systems employing a solicited sounding protocol that includes an efficient communication sequence for operating a wireless transceiver transmitting a sounding trigger to one or more beamformees via a forward channel, receiving at least one dedicated training signal from the one or more beamformees via a reverse channel in response to the sounding trigger, and for each of the received dedicated training signal. The method also includes estimating forward CSI derived based on the dedicated training signal from an associated beamformee; and where subsequent packets are precoded with precoding derived from the forward CSI for transmission to the associated beamformee via the forward channel. Example aspects including scheduling multiple dedicated training signals from one or more beamformees based on a single sounding trigger.
    Type: Grant
    Filed: May 3, 2019
    Date of Patent: July 19, 2022
    Assignee: ON Semiconductor Connectivity Solutions, Inc.
    Inventors: Sigurd Schelstraete, Hossein Dehghan, Debashis Dash
  • Patent number: 11380646
    Abstract: A multi-sided cooling semiconductor package includes a first substrate, a second substrate, semiconductor chips disposed between the first substrate and the second substrate, and first metal preforms. The first substrate includes a upper metal layer, a lower metal layer, and a dielectric plate between the upper metal layer and the lower metal layer. The second substrate also includes a upper metal layer, a lower metal layer, and a dielectric plate between the upper metal layer and the lower metal layer. The first metal preforms are disposed between the first substrate and the semiconductor chips and between the second substrate and the semiconductor chips. A first part of the first metal preforms is in direct contact with the upper metal layer of the first substrate, and a second part of the first metal preforms is in direct contact with the lower metal layer of the second substrate.
    Type: Grant
    Filed: September 4, 2020
    Date of Patent: July 5, 2022
    Assignee: Life-On Semiconductor Corporation
    Inventor: Chung Hsing Tzu
  • Publication number: 20220121265
    Abstract: A low power operation method provides an apparatus with a data transmission rate. A power management unit (PMU), which is not influenced by voltage, process, and temperature, biases a high frequency oscillator (HOSC) and makes the HOSC generate a steady and high precision clock. The clock of the HOSC is used to modify a timing length of a timer which is referenced by a low frequency oscillator (LOSC) without PMU. At last, through the modified timing length, the apparatus achieves high precision periods and data transmissions with compensation for voltage, process, and temperature. Thus, the data transmission cycles of the apparatus maintain stable and robust even if the apparatus applies duty cycle usage of the HOSC and the PMU for reducing power consumption with actions of turning on and turning off. Consequently, the periodic apparatus maintains data transmission rate with the low power consumption advantage of non-periodic apparatus.
    Type: Application
    Filed: October 19, 2020
    Publication date: April 21, 2022
    Applicants: Dyna Image Corporation, Lite-On Semiconductor Corp.
    Inventors: Peng-Han Chan, Chun-Hsien Lin, Sheng-Cheng Lee, Wen-Sheng Lin, Yu-Cheng Su
  • Patent number: 11307641
    Abstract: A low power operation method provides an apparatus with a data transmission rate. A power management unit (PMU), which is not influenced by voltage, process, and temperature, biases a high frequency oscillator (HOSC) and makes the HOSC generate a steady and high precision clock. The clock of the HOSC is used to modify a timing length of a timer which is referenced by a low frequency oscillator (LOSC) without PMU. At last, through the modified timing length, the apparatus achieves high precision periods and data transmissions with compensation for voltage, process, and temperature. Thus, the data transmission cycles of the apparatus maintain stable and robust even if the apparatus applies duty cycle usage of the HOSC and the PMU for reducing power consumption with actions of turning on and turning off. Consequently, the periodic apparatus maintains data transmission rate with the low power consumption advantage of non-periodic apparatus.
    Type: Grant
    Filed: October 19, 2020
    Date of Patent: April 19, 2022
    Assignees: Dyna Image Corporation, Lite-On Semiconductor Corporation
    Inventors: Peng-Han Chan, Chun-Hsien Lin, Sheng-Cheng Lee, Wen-Sheng Lin, Yu-Cheng Su
  • Patent number: 11196247
    Abstract: A digital device is provided. The digital device uses three states, including a ground (GND) state, a voltage (VDD) state, and a FLOAT state. On designing a chip, two storage units and a pad circuit are set inside; the pad circuit comprises a current limiter and two switches; and less ports contained are required than the conventional. That is, one port obtains three states. As comparing to the conventional having only two states, the present invention uses the port connected with two storage units in the pad circuit for obtaining the three states; a circuit featuring “pull up” and “pull down” is used to identify the state of connection of the port; and the port determines a plurality of definitions through the three states of GND, VDD and FLOAT. Thus, a pad is saved for reducing the space and cost of the chip.
    Type: Grant
    Filed: October 19, 2020
    Date of Patent: December 7, 2021
    Assignees: Dyna Image Corporation, Lite-On Semiconductor Corporation
    Inventors: Peng-Han Chan, Chun-Hsien Lin, Sheng-Cheng Lee, Wen-Sheng Lin, Yu-Cheng Su
  • Publication number: 20210358833
    Abstract: A direct cooling power semiconductor package includes a power package and a cooling structure. The power package includes at least a power device on a first surface of a substrate, and the cooling structure is disposed on a second surface of the substrate, wherein the second surface and the first surface are opposite to each other, and the cooling structure includes a housing covering the second surface to form a containing space, a cooling liquid fluid or gas filled in the containing space, and a plurality of semi-closed metal structures. The semi-closed metal structures are in direct contact with the second surface in the housing.
    Type: Application
    Filed: September 1, 2020
    Publication date: November 18, 2021
    Applicant: Lite-On Semiconductor Corporation
    Inventors: Chung Hsing Tzu, Meng-Hsun Tu
  • Publication number: 20210358876
    Abstract: A multi-sided cooling semiconductor package includes a first substrate, a second substrate, semiconductor chips disposed between the first substrate and the second substrate, and first metal preforms. The first substrate includes a upper metal layer, a lower metal layer, and a dielectric plate between the upper metal layer and the lower metal layer. The second substrate also includes a upper metal layer, a lower metal layer, and a dielectric plate between the upper metal layer and the lower metal layer. The first metal preforms are disposed between the first substrate and the semiconductor chips and between the second substrate and the semiconductor chips. A first part of the first metal preforms is in direct contact with the upper metal layer of the first substrate, and a second part of the first metal preforms is in direct contact with the lower metal layer of the second substrate.
    Type: Application
    Filed: September 4, 2020
    Publication date: November 18, 2021
    Applicant: Lite-On Semiconductor Corporation
    Inventor: Chung Hsing Tzu
  • Patent number: 11070994
    Abstract: A wireless access point (WAP) configured to supporting wireless communications with station nodes on a selected communication channel of an associated wireless local area network (WLAN). The WAP includes multiple multiple-input multiple-output (MIMO) transmit and receive paths. The WAP is to intermittently switch one of the multiple MIMO receive paths to concurrently process both communications on a selected communication channel together with monitoring communications on unselected channels of the multiple communication channels associated with the WLAN.
    Type: Grant
    Filed: June 10, 2019
    Date of Patent: July 20, 2021
    Assignee: ON SEMICONDUCTOR CONNECTIVITY SOLUTIONS, INC.
    Inventors: Stephane Cattet, Babak Soltanian, Sigurd Schelstraete, Vahbod Pourahmad, Sam Heidari, Ali Rouhi, James Herbert, Richard Kinder
  • Publication number: 20210210409
    Abstract: A power module including a main housing, a power element, and at least one assembling component is provided. The main housing has at least one side wall and at least two ribs extending from the side wall. The power element is disposed in the main housing and is closely pressed against a heat dissipation structure by the side wall. The assembling component includes a main section and two bending sections. The main section is located between the two ribs and includes a central portion, at least one movable component, and a peripheral portion. The central portion has a fastening portion, the peripheral portion surrounds the central portion, and the movable component is connected between the central portion and the peripheral portion. The two bending sections are respectively connected to two opposite sides of the peripheral portion and are respectively embedded in the two ribs.
    Type: Application
    Filed: January 4, 2021
    Publication date: July 8, 2021
    Applicants: Industrial Technology Research Institute, Lite-On Semiconductor Corporation
    Inventors: Wei-Kuo Han, Chia-Yen Lee, Jing-Yao Chang, Tao-Chih Chang
  • Patent number: 11039487
    Abstract: Systems and methods for operating a wireless access point (WAP) selected communication channel on a wireless local area network (WLAN). An example implementation includes accessing current proximity metrics for a given wireless device within a proximity distance of a wireless access point (WAP), analyzing the current proximity metrics in view of historical proximity records to predict a probability for future proximity states based on dwell time of the historical proximity records, and selecting a communication option for the wireless device based on the future proximity state with a highest probability for a criterion.
    Type: Grant
    Filed: June 18, 2019
    Date of Patent: June 15, 2021
    Assignee: ON SEMICONDUCTOR CONNECTIVITY SOLUTIONS, INC.
    Inventors: Bahador Amiri, Debashis Dash
  • Patent number: 10951163
    Abstract: A smart method is provided for a low-current oscillatory circuitry. The circuitry comprises an oscillator and a microcontroller unit (MCU). The oscillator comprises a proportional-to-absolute-temperature circuit connecting to a low-voltage regulator. The low-voltage regulator connects to a PMOS diode array and a delay unit circuit. The PMOS diode array connects to the MCU. The delay unit circuit connects to the MCU and a voltage converter. The method includes a normal temperature compensation algorithm; a smart learning algorithm of extra-high temperature compensation; and an ultra-high temperature compensation algorithm. Thus, clock variations are compensated; output frequency is stable and not affected by voltage or temperature variations; and process variations are suppressed. When process variations appear, there are not be too many errors generated.
    Type: Grant
    Filed: March 24, 2020
    Date of Patent: March 16, 2021
    Assignees: Dyna Image Corporation, Lite-On Semiconductor Corp.
    Inventors: Sheng-Cheng Lee, Wen-Sheng Lin, Yu-Cheng Su, Chun-Hsien Lin, Peng-Han Chan
  • Patent number: 10917147
    Abstract: A multiple-input multiple-output (MIMO) wireless transceiver with “N” transmit and receive chains and a bandwidth evaluation circuit, a chain partitioning circuit and a switchable radio frequency ‘RF’ filter bank. The bandwidth evaluation circuit evaluates both the utilization of the WLAN(s) and any remaining communications channels and determines whether to operate the MIMO chains synchronously as a single radio or asynchronously as multiple radios. The chain partitioning circuit either partitions subsets of the MIMO chains for asynchronous operation as distinct radios or combines all MIMO chains for synchronous operation as a single radio. The switchable RF filter bank is responsive to a partitioning of subsets of the chains into distinct radios to add RF filters to a RF portion of the chains to isolate each radio from one another, and responsive to a combining of all MIMO chains into a single radio to remove all RF filters.
    Type: Grant
    Filed: April 3, 2019
    Date of Patent: February 9, 2021
    Assignee: ON SEMICONDUCTOR CONNECTIVITY SOLUTIONS, INC.
    Inventors: Simon Duxbury, Abhishek Agrawal, Saied Ansari, Didier Margairaz, Hongping Liu
  • Patent number: 10915079
    Abstract: A light sensor device is provided. It is controlled with a dual-mode master-and-slave microcontroller unit (MCU) application. An MCU is embedded into a light sensor chip. The original dual-mode master-and-slave dual-CPU architectures are combined to be operated as a single-CPU architecture. Since the original circuit pin design is followed, it is possible to be compatible with the old circuit design. The present invention uses a single-CPU architecture to directly control light sensors. Through the configuration of RAM, an inter-integrated circuit bus (I2C I/F) can be redirected to an internal non-volatile memory to switch the operational mode of the light sensor chip from a slave machine to a host machine which switches off the interrupt pin and, then, turns to a GPIO pin. Thus, the present invention provides a simple single-CPU architecture with easy use and effectively-lowered cost.
    Type: Grant
    Filed: April 17, 2019
    Date of Patent: February 9, 2021
    Assignees: Dyna Image Corporation, Lite-On Semiconductor Corporation
    Inventors: Chun-Hsien Lin, Peng-Han Chan, Wen-Sheng Lin, Yu-Cheng Su, Sheng-Cheng Lee
  • Patent number: 10656268
    Abstract: An acoustic spatial diagnostic circuit couples to an array of microphones to successively sample an acoustic environment surrounding a wireless transceiver to generate an acoustic spatial map of activity within the environment based on sets of acoustic samples and execute one or more actions based on a related portion of the acoustic spatial map exhibiting one or more correlations with a spatial context condition of a wireless trained transceiver.
    Type: Grant
    Filed: June 3, 2019
    Date of Patent: May 19, 2020
    Assignee: ON SEMICONDUCTOR CONNECTIVITY SOLUTIONS, INC.
    Inventors: Aykut Bultan, Narayanan Bharath, Sam Heidari, Hossein Dehghan
  • Patent number: 9859447
    Abstract: A diode device and manufacturing method thereof are provided. The diode device includes a substrate, an epitaxial layer, a trench gate structure, a Schottky diode structure and a termination structure. An active region and a termination region are defined in the epitaxial layer. The Schottky diode structure and the trench gate structure are located in the active region and the termination structure is located in the termination region. The termination structure includes a termination trench formed in the epitaxial layer, a termination insulating layer, a first spacer, a second spacer and a first doped region. The termination insulating layer is conformingly formed on inner walls of the termination trench. The first and second spacers are disposed on two sidewalls of the termination trench. The first doped region formed beneath the termination trench has a conductive type reverse to that of the epitaxial layer.
    Type: Grant
    Filed: April 5, 2016
    Date of Patent: January 2, 2018
    Assignee: LITE-ON SEMICONDUCTOR CORP.
    Inventors: Shih-Han Yu, Sung-Ying Tsai, Yu-Hung Chang, Ju-Hsu Chuang, Chih-Wei Hsu
  • Patent number: 9711636
    Abstract: A super-junction semiconductor device is provided. The super-junction semiconductor device includes a substrate, a drift layer, a field insulator, a floating electrode layer, an isolation layer, and at least one transistor structure. The drift layer includes a plurality of n-type and p-type pillars alternately arranged in parallel to form a super-junction structure. An active region, a termination region and a transition region located therebetween are defined in the drift layer. The field insulator disposed on a surface of the drift layer covers the termination region and a portion of the transition region. The floating electrode layer disposed on the field insulator partially overlaps with the termination region. The transistor structure includes a source conductive layer extending from the active region to the transition region and superimposed on a portion of the floating electrode layer. The source conductive layer is isolated from the floating electrode layer by the isolation layer.
    Type: Grant
    Filed: April 25, 2016
    Date of Patent: July 18, 2017
    Assignee: LITE-ON SEMICONDUCTOR CORP.
    Inventors: Jia-Jan Guo, Chih-Wei Hsu, Ju-Hsu Chuang, Shih-Han Yu
  • Patent number: 8987870
    Abstract: A bridge rectifier including a common P-type diode, a common N-type diode, two first metal layers, two pairs of second metal layers, two AC inputs and two DC outputs. The P-type diode includes a common P-type doping region, a pair of first N-type substrate regions and a pair of P-type doping regions. The N-type diode includes a common N-type doping region, a pair of second N-type substrate regions and a pair of N-type doping regions. The first metal layers connect to the common N-type doping region and the common P-type doping region. The second metal layers connect to the P-type doping region and the N-type doping region. Two AC inputs connect to one of the second metal layers of the P-type diode and one of the second metal layers of the N-type diode respectively. Two DC inputs connect to the first metal layers respectively.
    Type: Grant
    Filed: July 5, 2013
    Date of Patent: March 24, 2015
    Assignee: Lite-On Semiconductor Corp.
    Inventor: Ching-Chiu Tseng