Patents Assigned to PMC-Sierra
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Patent number: 8693596Abstract: Apparatus and methods calibrate and control detector gain in a Mueller-Muller timing detector. A main signal path includes a Mueller-Muller based timing error detector (MM TED). The main signal path generates a main error signal for clock recovery. A secondary signal path that includes a secondary MM TED. Each signal path samples soft symbols from a received signal. The sampling of the secondary MM TED is deliberately offset in time. A scale factor applied to the main error signal and to a secondary error signal is adaptively adjusted based on a comparison between the main error signal and the secondary error signal.Type: GrantFiled: July 13, 2012Date of Patent: April 8, 2014Assignee: PMC-Sierra, Inc.Inventors: William D. Warner, Anthony Eugene Zortea
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Patent number: 8692597Abstract: An integer-N phase-locked loop based clock generator for generating an output clock signal with a frequency N multiples of a reference clock signal, and a method for same, wherein N is a positive integer. The integer-N clock phase-locked loop based generator comprises a reference clock, a voltage controlled oscillator, a clock divider, a first and second phase generator for generating a plurality of phases of the reference clock signal and divided down output clock signal, a plurality of phase frequency detectors and charge pumps. The method comprises generating a reference clock and an output clock signals, generating a plurality of phases of a divided down output clock signal and reference clock signal, comparing the plurality of phases, and changing the frequency of the output clock signal based on the comparison.Type: GrantFiled: March 13, 2013Date of Patent: April 8, 2014Assignee: PMC-Sierra US, Inc.Inventor: Mark Hiebert
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Patent number: 8694855Abstract: A data storage device reads a data unit from a memory page, detects a number of data bit errors in the data unit, and generates a bit error indicator identifying bit indexes of the data bit errors in the data unit. The data storage device reads the data unit from the memory page once again and generates a corrected data unit by correcting data bit errors in the data unit based on the error correction code if the number of data bit errors in the data unit does not exceed an error correction capacity of the error correction code. Otherwise, the data storage device generates a modified data unit based on the data unit by negating at least one erroneous data bit the data unit based on the bit error indicator and corrects any remaining data bit errors in the modified data unit based on the error correction code.Type: GrantFiled: November 2, 2011Date of Patent: April 8, 2014Assignee: PMC-Sierra US, Inc.Inventors: Rino Micheloni, Luca Crippa, Alessia Marelli
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Publication number: 20140095737Abstract: A method and apparatus, such as multi-engine controller that can be used to control multiple data processing engines in a command based IO processing system, such as a storage controller, to solve to the problem of scaling the data processing rate to match the advances in the IO interface data rates, including a method of identifying dependencies among various tasks queued up in the system and scheduling tasks out-of-order to avoid head of line blocking, a method to buffer and reorder the completed tasks such that the task output order is the same as that in the input to the system.Type: ApplicationFiled: November 29, 2013Publication date: April 3, 2014Applicant: PMC-SIERRA US, INCInventors: Chetan PARAGAONKAR, Kuan Hua TAN
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Patent number: 8687723Abstract: The adverse effects of RF and baseband circuits are mitigated using a post-compensation method wherein a transfer function that would un-distort or complement a distorted waveform is parameterized to a relatively small number of degrees of freedom; and the parameters are estimated in a feedback loop. The error function of the feedback loop is generated by comparing some relatively low-order statistics that are known a priori or can be computed with relative certainty from the decided output waveform—to the statistics of the corrected signal.Type: GrantFiled: January 11, 2013Date of Patent: April 1, 2014Assignee: PMC-Sierra, Inc.Inventors: Anthony Eugene Zortea, Graeme Barclay Boyd
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Publication number: 20140090043Abstract: A method for accessing data in a storage area network is provided. The method initiates with receiving a request for a list of targets on the storage area network. All the targets on the storage area network are exposed to the requestor and authentication requiring a password is requested from the requestor to grant access to the targets on the storage are network. Access to the targets is granted if the password is acceptable, and access to the targets is refused if the password is unacceptable.Type: ApplicationFiled: November 26, 2013Publication date: March 27, 2014Applicant: PMC-Sierra, Inc.Inventors: Dean Kalman, Ken Sandars, Brett Dolecheck, Mike Reyero
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Patent number: 8669782Abstract: Apparatus and methods advantageously maintain transistors of open-drain differential pairs biased in the saturation region when “active,” rather in than the triode or linear region. The biasing techniques are effective over a broad range of process, voltage, and temperature (PVT) variations. By controlling a high voltage level used to drive the gate of a transistor of the differential pair, the biasing of the transistor in the saturation region is maintained. In one embodiment, the low voltage level used to cut off the transistor of the differential pair is also controlled. These techniques advantageously permit differential drivers to exhibit relatively large output swings, relatively high edge rates, relatively high return loss, and relatively good efficiency.Type: GrantFiled: June 9, 2011Date of Patent: March 11, 2014Assignee: PMC-Sierra, Inc.Inventors: Guillaume Fortin, Charles Roy, Mathieu Gagnon
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Patent number: 8670512Abstract: Circuit and methods accelerate jitter tracking and reduce or eliminate the processing delay of loop filtering in timing recovery. A timing recovery circuit incorporates a phase tracking accelerator and a frequency tracking accelerator to compute the phase and frequency variation of incoming signal during the delay period of a loop filter. In one embodiment, phase and frequency tracking accelerators are realized in direct forms. In another embodiment, pre-computed look-up tables are employed in phase and frequency tracking accelerators to ease timing closure and simplify accelerator circuit. The phase tracking accelerator and the frequency tracking accelerator together compensate the estimated phase at the output of a loop filter and eliminate the processing delay of loop filtering. The loop bandwidth and jitter tolerance of timing recovery are increased.Type: GrantFiled: July 3, 2012Date of Patent: March 11, 2014Assignee: PMC-Sierra US, Inc.Inventor: Nanyan Wang
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Patent number: 8670661Abstract: A method and system for identifying faults in a passive optical network (PON). The method comprises acquiring at an optical network terminal of the PON at least one parameter indicative of at least one malfunction in at least one optical network unit of the PON, and identifying each malfunction from the at least one parameter. The parameters measured include, for each ONU, laser power, sync-lock and -unlock time and bit error rates. The information at the OLT is acquired remotely and in digital form, without use of any physical probing of any point or element in the PON. The system includes a temporal measurement module and a power laser measurement module coupled to a central processing unit that can extract fault information from digital data processed in the two modules.Type: GrantFiled: November 29, 2006Date of Patent: March 11, 2014Assignee: PMC-Sierra Israel Ltd.Inventor: Onn Haran
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Patent number: 8656071Abstract: A communication system includes a destination node containing a message buffer pointer input queue and a message queue memory. Moreover, the message queue memory includes message buffers. A source node of the communication system generates data packets and a message buffer pointer packet. A message network of the communication system routes the data packets and the message buffer pointer packet to the destination node. The destination node writes a data message in a message buffer of the message queue memory based on the data packets and enqueues the message buffer pointer into the message buffer pointer input queue. Further, the destination node dequeues the message buffer pointer from the message buffer pointer input queue and accesses the data message in the message buffer based on a message buffer pointer.Type: GrantFiled: May 13, 2011Date of Patent: February 18, 2014Assignee: PMC-Sierra US, Inc.Inventors: Peter Z. Onufryk, Ganesh T. Seshan
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Patent number: 8656257Abstract: A nonvolatile memory controller may recover encoded data using the outer error correction code of the encoded data if it is determined that a correction capacity of the outer error correction code is not exceeded. Alternatively, the nonvolatile memory controller may recover the encoded data using the inner error correction code of the encoded data followed by the outer error correction code of the encoded data if it is determined that the correction capacity of the outer error correction code is exceeded. Additionally, if it is determined that the correction capacity of the outer error correction code is exceed after recovering the data using the inner error correction code, the nonvolatile memory storage module may perform a redundant array of independent disks (RAID) operation to recover the data.Type: GrantFiled: March 29, 2012Date of Patent: February 18, 2014Assignee: PMC-Sierra US, Inc.Inventors: Rino Micheloni, Alessia Marelli, Peter Z. Onufryk, Christopher I. W. Norrie
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Patent number: 8644143Abstract: In a passive optical network, dynamic bandwidth allocation and queue management methods and algorithms, designed to avoid fragmentation loss, guarantee that a length of a grant issued by an OLT will match precisely the count for bytes to be transmitted to an ONU. The methods include determining an ONU uplink transmission egress based on a three-stage test, and various embodiments of methods for ONU report 700 threshold setting.Type: GrantFiled: February 1, 2011Date of Patent: February 4, 2014Assignee: PMC-Sierra Israel Ltd.Inventors: Onn Haran, Ariel Maislos, Barak Lifshitz
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Patent number: 8644369Abstract: Apparatus and methods generate equalizer coefficients for an equalizer of a receiver. In a high-speed receiver, received symbols can be subject to inter-symbol-interference (ISI). An equalizer can compensate for ISI and improve a bit error rate (BER). However, traditional adaptive techniques to generate coefficients for equalization can generate corrupted coefficients when equalized samples used for adaptation are based on clipped or heavily compressed signals. In certain situations, the clipping rate can be relatively high, such as over 20%. Equalizer performance is improved when the equalized symbols used directly or indirectly for adaptation are selected such that equalized symbols based on clipped input samples are not used for adaptation.Type: GrantFiled: December 1, 2009Date of Patent: February 4, 2014Assignee: PMC-Sierra, Inc.Inventors: Ognjen Katic, Paul V. Yee, William D. Warner
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Patent number: 8645626Abstract: Methods, systems, and computer programs for managing storage using a solid state drive (SSD) read cache memory are presented. One method includes an operation for determining whether data corresponding to a read request is available in a SSD memory when the read request causes a miss in a memory cache. The read request is served from the SSD memory when the data is available in the SSD memory, and when the data is not available in the SSD memory, SSD memory tracking logic is invoked and the read request is served from a hard disk drive. Invoking the SSD memory tracking logic includes determining whether a fetch criteria for the data has been met, and loading the data corresponding to the read request in the SSD memory when the fetch criteria has been met. The use of the SSD as a read cache improves memory performance for random data reads.Type: GrantFiled: April 24, 2012Date of Patent: February 4, 2014Assignee: PMC-Sierra US, Inc.Inventors: Steffen Mittendorff, Dieter Massa
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Patent number: 8639995Abstract: Signature circuits are used during testing of an integrated circuit. Test vectors are applied as inputs to a circuit under test. A signature circuit stores a “signature” for the circuit under test based on a combination of signals from the circuit under test in response to test vectors and a previous stored state of the signature register. The value contained in the signature register at the end of the test is the signature. A fault-free circuit generates a particular signature for the applied test vectors. Faults can be determined by detecting variances from the expected signature. In one embodiment, the signature circuit uses a combination of two error detection codes.Type: GrantFiled: February 11, 2010Date of Patent: January 28, 2014Assignee: PMC-Sierra, Inc.Inventor: Steven Scott Gorshe
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Patent number: 8631309Abstract: In an aspect, in general, a forward error correction algorithm (FEC) utilizes an FEC block structure in a manner that extends the effective error correction such that it can approach an “infinite” length to obtain benefits typical of very large FEC block size without the commensurate computation cost.Type: GrantFiled: May 4, 2012Date of Patent: January 14, 2014Assignee: PMC-Sierra, Inc.Inventors: Peter Graumann, Sean Gibb, Stephen Bates
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Patent number: 8624641Abstract: Disclosed is a high-swing voltage-mode transmitter or line driver. The transmitter can operate over a wide range of supply voltages. Increasing the available output swing merely involves increasing the supply voltage; the circuit adapts to maintain the desired output impedance. This allows for a tradeoff between output amplitude and power consumption. Another advantage of the proposed architecture is that it compensates for process, voltage, and temperature (PVT) and mismatch variations so as to keep rise and fall times matched. This feature reduces common-mode noise and hence electromagnetic interference in systems in which the transmitter is used.Type: GrantFiled: November 3, 2011Date of Patent: January 7, 2014Assignee: PMC-Sierra, Inc.Inventors: Julien Faucher, Michael Ben Venditti
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Patent number: 8627418Abstract: A method for accessing data in a storage area network is provided. The method initiates with receiving a request for a list of targets on the storage area network. All the targets on the storage area network are exposed to the requester and authentication requiring a password is requested from the requester to grant access to the targets on the storage are network. Access to the targets is granted if the password is acceptable, and access to the targets is refused if the password is unacceptable.Type: GrantFiled: March 21, 2008Date of Patent: January 7, 2014Assignee: PMC-Sierra, Inc.Inventors: Dean Kalman, Ken Sandars, Brett Dolecheck, Mike Reyero
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Publication number: 20140001601Abstract: A method of reducing current leakage in unused circuits performed during semiconductor fabrication and a semiconductor device or integrated circuit thereby formed. The method involves modifying a characteristic of at least one idle circuit that is unused in a product variant, to inhibit the circuit and reduce current leakage therefrom upon powering as well as during operation. The method can substantially increase the Vt (threshold voltage) of all transistors of a given type, such as all N-type transistors or all P-type transistors. The method is also suitable for controlling other transistor parameters, such as transistor channel length, as well as other active elements, such as N-type resistors or P-type resistors, in unused circuits which affect leakage current as well as for other unused circuits, such as a high Vt circuit, a standard Vt circuit, a low Vt circuit, and an SRAM cell Vt circuit.Type: ApplicationFiled: June 28, 2012Publication date: January 2, 2014Applicant: PMC-SIERRA US, INC.Inventors: Bruce SCATCHARD, Chunfang XIE, Scott BARRICK, Kenneth D. WAGNER
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Patent number: 8621318Abstract: A nonvolatile memory controller to recover encoded data by performing a hard-decision inner error correction code decoding and an outer error correction code decoding of the data decoded using the hard-decision inner error correction code decoding and then determining if the encoded data has been successfully decoded. If the encoded data has not been successfully decoded, the controller performs a soft-decision inner error correction code decoding of the encoded data using a soft-decision algorithm and an outer error correction code decoding of the data decoded using the soft-decision inner error correction code decoding and then determining if the encoded data has been successfully decoded. If the encoded data has not been successfully decoded, the controller recovers the data by performing a RAID operation on the encoded data.Type: GrantFiled: March 30, 2012Date of Patent: December 31, 2013Assignee: PMC-Sierra US, Inc.Inventors: Rino Micheloni, Alessia Marelli, Peter Z. Onufryk, Christopher I. W. Norrie
