Patents Assigned to PMC-Sierra
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Patent number: 8126010Abstract: In a passive optical network, dynamic bandwidth allocation and queue management methods and algorithms, designed to avoid fragmentation loss, guarantee that a length of a grant issued by an OLT will match precisely the count of bytes to be transmitted by an ONU. The methods include determining an ONU uplink transmission egress order based on a three-stage test, and various embodiments of methods for ONU report threshold setting.Type: GrantFiled: July 30, 2009Date of Patent: February 28, 2012Assignee: PMC-Sierra Israel Ltd.Inventors: Onn Haran, Ariel Maislos, Barak Lifshitz
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Patent number: 8126335Abstract: Methods and apparatuses for controlling transmission of converged data packets and for media access through a single next generation access (NGA) passive optical network (PON) which can coexist with EPON and GPON based systems and can interoperate with a 10 GEPON. A converged data packet is transmitted between a first node and a second node of the NGA network under NGA management control. The converged packet has a format which unifies a GEM header with the 10 GEPON preamble header and certain fields replaced in a EPON packet format to accommodate information corresponding to the preamble elements of a GEM packet. The converged data can be encoded in the line code of the 10 GEPON protocol, allowing use of a control protocol based either on MPCP or GTC for the NGA. Node apparatuses include NGA elements which enable preparation, encoding/decoding and transmission of converged packets.Type: GrantFiled: May 31, 2009Date of Patent: February 28, 2012Assignee: PMC-Sierra Israel Ltd.Inventor: Lior Khermosh
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Publication number: 20120045203Abstract: A system and method for determining non-fragmentation for communication of data packets includes generating a plurality of packets and storing in a cell-list at least one cell-value indicating a transmission duration of at least one of the packets in units of cell-size, where the cell-size represents a fixed, predetermined time required to transmit at least a minimum length packet. This facilitates determining non-fragmentation for communication of packets having reduced complexity, lower memory requirements, and shorter processing time than conventional techniques. The complexity is O(1), in contrast to conventional non-fragmentation techniques that have complexities O(N). Corresponding to the reduced complexity, the processing time is shorter than for conventional techniques. Depending on the application, the current embodiment has lower memory requirements than conventional non-fragmentation techniques.Type: ApplicationFiled: August 17, 2010Publication date: February 23, 2012Applicant: PMC SIERRA ISRAEL LTD.Inventor: Zachy Haramaty
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Patent number: 8116226Abstract: Broadcast primitive filtering in a SAS expander using virtual domains. The virtual domains can be non-overlapping or overlapping logical subsets of the physical topology, or a logical construct based on the membership of a device within a group. Broadcast event propagation is handled in accordance with predetermined policies associated with the virtual domains. These policies can, for example, include limiting the broadcast traffic within the boundaries of the logical zones defined by the subsets, or routing the broadcast events in accordance with access policies, or privileges, associated with the group.Type: GrantFiled: January 30, 2006Date of Patent: February 14, 2012Assignee: PMC-Sierra, USA Inc.Inventors: Heng Liao, Larrie Simon Carr
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Patent number: 8116409Abstract: Apparatus and methods detect the presence of an isolated pulse in a communications signal, such as a data signal carrying data for a serializer/deserializer (SerDes). An example of an isolated pulse is a “1” pulse preceded and followed by “0” pulses, or a “0” pulse preceded and followed by a “1” pulse. These isolated pulses can exhibit a narrow pulse width, and under severe jitter conditions, may not align with a baud sample point, which can cause the isolated pulse to be missed, resulting in a data decoding error. By detecting the presence of these isolated pulses and determining the most likely baud period to which they belong, jitter tolerance can be improved for many channel conditions. This can improve jitter tolerance of a SerDes receiver for links that suffer from various sources of Deterministic Jitter (DJ) such as Duty Cycle Distortion (DCD) and Inter-Symbol Interference (ISI).Type: GrantFiled: January 28, 2009Date of Patent: February 14, 2012Assignee: PMC-Sierra, Inc.Inventor: William D. Warner
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Patent number: 8102851Abstract: A method of signaling and detecting end-of-transmission on a data communications link that uses scrambling comprises, by a transmitting node of the network, appending an end of burst delimiter (EBD) binary sequence to burst data and transmitting the burst data and the EBD over the communication link to a headend of the network. In a 10 G EPON using a 64B/66B transmission code, the EBD is exemplarily a 198 bit pattern.Type: GrantFiled: May 13, 2009Date of Patent: January 24, 2012Assignee: PMC-Sierra Israel Ltd.Inventors: Jeff Mandin, Valentin Ossman
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Patent number: 8099655Abstract: A Galois Field multiplier circuit for multiplying two polynomials (multiplicands). The multiplier circuit can use any arbitrary primitive polynomial to preserve the Galois Field. The multiplier circuit includes at least one logic unit that receives as a first input one of the multiplicands and shift the multiplicand in question by 1 bit to the left. The logic unit receives as a second input a pre-determined primitive polynomial and multiplies the primitive polynomial by the highest bit of the multiplicand received at the other input of the logic unit. The bit-shifted multiplicand is XOR-ed with the primitive polynomial multiplied the highest bit of the multiplicand and the result of the XOR operation is provided to a second logic circuit that completes the multiplication of the two polynomials.Type: GrantFiled: December 20, 2007Date of Patent: January 17, 2012Assignee: PMC-Sierra US, Inc.Inventors: Kuan Hua Tan, Amr Wassal
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Patent number: 8095722Abstract: A method and apparatus are provided for implementing connection management in SAS expander devices. SAS expanders are commonly used within a SAS network topology to allow multiple disk drives to connect to multiple host devices. The method and apparatus provides arbitration of connection requests to be setup or removed among multiple end devices and expander devices so as to increase system performance and reduce hardware cost in a standard compliant manner.Type: GrantFiled: July 23, 2009Date of Patent: January 10, 2012Assignee: PMC-Sierra US, Inc.Inventors: Heng Liao, Kuan Hua Tan, Calvin Leung
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Patent number: 8089902Abstract: A method and system are provided for broadcast message filtering in SAS expanders. Common SAS topology defined by ANSI T10 specification only supports spanning tree topology (without loops) interconnection among multiple end devices and expander devices. Broadcast message filtering provides a mechanism to selectively discard broadcast messages, or primitives, in the SAS expanders to break the infinite loop path that broadcast primitives can traverse. This enables new SAS physical topologies with loops that are otherwise difficult or impossible to realize using SAS expanders that handle primitive broadcasts according to the definition of the SAS standard. By allowing redundant paths in a SAS topology, the problem of infinite broadcast flooding in SAS topology is reduced. Selectively forwarding broadcast messages can be based on whether the broadcast was originated at the source phy, or received by the source phy, or based on whether the source phy is a filtered phy.Type: GrantFiled: January 6, 2006Date of Patent: January 3, 2012Assignee: PMC-Sierra US, Inc.Inventors: Heng Liao, Kuan Hua Tan, Larrie Simon Carr
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Patent number: 8090981Abstract: A computer-implemented method of automatically configuring a platform of storage devices includes querying components of the platform to gather information about the capability of the platform, locating one or more storage devices within the platform, automatically determining one or more RAID levels that are supported by the platform, and automatically configuring one or more storage devices within the platform as a RAID system having a particular RAID level, where the particular RAID level is selected based on the capability of the platform.Type: GrantFiled: April 12, 2010Date of Patent: January 3, 2012Assignee: PMC-Sierra, Inc.Inventors: Dean Kalman, Clinton D. Knight
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Patent number: 8085764Abstract: A method and an apparatus for reducing power consumption and digital logic noise in a time division multiplexed memory switch. The method is embodied in an egress selection switch (ESS) block architecture. The ESS block includes a data disable block which prevents the propagation of data, in particular ingress grains, to a given group of egress ports if the data is not selected by any of the egress ports in a given group. While the ingress data disable method partitions ports into groups and saves power by disabling the fanout tree from the root on a port group basis, the egress data disable method saves power on a port group basis by disabling the fanout tree from the tail end in addition to applying the ingress data disable method. The ESS block also includes an grain select block for selecting and storing a given ingress grain for eventual output to an egress port.Type: GrantFiled: July 17, 2008Date of Patent: December 27, 2011Assignee: PMC-Sierra US, Inc.Inventors: Carl Dietz McCrosky, Andrew Milton Hughes, Winston Ki-Cheong Mok, Nicholas Wayne Rolheiser
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Patent number: 8080832Abstract: The invention provides an electrostatic discharge (ESD) protection device for protecting the internal circuitry of an integrated circuit chip from ESD current. The device includes a natively doped substrate having high resistance. A first well is formed in the substrate including a discharge circuit. A second well is formed in the substrate separated from the first well by the width of a natively doped region. The natively doped region has the same connectivity type and substantially the same doping profile as the substrate. During an ESD event, current leaking through the natively doped region between the discharge circuit and the second well creates a voltage that triggers the discharge circuit when reaching its trigger voltage. The resistance ratio between the natively doped region and the well is about 10 times or greater.Type: GrantFiled: September 30, 2008Date of Patent: December 20, 2011Assignee: PMC-Sierra US, Inc.Inventors: Graeme B. Boyd, Xun Cheng, Ariel D. E. Sibley
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Patent number: 8081665Abstract: Asynchronous/plesiochronous digital hierarchy (PDH) signals, such as DS1 and E1, are transported using virtual concatenation. The packetized data signals are frame encapsulated and subsequently inverse multiplexed into a plurality of PDH frames. An overhead packet is inserted in the transmitted frames to enable the receiver to determine the status of the frames and extract the differential delay experienced by various frames as they are routed through virtually concatenated channels. The extracted delays enables the receiver to realign the various frames of the PDH signal to reconstitute the originally transmitted signals that travel through different paths of the transport network linking the source and sink of the virtually concatenated channel.Type: GrantFiled: March 3, 2006Date of Patent: December 20, 2011Assignees: PMC—Sierra, Inc., Agere Systems, Inc.Inventors: Steven Scott Gorshe, Nevin R. Jones
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Publication number: 20110268443Abstract: An interface between an SFP compliant host device and an SFP PON ONT pluggable module is disclosed. The disclosed interface specification enables implementation of an SFP MSA (INF-8074i) compliant port which can host a PON ONT in a SFP module form factor, while maintaining full backwards compatibility with legacy SFP MSA compliant transceivers. Therefore, a host implemented according to this specification would be compatible with both the SFP PON ONT and any standard SFP MSA transceiver.Type: ApplicationFiled: April 28, 2011Publication date: November 3, 2011Applicant: PMC Sierra Ltd.Inventor: Gal Adler
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Publication number: 20110246861Abstract: A method of managing forward error correction (FEC) initialization and auto-negotiation in ethernet passive optical networks includes receiving FEC data from an optical network unit (ONU), and the optical line terminal (OLT) responds to the ONU with FEC data. Upon receiving data not forward error corrected from an ONU, the OLT responds with data not coded for FEC. Similarly, upon receiving forward error corrected data from the OLT, the ONU responds with forward error corrected data; and upon receiving data not forward error corrected from the OLT, the ONU responds with data not forward error corrected. The communications quality from the ONU is monitored, if the communications quality is not sufficient, the OLT transmits forward error corrected data to the ONU; otherwise, the OLT transmits non-FEC data to the ONU.Type: ApplicationFiled: June 30, 2009Publication date: October 6, 2011Applicant: PMC Sierra Ltd.Inventor: Lior KHERMOSH
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Patent number: 8023588Abstract: Apparatus and methods control predistortion of an RF transmitter. A base station or a mobile station can utilize predistortion to improve linearity characteristics of the RF power amplifier. When used effectively, predistortion limits spectral growth such that the amplified signal complies with regulatory requirements. With respect to bursty signals, specific improvement techniques are disclosed. A first technique is related to adaptation using only a smaller subset of samples of a burst. A second technique is related to selective application of digital predistortion, such as, only under high power conditions for a power amplifier. A third technique is directed to adaptation of less than all of the coefficients. These improvements permit the use of a smaller and less expensive amplifier for a given power class and can lengthen battery life for a mobile unit.Type: GrantFiled: April 8, 2008Date of Patent: September 20, 2011Assignee: PMC-Sierra, Inc.Inventors: Jeremy Benson, William D. Warner, Paul V. Yee
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Patent number: 8024142Abstract: A method and system for analyzing a signal waveform that comprises digitally sampling a signal at a periodic sampling interval, and accumulating a count of samples of the signal at a given logic level relative to a threshold value over a given period. The threshold value is stepped through a series of values while the accumulating of samples is repeated at a series of different clock offsets. The accumulated counts permit a statistical distribution of the signal waveform to be determined. A signal density can also be calculated by determining the difference between the count of adjacent samples at successive threshold values.Type: GrantFiled: December 20, 2007Date of Patent: September 20, 2011Assignee: PMC-Sierra US, Inc.Inventors: Mathieu Gagnon, Jurgen Hissen
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Patent number: 8019028Abstract: Apparatus and methods determine a frequency associated with a relatively strong interfering signal (interferer) using relatively simple run-length counting techniques. Counts of run-lengths can be analyzed to estimate a frequency of the interferer. For example, a peak run-length can be associated with a frequency. In one embodiment, counts of run-lengths are used to construct a theoretical peak run-length, which is then associated with a frequency for the interferer. A theoretical count associated with the theoretical peak run-length can also be used as an indication of a signal strength of the interferer.Type: GrantFiled: March 26, 2008Date of Patent: September 13, 2011Assignee: PMC-Sierra, Inc.Inventors: Anthony Eugene Zortea, Matthew McAdam
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Patent number: 8019029Abstract: Disclosed is a technique for mitigating the effect of an in-band interferer in Orthogonal Frequency Division Multiplexing (OFDM) wireless or wired networks that employ soft decision Viterbi decoder in the physical layer. The technique uses an independent estimation of the signal quality, which is passed to the Viterbi algorithm decoder so that it is able to discard the corrupted subcarriers. This improves the error correction capability of the Viterbi algorithm decoder in a receiver, which leads to fewer retransmissions and into higher information throughput.Type: GrantFiled: April 3, 2008Date of Patent: September 13, 2011Assignee: PMC-Sierra, Inc.Inventor: Ognjen Katic
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Patent number: 8018251Abstract: Apparatus and methods efficiently provide compatibility between CMOS integrated circuits and voltage levels that are different from that typically used by modern integrated circuits. For example, backwards compatibility can be desirable. Older signaling interfaces operate at different voltage levels than modern CMOS integrated circuits and conventional circuits to interface with these other signaling interfaces exhibit relatively high power consumption. In the context of a transmitter with a P-type substrate, an output driver is embodied in a deep N-well with retrograde P-wells and is biased with voltage biases that can float with respect to the VDD and VSS supplies provided to the CMOS integrated circuit. In the context of a receiver with a P-type substrate, a portion of a receiver is embodied in a deep N-well and biased with floating voltage biases such that the receiver is compatible with signaling received from a signaling technology with disparate voltage levels.Type: GrantFiled: June 1, 2010Date of Patent: September 13, 2011Assignee: PMC-Sierra, Inc.Inventors: Graeme B. Boyd, Guillaume Fortin