Patents Assigned to Realtek Semiconductor Corp.
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Publication number: 20260322361Abstract: A relaxation oscillator and a method for generating at least one oscillation signal in the relaxation oscillator are provided. The relaxation oscillator includes a capacitor, a resistor, an inverting amplifier and a first logic inverter, where a first terminal of the resistor is coupled to a first terminal of the capacitor. The inverting amplifier is configured to generate a first digital signal according to an analog signal on the first terminal of the capacitor, and the first logic inverter is configured to generate a second digital signal according to the first digital signal, where a second terminal of the resistor is configured to pull up or pull down the analog signal according to the first digital signal, and a second terminal of the capacitor is configured to receive the second digital signal.Type: ApplicationFiled: April 14, 2026Publication date: October 15, 2026Applicant: Realtek Semiconductor Corp.Inventor: Yu-Hsien Li
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Patent number: 12764777Abstract: A multi-link transmission device includes a first transmission module, a second transmission module, an analysis module and a multi-link control module. The first transmission module transmits each packet in the first transmission module via a first link, and transmits a first transmission condition for each pack transmission for the first transmission module. The second transmission module transmits each packet in the second transmission module via a second link, and transmits a second transmission condition for each pack transmission for the second transmission module. The analysis module computes a ratio of packet consumption rates of the first transmission module and the second transmission module according to the first transmission condition and the second transmission condition. The multi-link control module dispatches a packet to the first transmission module or the second transmission module according to at least the ratio of the packet consumption rates.Type: GrantFiled: December 1, 2023Date of Patent: October 13, 2026Assignee: Realtek Semiconductor Corp.Inventor: Cheng-Hsuan Wu
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Patent number: 12763733Abstract: A cascode amplifier comprises: a common-source amplifier includes a first MOST (metal-oxide semiconductor transistor) of a first type configured to receive a first input signal and output a first current to a first node in accordance with a body voltage applied at a body of the first MOST of the first type; a first common-gate amplifier comprising a second MOST of the first type and configured to receive the first current from the first node and output a second current to a second drain node in accordance with a first gate voltage; a dynamic body voltage generator configured to receive the first input signal and output the body voltage; and a load configured to establish a third voltage at a third drain node in response to the second current through a DC (direct current) path between the second drain node and the third drain node.Type: GrantFiled: December 29, 2023Date of Patent: October 13, 2026Assignee: REALTEK SEMICONDUCTOR CORP.Inventors: Ting-Hsu Chien, Chia-Liang (Leon) Lin
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Publication number: 20260313601Abstract: A method for utilizing a trigger device without display screens to search a target Bluetooth device is disclosed including: providing a Bluetooth peripheral device, wherein a pairing key corresponding to the target Bluetooth device is stored in the Bluetooth peripheral device; providing a trigger device without any display screen; establishing a wireless signal connection between the trigger device and the Bluetooth peripheral device; receiving a search instruction issued by a user through the trigger device; utilizing the trigger device to transmit a search request to the Bluetooth peripheral device through the wireless signal connection; and utilizing the Bluetooth peripheral device to search for the position of the target Bluetooth device according to the search request.Type: ApplicationFiled: May 15, 2026Publication date: October 8, 2026Applicant: Realtek Semiconductor Corp.Inventors: Chia Chun HUNG, Hou-Tse HUNG, Chien Yuan CHEN
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Patent number: 12756606Abstract: A transceiver device includes a conversion circuit, a phase-locked loop, a transmission processing circuit, a reception processing circuit, and a selection circuit. The conversion circuit performs a digital-to-analog conversion for a modulation data to generate a first control signal. The phase-locked loop includes a control circuit and a voltage-controlled oscillator. The control circuit generates a second control signal according to the modulation data, a reference signal, and a frequency signal. The voltage-controlled oscillator determines an oscillation frequency according to the first control signal and the second control signal to generate the frequency signal. The transmission processing circuit performs a transmission processing according to the frequency signal. The reception processing circuit performs a reception processing according to the frequency signal.Type: GrantFiled: March 27, 2025Date of Patent: October 6, 2026Assignee: REALTEK SEMICONDUCTOR CORP.Inventors: Wei-Cheng Lin, Ching-Her Huang, Ren-Hong Yen
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Patent number: 12756407Abstract: A wireless communication device for concurrently receiving multiple types of signals and associated methods are provided. The wireless communication device includes at least one low noise amplifier (LNA), a first conversion circuit, a second conversion circuit, a first filter and a second filter. The at least one LNA amplifies an initial signal received by an antenna to generate at least one input signal, wherein the first conversion circuit and the second conversion circuit perform conversion operations according to the at least one input signal to generate a first converted signal and a second converted signal, respectively. More particularly, the first filter performs a filtering operation corresponding to a first-type signal upon the first converted signal, and the second filter performs a filtering operation corresponding to a second-type signal upon the second converted signal.Type: GrantFiled: July 9, 2024Date of Patent: October 6, 2026Assignee: Realtek Semiconductor Corp.Inventors: Ping-Hsuan Tsai, Kuan-Yu Shih, Chia-Jun Chang
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Patent number: 12757498Abstract: A circuit for preventing current backflow includes: a signal connection terminal, a power input terminal, an internal power supply terminal, an electrostatic protection circuit, a first switch element and a cut-off control circuit. The electrostatic protection circuit is coupled to the signal connection terminal and the internal power supply terminal. The first switch element is coupled between the power input terminal and the internal power supply terminal. The cut-off control circuit is coupled to the signal connection terminal, the power input terminal and the first switch element. The cut-off control circuit controls the switching of the first switch element according to a voltage of the signal connection terminal and a voltage of the power input terminal.Type: GrantFiled: April 10, 2023Date of Patent: October 6, 2026Assignee: REALTEK SEMICONDUCTOR CORP.Inventors: Heng-Chia Hsu, Jun Yang, Yu-Sian Yang
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ELECTRONIC DEVICE AND METHOD FOR PERFORMING AUDIO COMMUNICATION BETWEEN FIRST SPACE AND SECOND SPACE
Publication number: 20260299872Abstract: An electronic device and a method for performing audio communication between a first space and a second space are provided. The electronic device is one of multiple near-end devices at the first space and serves as a master device, and at least one other near-end device serves as a slave device. A front-end processing circuit of the master device generates a master signal according to sound signals received by a microphone of the master device, and a front-end processing circuit of the slave device generates a slave signal according to sound signals received by a microphone of the slave device. An audio processing circuit of the master device generates a final signal according to the master signal and a slave signal, and the master device transmits the final signal to a far-end device at the second space via an internet connection.Type: ApplicationFiled: March 26, 2026Publication date: October 1, 2026Applicant: Realtek Semiconductor Corp.Inventors: Chung-Shih Chu, Chieh-Min Tsai, Tien-Chiu Hung -
ELECTRONIC DEVICE AND METHOD FOR PERFORMING AUDIO COMMUNICATION BETWEEN FIRST SPACE AND SECOND SPACE
Publication number: 20260299873Abstract: An electronic device and a method for performing audio communication between a first space and a second space are provided, where the electronic device is one of multiple near-end devices in the first space. When the electronic device is taken as a master device, each of the other near-end devices is taken as a slave device. A network receiver of the master device obtains an original far-end audio signal from a far-end device in the second space through an internet connection, and an audio processing circuit of the master device processes the original far-end audio signal to generate a master audio signal and a slave audio signal, where a speaker of the master device plays a master output audio signal according to the master audio signal, and a speaker of the slave device plays a slave output audio signal according to the slave audio signal from the master device.Type: ApplicationFiled: March 30, 2026Publication date: October 1, 2026Applicant: Realtek Semiconductor Corp.Inventors: Chung-Shih Chu, Chieh-Min Tsai, Tien-chiu Hung, Wei-Chung Ting -
Publication number: 20260303455Abstract: A network system configuration method, applied a network system comprising a plurality of network nodes. The method comprises: (a) a host device transmitting a configuration data unit to a first network node, wherein the configuration data unit comprises an initial counter value; (b) modifying the initial counter value to a first counter value, then the first network node using the first counter value as a first target address of the first network node; (c) the first network node determining whether there is a second network node to which transmission can continue; and (d) if the second network node exists, transmitting the configuration data unit to the second network node, after the second network node modifying the first counter value to a second counter value, the second network node using the second counter value as a second target address of the second network node.Type: ApplicationFiled: March 26, 2026Publication date: October 1, 2026Applicant: Realtek Semiconductor Corp.Inventors: Wei-Chiang Hsu, Liang-Wei Huang
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Patent number: 12750145Abstract: A wireless communication device includes a wireless transceiver circuit, a baseband signal processing circuit, and an interference detection device. The wireless transceiver circuit receives a wireless signal from a wireless transmission channel, and converts the wireless signal into a baseband signal. The baseband signal processing circuit processes the baseband signal including a plurality of packets. The interference detection device is coupled to the baseband signal processing circuit, and performs a short-term interference detection and a long-term interference detection according to the plurality of packets, to determine whether interference exists in the wireless transmission channel and generate a detection result, wherein the short-term interference detection is an interference detection within a single packet, and the long-term interference detection is an interference detection across packets.Type: GrantFiled: February 29, 2024Date of Patent: September 29, 2026Assignee: Realtek Semiconductor Corp.Inventors: Wei-Chi Lai, Wei-Hsuan Chang
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Patent number: 12750155Abstract: An adaptive data rate method for use in a communication device. The communication device includes a controller and a transceiver coupled to each other. The method includes the controller increasing an initial data rate to generate a test data rate, and the transceiver transmitting a test packet according to the test data rate, a packet length of the test packet being less than a maximum packet length of a data packet. The method further includes the controller selecting one from the initial data rate and the test data rate as a selected data rate according to a transmission result of the test packet, and the transceiver transmitting the data packet according to the selected data rate.Type: GrantFiled: October 7, 2024Date of Patent: September 29, 2026Assignee: Realtek Semiconductor Corp.Inventors: Zhaoming Li, Huifang Yu, Jing Zhang
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Patent number: 12750502Abstract: An image processing method includes receiving an image frame, retrieving luminance information and chrominance information from the image frame, respectively, encoding the luminance information to generate an encoded luminance frame, encoding the chrominance information to generate an encoded chrominance frame, writing the encoded luminance frame to a first memory portion of a memory, and writing the encoded chrominance frame to a second memory portion of the memory. The image processing method further includes reading the encoded luminance frame from the first memory portion and decoding the encoded luminance frame to generate decoded luminance information, and reading the encoded chrominance frame from the second memory portion and decoding the encoded chrominance frame to generate decoded chrominance information.Type: GrantFiled: April 17, 2023Date of Patent: September 29, 2026Assignee: Realtek Semiconductor Corp.Inventors: Po-Hsien Wu, Yi-Chen Tseng
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Patent number: 12750025Abstract: A method for performing common mode voltage re-biasing in an analog front-end circuit of a receiver, an associated common mode voltage re-biasing circuit, the receiver and an associated integrated circuit are provided. The common mode voltage re-biasing circuit may include a control circuit and multiple switchable common mode voltage re-biasing sub-circuits. The control circuit generates at least one control signal according to a command, for controlling the common mode voltage re-biasing circuit to operate in a selected circuit configuration. The multiple switchable common mode voltage re-biasing sub-circuits select a predetermined circuit configuration from a first predetermined circuit configuration and a second predetermined circuit configuration according to the at least one control signal to be the selected circuit configuration to perform common mode voltage re-biasing operations corresponding to the selected circuit configuration, respectively.Type: GrantFiled: September 27, 2022Date of Patent: September 29, 2026Assignee: Realtek Semiconductor Corp.Inventor: Bing-Hung Chen
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Publication number: 20260293729Abstract: A method for shrinking a memory signal via region in accordance with memory-side ball layout to adjust control-side ball arrangement for installing a control circuit at a printed circuit board (PCB) and associated apparatus are provided. The method may include: providing a set of pads on a board-side region of a package of the control circuit, the set of pads corresponding to a set of first pads within a first installation region of the PCB, to act as control-side memory signal pads for conducting a set of predetermined memory signals; and providing multiple other pads on the board-side region, the multiple other pads corresponding to a set of remaining pads within the first installation region, to act as other-purpose pads for conducting other signals, where multiple vias are arranged as being adjacent to the set of first pads to shrink the memory signal via region, for enhancing control-side ball-arrangement flexibility.Type: ApplicationFiled: December 30, 2025Publication date: September 24, 2026Applicant: Realtek Semiconductor Corp.Inventors: Chao-Min Lai, Shou-Te Yen
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Publication number: 20260291780Abstract: A communication device for performing sensing includes: at least one storage device, configured to store instructions; and at least one processing circuit, configured to execute the instructions of: transmitting a plurality of first packets; receiving a plurality of second packets corresponding to the plurality of first packets; determining a plurality of channel frequency responses (CFRs) according to the plurality of first packets and the plurality of second packets, respectively; transforming the plurality of CFRs into a plurality of channel impulse responses (CIRs); determining at least one distance of a target object according to a CIR of the plurality of CIRs; compensating the plurality of CIRs to generate a plurality of compensated CIRs; transforming the plurality of compensated CIRs into a plurality of compensated CFRs; and determining at least one velocity of the target object according to the plurality of compensated CFRs.Type: ApplicationFiled: March 17, 2026Publication date: September 24, 2026Applicant: Realtek Semiconductor Corp.Inventors: Der-Zheng Liu, Shau-Yu Cheng, Cho-Han Yu
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Patent number: 12745467Abstract: An input/output port circuit includes an input/output pad, a transistor, and a conductive routing wire. The transistor has a first connection terminal and a second connection terminal. The first connection terminal of the transistor is electrically connected to the input/output pad through a conductive connection wire, and the second connection terminal is electrically connected to another transistor. The conductive routing wire is electrically connected to the first terminal of the transistor. The conductive routing wire is configured to provide a serial resistance, thereby forcing a surge current to flow toward the another transistor when the surge current is inputted in the input/output circuit through the input/output pad.Type: GrantFiled: September 9, 2022Date of Patent: September 22, 2026Assignee: REALTEK SEMICONDUCTOR CORP.Inventors: Sz-Ying Yu, Chen-Hsuan Ku, Shang-Hung Lin, Kun-Yu Tai
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Publication number: 20260280540Abstract: A processing circuit includes a delay circuit for outputting a delayed signal according to a first path delay coefficient; a control circuit for determining a clock phase sampling time according to a second path delay coefficient and outputting a controlled signal according to the clock phase sampling time; a transforming circuit for transforming the controlled signal to a transformed signal; a mixing circuit for mixing the delayed signal and the transformed signal, to generate a mixed signal; a removing circuit for removing a direct current (DC) component of the mixed signal, to generate a removed signal; a computing circuit for computing the first path delay coefficient, the second path delay coefficient and a signal power according to the removed signal; an amplifying circuit for amplifying an amplitude of the removed signal, to generate an amplified signal; and a combining circuit for combining a plurality of chirps in the amplified signal.Type: ApplicationFiled: February 9, 2026Publication date: September 17, 2026Applicant: Realtek Semiconductor Corp.Inventors: Chung-Yao Chang, Chuan-Hu Lin
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Publication number: 20260277523Abstract: The present invention provides a control method of a display is disclosed, wherein the display is a first display, and the control method includes: obtaining second resolution information of at least one second display; combining the second resolution information of the at least one second display with first resolution information of the first display to generate modified resolution information; transmitting the modified resolution information to an image source device; receiving image frame data from the image source device; extracting first frame data from the image frame data, and displaying the first frame data on the first display; and transmitting the image frame data to the at least one second display.Type: ApplicationFiled: March 3, 2026Publication date: September 17, 2026Applicant: Realtek Semiconductor Corp.Inventors: Yuh-Wey Lin, Tsung-Han Li, Bo-Yu Lai
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Patent number: D1153065Type: GrantFiled: April 30, 2024Date of Patent: October 13, 2026Assignee: REALTEK SEMICONDUCTOR CORP.Inventors: An-Ming Lee, Bo-Kai Huang, Wu-Chih Lin, Yueh-Hsing Huang