Patents Assigned to Realtek Semiconductor Corp.
  • Patent number: 12388422
    Abstract: A resistive attenuator and a method for improving linearity of the resistive attenuator are provided. The resistive attenuator includes a first transistor, an attenuation circuit and a compensation circuit, wherein both the first transistor and the attenuation circuit are coupled between an input terminal and an output terminal of the resistive attenuator, and the compensation circuit is coupled to the first transistor. The first transistor is configured to provide a first signal path between the input terminal and the output terminal. The attenuation circuit is configured to provide a second signal path between the input terminal and the output terminal, wherein signal attenuation of the second signal path is greater than signal attenuation of the first signal path. The compensation circuit is configured to compensate nonlinear distortion caused by the first transistor.
    Type: Grant
    Filed: August 4, 2023
    Date of Patent: August 12, 2025
    Assignee: Realtek Semiconductor Corp.
    Inventors: Yi-Ching Wu, Chia-Jun Chang
  • Patent number: 12386695
    Abstract: A method for scanning bad block of a memory and a circuit system thereof are provided. In a procedure of scanning bad blocks of the memory, the circuit system uses a cache read command that is adapted to a process of continuously reading a plurality of memory pages of the memory. The cache read command loads a memory page data to a cache of the memory in advance, and then reads the memory page data from the cache at a next instruction cycle. Next, the cache read command loads a next memory page data to the cache. These steps are repeated until the procedure of scanning bad blocks of the memory is completed. The method can effectively reduce the time for the memory to prepare the next page data so as to reduce the impact of the busy time of the memory on time performance.
    Type: Grant
    Filed: December 23, 2022
    Date of Patent: August 12, 2025
    Assignee: REALTEK SEMICONDUCTOR CORP.
    Inventor: Fu-Ching Hsu
  • Patent number: 12389472
    Abstract: Disclosed is a method for switching pairing in a mesh network system, including: selecting, by a network node, a new parent node; generating and sending, by the network node, a pairing change request packet to the new parent node when the new parent node is not an access point; adding, by the new parent node, MAC addresses of the network node and its descendant nodes to a refugee table when determining that it can provide relay services; returning, by the new parent node, a first pairing approval packet to the network node when the new parent node is a root node; forwarding, by the new parent node, the pairing change request packet upstream when the new parent node is not the root node; wherein pairing switching is successful if the network node receives the first pairing approval packet.
    Type: Grant
    Filed: June 21, 2023
    Date of Patent: August 12, 2025
    Assignee: REALTEK SEMICONDUCTOR CORP.
    Inventors: ZhaoMing Li, ZuoHui Peng
  • Publication number: 20250254991
    Abstract: A filler cell, a semiconductor device, and a logic circuit are provided. The filler cell includes two dummy polysilicon layers and a threshold voltage layer. The dummy polysilicon layers are arranged at intervals in a first direction. The threshold voltage layer is below the dummy polysilicon layers, and the two opposite sides of the threshold voltage layer in the first direction extend in a second direction and are respectively aligned with center points of the dummy polysilicon layers. The two opposite sides of the threshold voltage layer in the second direction are respectively aligned with the two opposite sides of each of the dummy polysilicon layers in the second direction. The first direction is perpendicular to the second direction. The semiconductor device includes a plurality of filler cells, at least one transistor cell, and another two threshold voltage layers. The logic circuit includes a plurality of semiconductor devices.
    Type: Application
    Filed: September 19, 2024
    Publication date: August 7, 2025
    Applicant: REALTEK SEMICONDUCTOR CORP.
    Inventor: Chan-Yuan Chang
  • Publication number: 20250251907
    Abstract: A numerical data processing method includes transforming a plurality of original numerical values of data into a plurality of number sequences; and determining a maximal value, a minimal value and at least a survival value of the plurality of number sequences according to a sorting result of the plurality of number sequences; wherein the plurality of number sequences are one-hot encoding.
    Type: Application
    Filed: August 6, 2024
    Publication date: August 7, 2025
    Applicant: Realtek Semiconductor Corp.
    Inventor: Chih-Hao Liu
  • Publication number: 20250251892
    Abstract: A method for switching a display device to a preset mode, and associated devices thereof, are provided. The method includes: utilizing a storage device to store identification information of a first preset device, identification information of a second preset device, and setting information corresponding to the preset mode; utilizing a third device to obtain identification information of a first device and identification information of a second device; and when the third device determines that the first device and the second device are, respectively, the first preset device and the second preset device, utilizing the third device to apply the setting information stored in the storage device to the display device. More particularly, in a system formed by a signal source device, a DisplayPort (DP) hub circuit and the display device, any of them can act as the third device.
    Type: Application
    Filed: January 23, 2025
    Publication date: August 7, 2025
    Applicant: Realtek Semiconductor Corp.
    Inventors: Yuh-Wey Lin, Chien-Wei Chen, Tzuo-Bo Lin, Yu-Pin Chou
  • Patent number: 12375111
    Abstract: A method for calibrating compensation values utilized by a compensation device in a transmitter includes: obtaining a plurality of output signals sequentially generated by the transmitter by processing a pair of input signals based on a plurality of pairs of compensation values as a plurality of feedback signals, where each feedback signal corresponds to one of the plurality of pairs of compensation values; obtaining a signal component of the feedback signals at a predetermined frequency as a portion of the feedback signals; determining a pair of equivalent impairment parameters in a calibration operation according to the plurality of pairs of compensation values and the portion of the feedback signals; and determining a pair of calibrated compensation values according to the pair of equivalent impairment parameters and providing the pair of calibrated compensation values to the compensation device.
    Type: Grant
    Filed: April 28, 2023
    Date of Patent: July 29, 2025
    Assignee: Realtek Semiconductor Corp.
    Inventors: Yuan-Shuo Chang, Tzu-Ming Kao
  • Patent number: 12366991
    Abstract: A multi-cluster system, comprising: a first cluster, comprising a first processor and a second processor; a second cluster, comprising a third processor and a fourth processor; and a storage system, comprising a first storage device comprising a first port and a second port. The first processor is coupled to the first port of the first storage device and the third processor is coupled to the second port of the first storage device, wherein the first processor and the third processor can read information stored in an identical address of the first storage device.
    Type: Grant
    Filed: November 30, 2023
    Date of Patent: July 22, 2025
    Assignee: Realtek Semiconductor Corp.
    Inventors: Chang-Hsien Tai, Yun-Ru Huang
  • Publication number: 20250232915
    Abstract: A capacitor unit includes a first finger electrode, a second finger electrode, and a third finger electrode. The first finger electrode points to the second finger electrode and the third finger electrode, and is configured to receive a first terminal signal. The second finger electrode points to the first finger electrode, and is configured to receive a second terminal signal. The third finger electrode is disposed adjacent to the second finger electrode with an interval. The third finger electrode points to the first finger electrode, and is configured to receive another second terminal signal. One part of the first finger electrode is disposed interleaved with the second finger electrode, and the other part of the first finger electrode is disposed interleaved with the third finger electrode.
    Type: Application
    Filed: October 7, 2024
    Publication date: July 17, 2025
    Applicant: REALTEK SEMICONDUCTOR CORP.
    Inventors: Shih-Bin Chen, Kai-Yue Lin
  • Publication number: 20250234026
    Abstract: A motion estimation and motion compensation (MEMC) system with calibration function and a parameter calibration method thereof relate to a parameter calibration method for MEMC. The parameter calibration method is configured to calibrate an MEMC program. The parameter calibration method includes storing a default feature set; performing the MEMC program on a calibrated video to fetch a testing feature set; generating a calibration parameter according to a difference vale between the default feature set and the testing feature set; and adjusting a correction parameter of the MEMC calibration program in accordance with the calibration parameter.
    Type: Application
    Filed: September 23, 2024
    Publication date: July 17, 2025
    Applicant: REALTEK SEMICONDUCTOR CORP.
    Inventors: Li-Heng Su, Chih-Shun Fan Chiang
  • Patent number: 12362710
    Abstract: A method of envelope detection receives an RF (radio frequency) signal comprising a first voltage and a second voltage; converts the first voltage into a first current using a first VCCS (voltage controlled current source); converts the second voltage into a second current using a second VCCS; converts a bias voltage into a third current using a third VCCS; converting an output voltage into a fourth current using a fourth VCCS; sums the first current and the second current into an input current flowing through a first internal node of a first internal voltage; sums the third current and the fourth current into a mirrored current flowing through a second internal node of a second internal voltage; uses a source follower to receive the second internal voltage and output the output voltage; and uses a current mirror to force the mirrored current to be equal to the input current.
    Type: Grant
    Filed: November 10, 2022
    Date of Patent: July 15, 2025
    Assignee: REALTEK SEMICONDUCTOR CORP.
    Inventor: Chia-Liang (Leon) Lin
  • Patent number: 12363330
    Abstract: An image processing device includes an image encoder, a memory and an image decoder. The image encoder receives an input image frame, retrieves luminance information and chrominance information from the input image frame, respectively, encodes the luminance information to generate an encoded luminance frame, and encodes the chrominance information to generate an encoded chrominance frame. The memory includes a first memory portion, a second memory portion and a third memory portion. The first memory portion stores the encoded luminance frame, and the second memory portion or the third memory portion stores the encoded chrominance frame. The image decoder reads the encoded luminance frame from the first memory portion to perform decoding, and reads the encoded chrominance frame from the second memory portion or the third memory portion for decoding.
    Type: Grant
    Filed: April 17, 2023
    Date of Patent: July 15, 2025
    Assignee: Realtek Semiconductor Corp.
    Inventors: Yi-Chen Tseng, Po-Hsien Wu
  • Publication number: 20250226920
    Abstract: A wireless transmission method, for a wireless communication network having a transmission device and a reception device, wherein the wireless transmission method includes transmitting, by the transmission device, a first packet including at least a partial frame check sequence (PFCS) and retransmitting the first packet to the reception device; and combining, by the transmission device, the first packet and the first packet retransmitted by the transmission device as a complete packet; wherein no acknowledgement (ACK) message exists in a time sequence between the first packet, transmitted by the transmission device and the retransmitted first packet.
    Type: Application
    Filed: October 8, 2024
    Publication date: July 10, 2025
    Applicant: Realtek Semiconductor Corp.
    Inventors: Chia-Feng Liu, Chiao-Ling Yang
  • Patent number: 12353345
    Abstract: The present disclosure provides a multi-path universal asynchronous transceiver (UART) and transmission method thereof. The multi-path UART comprises a first buffer, a second buffer, and a tx aggregation and arbitration circuit respectively coupled to the first buffer and the second buffer and presets a predetermined threshold. The tx aggregation and arbitration circuit polls the first buffer and the second buffer according to the predetermined threshold, and executes an arbitration procedure on the first buffer and the second buffer to obtain at least one of first log information packet and at least one of second log information packet correspondingly. Thus, when inputting a plurality of log sources, it is not necessary to have a plurality of output pins and to avoid disorder caused by the cross-influence of multiple log information for resource conservation and providing log information correctness.
    Type: Grant
    Filed: June 21, 2023
    Date of Patent: July 8, 2025
    Assignee: REALTEK SEMICONDUCTOR CORP.
    Inventors: GuoFeng Zhang, YingXue Wang, Hui Shen, ZhaoMing Li
  • Publication number: 20250218441
    Abstract: A method for performing wake-up control on a voice-controlled device with aid of detecting voice feature of self-defined word and an associated processing circuit are provided. The method may include: performing feature collection on audio data of at least one audio clip to generate at least one feature list of the at least one audio clip, in order to establish a feature-list-based database in the voice-controlled device; performing the feature collection on audio data of another audio clip to generate another feature list of the other audio clip; and performing at least one screening operation on at least one feature in the other feature list according to the feature-list-based database to determine whether the other audio clip is invalid, in order to selectively ignore the other audio clip or execute at least one subsequent operation, where the at least one subsequent operation includes waking up the voice-controlled device.
    Type: Application
    Filed: October 8, 2024
    Publication date: July 3, 2025
    Applicant: Realtek Semiconductor Corp.
    Inventor: Ying-Ying Chao
  • Publication number: 20250216884
    Abstract: A reference current generating circuit includes a temperature sensing circuit, an adjustable resistor, a current mirror, and a calibration circuit. The temperature sensing circuit senses a temperature of the reference current generating circuit to provide a voltage. The adjustable resistor generates a reference current according to the voltage. The current mirror generates an output current according to the reference current. The calibration circuit includes a resistor, a comparator and a control circuit. The resistor generates an output voltage according to the output current. The comparator compares the output voltage with a reference voltage to generate a comparison result. The control circuit sequentially generates and transmits multiple control signals to the adjustable resistor, and determines a final control signal according to the comparison result.
    Type: Application
    Filed: December 24, 2024
    Publication date: July 3, 2025
    Applicant: Realtek Semiconductor Corp.
    Inventor: Han-Hsiang Huang
  • Patent number: 12348230
    Abstract: An all-digital duty cycle corrector and a method for correcting a duty cycle of an output clock are provided. The all-digital duty cycle corrector includes a duty cycle adjustment circuit, an asynchronous sampler, a counter and a correction control circuit. The duty cycle adjustment circuit performs duty cycle adjustment on an input clock to generate the output clock according to a digital control code. The asynchronous sampler performs asynchronous sampling on the output clock to generate N sampling results at N time points, respectively. The counter counts a number of first logic values among the N sampling results to generate a counting result. The correction control circuit compares the counting result with a reference value to generate a comparison result, and selectively adjusts the digital control code according to the comparison result, in order to correct the duty cycle of the output clock.
    Type: Grant
    Filed: August 22, 2023
    Date of Patent: July 1, 2025
    Assignee: Realtek Semiconductor Corp.
    Inventor: Tse-Hung Chen
  • Publication number: 20250212087
    Abstract: A Wi-Fi network includes a primary node and N secondary nodes, N being an integer greater than 1. A packet forwarding method of the Wi-Fi network includes the primary node transmitting M unicast packets to the N secondary nodes in sequence, M being a positive integer and M?N, a forwarding secondary node in the N secondary nodes receiving the M unicast packets, the forwarding secondary node generating and transmitting a forwarding packet according to a unicast packet in the M unicast packets, and a target secondary node in the N secondary nodes receiving the forwarding packet.
    Type: Application
    Filed: August 19, 2024
    Publication date: June 26, 2025
    Applicant: Realtek Semiconductor Corp.
    Inventors: ZHAOMING LI, Mengzhou Shen, Lei Chen
  • Publication number: 20250209034
    Abstract: An information transceiving method, applied to an information transceiving system with a transmission device and a reception device, the transmission device comprising a first TX input interface following a first transceiving specification and a second TX input interface following a second transceiving specification, the reception device comprising a first RX output interface following a third transceiving specification.
    Type: Application
    Filed: December 20, 2024
    Publication date: June 26, 2025
    Applicant: Realtek Semiconductor Corp.
    Inventor: Yueh-Hsing Huang
  • Patent number: 12342032
    Abstract: A control integrated circuit (IC) for maintaining video output to a conditional access module (CAM) with aid of reference clock regeneration, an associated television receiver and an associated method are provided. The control IC may include an input control circuit, a frame processing circuit, a clock control circuit, and an output control circuit. The input control circuit receives a transport stream (TS) data signal from a demodulator circuit, the frame processing circuit performs frame processing operations on the TS data signal to prepare a plurality of frames, the clock control circuit generates a second reference clock signal according to the TS valid signal to be a replacement for a first reference clock signal, and the output control circuit outputs the plurality of frames to the CAM according to the second reference clock signal, to allow the CAM to perform conditional access (CA) control for the television receiver.
    Type: Grant
    Filed: October 13, 2022
    Date of Patent: June 24, 2025
    Assignee: Realtek Semiconductor Corp.
    Inventors: Xiangzhu Yang, Xiaomao Zhou, Mingrui Li, Liupeng Deng