Patents Assigned to Realtek Semiconductor Corp.
  • Publication number: 20240064117
    Abstract: A signal compensation device includes a first receiving circuit, a second receiving circuit, a first buffer, a second buffer, a third buffer, and a processing circuit. The first receiving circuit receives a first video signal from a first video source. The second receiving circuit receives a second video signal from a second video source, wherein both the first video signal and the second video signal correspond to a same program. The first buffer stores a first transport stream (TS) packet group corresponding to the first video signal. The second buffer stores a second TS packet group corresponding to the second video signal. The processing circuit dynamically stores a first TS packet of the first TS packet group or a second TS packet of the second TS packet group to the third buffer according to a predetermined source in response to TS packet status.
    Type: Application
    Filed: July 24, 2023
    Publication date: February 22, 2024
    Applicant: Realtek Semiconductor Corp.
    Inventor: Chun-Yi Chen
  • Publication number: 20240062037
    Abstract: A neural network system and an operation method for a neural network system are provided. The neural network system includes at least one edge device and a server. Each edge device stores a neural network architecture. The neural network architecture includes at least one operator and a model identifier, and the at least one operator of the neural network architecture stored in the each edge device includes an operator identifier. The server is connected to the each edge device. The each edge device is configured to, upon being powered on, transmit the operator identifier of each operator to the server to request the server to return parameters for the each operator; receive the parameters of the each operator and combine the parameters of the each operator with the neural network architecture to obtain a neural network model; and execute a predetermined task based on the neural network model.
    Type: Application
    Filed: February 9, 2023
    Publication date: February 22, 2024
    Applicant: REALTEK SEMICONDUCTOR CORP.
    Inventor: Cheng-Hao Lee
  • Publication number: 20240063634
    Abstract: A method and apparatus for simulating breakdown of an electronic component are provided. The method includes: when a terminal of an equivalent circuit model receives test charges, pulling up a voltage level of a first node of the equivalent circuit model; when the voltage level of the first node reaches a first threshold, turning on a first voltage controlled switch to pull up a voltage level of a second node of the equivalent circuit model; when the voltage level of the second mode reaches a second threshold, turning on a second voltage controlled switch to pull down a voltage level of the terminal to a holding voltage level to simulate snapback breakdown of the electronic component; and turning on a third voltage controlled switch to pull down the voltage level of the second node to turn off the second voltage controlled switch, thereby simulating second breakdown of the electronic component.
    Type: Application
    Filed: August 17, 2023
    Publication date: February 22, 2024
    Applicant: Realtek Semiconductor Corp.
    Inventors: Shih-Hsin Liao, Rui-Hong Liu, Tay-Her Tsaur, Po-Ching Lin
  • Patent number: 11910059
    Abstract: A method for retrieving a program data and a circuit system thereof are provided. The method that uses a dynamic packet identifier (PID) filter to retrieve the program data can be applied to a digital TV system. In the method, a master guide table is retrieved from a transport stream of digital TV signals, and a parsing method is executed to obtain a series of the PIDs. A polling method is used to obtain the program data corresponding to each of the PIDs. A filter window is applied to scan the PIDs for polling the program data corresponding to each of a group of the PIDs at once. After that, the filter window is shifted to a next group of the PIDs for polling the program data with respect to each of the PIDs, and an electronic program guide is accordingly formed.
    Type: Grant
    Filed: July 14, 2021
    Date of Patent: February 20, 2024
    Assignee: REALTEK SEMICONDUCTOR CORP.
    Inventor: Jun-Hong Chen
  • Patent number: 11910490
    Abstract: A multi-member Bluetooth device for communicating data with a remote Bluetooth device is disclosed including: a main Bluetooth circuit and an auxiliary Bluetooth circuit. In the period during which the auxiliary Bluetooth circuit operates at a relay mode, the main Bluetooth circuit receives packets transmitted from the remote Bluetooth device and forwards the received packets to the auxiliary Bluetooth circuit; the auxiliary Bluetooth circuit does not sniff packets issued from the remote Bluetooth device, but will switch to a sniffing mode if a signal reception quality indicator of the auxiliary Bluetooth circuit is superior to a predetermined indicator value. In the period during which the auxiliary Bluetooth circuit operates at the sniffing mode, the auxiliary Bluetooth circuit sniffs packets issued from the remote Bluetooth device and the main Bluetooth circuit receives packets transmitted from the remote Bluetooth device.
    Type: Grant
    Filed: July 21, 2022
    Date of Patent: February 20, 2024
    Assignee: Realtek Semiconductor Corp.
    Inventors: Yi-Cheng Chen, Kuan-Chung Huang, Chia Chun Hung, Hou Wei Lin
  • Patent number: 11901885
    Abstract: A PWM-based (pulse width modulation-based) overcurrent protection circuit and an operating method for the same are provided. The PWM-based overcurrent protection circuit includes a pulse-width-modulation circuit that is connected to a charge pump and a load detection circuit of a power-switch circuit. The charge pump outputs a voltage to the power-switch circuit according to a clock-voltage signal. The load detection circuit is used to detect an overcurrent flowing through the power-switch circuit according to a load at an output end of the power-switch circuit. Thus, when the load detection circuit detects the overcurrent, the pulse-width-modulation circuit controls a duty-cycle width of the charge pump, so as to suppress the voltage outputted by the charge pump. Therefore, an output voltage from the power-switch circuit can be corrected for preventing or reducing the overcurrent.
    Type: Grant
    Filed: July 14, 2021
    Date of Patent: February 13, 2024
    Assignee: REALTEK SEMICONDUCTOR CORP.
    Inventor: Li-Cheng Chu
  • Publication number: 20240048734
    Abstract: An image processing method includes receiving an image frame, retrieving luminance information and chrominance information from the image frame, respectively, encoding the luminance information to generate an encoded luminance frame, encoding the chrominance information to generate an encoded chrominance frame, writing the encoded luminance frame to a first memory portion of a memory, and writing the encoded chrominance frame to a second memory portion of the memory. The image processing method further includes reading the encoded luminance frame from the first memory portion and decoding the encoded luminance frame to generate decoded luminance information, and reading the encoded chrominance frame from the second memory portion and decoding the encoded chrominance frame to generate decoded chrominance information.
    Type: Application
    Filed: April 17, 2023
    Publication date: February 8, 2024
    Applicant: Realtek Semiconductor Corp.
    Inventors: Po-Hsien Wu, Yi-Chen Tseng
  • Publication number: 20240046949
    Abstract: An audio real-time processing system, an audio real-time processing program product and method for training speech analysis model are provided. The speech analysis model is firstly trained to obtain, from an original audio, mask information which is used to mask the original audio to get a target audio. The system obtains a plurality of analyzed audio according to the target audio and the original audio, obtains repeated audio section according to the plurality of the analyzed and output the repeated audio section.
    Type: Application
    Filed: October 24, 2022
    Publication date: February 8, 2024
    Applicant: REALTEK SEMICONDUCTOR CORP.
    Inventor: Yen-Hsun CHU
  • Publication number: 20240048740
    Abstract: An image processing device includes an image encoder, a memory and an image decoder. The image encoder receives an input image frame, retrieves luminance information and chrominance information from the input image frame, respectively, encodes the luminance information to generate an encoded luminance frame, and encodes the chrominance information to generate an encoded chrominance frame. The memory includes a first memory portion, a second memory portion and a third memory portion. The first memory portion stores the encoded luminance frame, and the second memory portion or the third memory portion stores the encoded chrominance frame. The image decoder reads the encoded luminance frame from the first memory portion to perform decoding, and reads the encoded chrominance frame from the second memory portion or the third memory portion for decoding.
    Type: Application
    Filed: April 17, 2023
    Publication date: February 8, 2024
    Applicant: Realtek Semiconductor Corp.
    Inventors: Yi-Chen Tseng, Po-Hsien Wu
  • Publication number: 20240046926
    Abstract: A television includes a remote control, a receiving element, a speaker, a speech analysis model, and a processor. The processor analyzes video sound to get a repeated audio section after receiving a volume adjustment command from the remote control. Then, the speaker outputs the repeated audio. So that, according to user needs, the television adjusts the video sound before outputting.
    Type: Application
    Filed: October 24, 2022
    Publication date: February 8, 2024
    Applicant: REALTEK SEMICONDUCTOR CORP.
    Inventor: Yen-Hsun Chu
  • Publication number: 20240046852
    Abstract: An image processing method and a display device are provided. The image processing method is suitable for the display device. The display device includes an image processor and a panel module. The image processing method includes: when the image processor receives a notification signal from a source to switch the display format, the image processor stores a current image frame in a memory. The image processor provides the current image frame to the panel module, so that the panel module displays the current image frame. The image processor is re-handshaking with the source and the panel module to receive a new image frame provided by the source, and the image processor transmits the new image frame to the panel module, so that the panel module displays the new image frame.
    Type: Application
    Filed: August 1, 2023
    Publication date: February 8, 2024
    Applicant: REALTEK SEMICONDUCTOR CORP.
    Inventors: Yuh-Wey Lin, Chun-Hao Huang
  • Patent number: 11892871
    Abstract: A host circuit includes a first clock generator, a first input output interface, a first communication interface, and a first processor. The first clock generator generates a first clock signal. The first processor outputs a trigger signal through the first input output interface, records a first clock count of the first clock generator at the same time, and outputs the first clock count through the first communication interface. A slave circuit includes a second clock generator, a second input output interface, a second communication interface, and a second processor. The second clock generator generates a second clock signal. When receiving the trigger signal, the second processor records a second clock count of the second clock generator, and calculates a time difference between the first clock signal and the second clock signal according to the first clock count and the second clock count.
    Type: Grant
    Filed: March 2, 2022
    Date of Patent: February 6, 2024
    Assignee: Realtek Semiconductor Corp.
    Inventors: Po-Lin Wei, Ching-Lung Chen
  • Patent number: 11895043
    Abstract: The present invention provides a method for accessing a system memory, wherein the method includes the steps of: reading a descriptor from the system memory, where the descriptor includes a buffer start address field and a buffer size field, wherein the buffer start address field includes a start address of a buffer in the system memory, and the buffer size field indicates a size of the buffer; receiving multiple packets, and writing the multiple packets in to the buffer; modifying the descriptor according to the multiple packets stored in the buffer to generate a modified descriptor, wherein the modified descriptor only comprises information of part of the multiple packets or does not comprise information of any one of the multiple packets; and writing the modified descriptor into the system memory.
    Type: Grant
    Filed: November 25, 2022
    Date of Patent: February 6, 2024
    Assignee: Realtek Semiconductor Corp.
    Inventor: Chia-Hung Lin
  • Patent number: 11892508
    Abstract: A joint test action group transmission system includes a host terminal and a slave terminal. The slave terminal includes a test access port (TAP) circuit, an internal memory, and a memory interface controller. The TAP circuit includes a test data register set. The memory interface controller stores the data received from the TAP circuit to the internal memory. The host terminal transmits a set of download instruction bits to the TAP circuit to have the TAP circuit select the test data register set, and have the TAP circuit enter a data shift status to receive a data package through the test data register set. During the process of receiving the data package, the TAP circuit remains in the data shift status to receive the address and at least one piece of data stored in the data package continuously.
    Type: Grant
    Filed: November 10, 2020
    Date of Patent: February 6, 2024
    Assignee: Realtek Semiconductor Corp.
    Inventors: Chen-Tung Lin, Yuefeng Chen
  • Publication number: 20240037993
    Abstract: A video processing method for performing partial highlighting with the aid of hand gesture detection and an associated SoC are provided. The SoC includes a person recognition circuit, a hand gesture detection circuit, a sound detection circuit and a processing circuit. The person recognition circuit obtains image data from an image capturing device, and performs person recognition on the image data to generate a recognition result. The hand gesture detection circuit performs hand gesture detection on hand gesture image data to generate a hand gesture detection result. The sound detection circuit receives multiple sound signals from multiple microphones, and determines a voice characteristic value of a main sound. The processing circuit determines a specific region in the image data according to the recognition result, the hand gesture detection result, and the voice characteristic value, and processes the image data to highlight the specific region.
    Type: Application
    Filed: July 25, 2023
    Publication date: February 1, 2024
    Applicant: Realtek Semiconductor Corp.
    Inventor: Chia-Chun Cheng
  • Publication number: 20240040070
    Abstract: A system on chip (SoC) for performing partial highlighting with the aid of auxiliary information detection includes a person recognition circuit, a sound detection circuit, an auxiliary information detection circuit and a processing circuit. The person recognition circuit obtains image data from an image capturing device, and performs person recognition on the image data to generate a recognition result. The sound detection circuit receives a plurality of sound signals from a plurality of microphones, and determines a voice characteristic value of a main sound. The auxiliary information detection circuit generates auxiliary information for calibrating the voice characteristic value of the main sound. The processing circuit determines a specific region in the image data according to the recognition result, the auxiliary information, and the voice characteristic value, and processes the image data to highlight the specific region.
    Type: Application
    Filed: July 14, 2023
    Publication date: February 1, 2024
    Applicant: Realtek Semiconductor Corp.
    Inventor: Chia-Chun Cheng
  • Patent number: 11887520
    Abstract: The present invention provides a chipset for FRC, wherein the chipset includes a first FRC chip and a second FRC chip. The first FRC chip is configured to receive a first part of input image data, and perform a motion compensation on the first part of the input image data to generate a first part of an output image data, wherein a frame rate of the output image data is greater than or equal to a frame rate of the input image data. The second FRC chip is configured to receive a second part of the input image data, and perform the motion compensation on the second part of the input image data to generate a second part of the output image data; wherein the first part and the second part of the output image data are combined into the complete output image data for displaying on a display panel.
    Type: Grant
    Filed: May 9, 2022
    Date of Patent: January 30, 2024
    Assignee: Realtek Semiconductor Corp.
    Inventors: Tien-Hung Lin, Chia-Wei Yu
  • Patent number: 11888487
    Abstract: A phase interpolation device and a multi-phase clock generation device are provided. The phase interpolation device includes a digital controller circuit and a phase interpolator that includes a capacitor and circuit branches, which are controlled by the digital controller circuit to generate an n-th phase clock of N phase clocks between first and second input clocks. When the n-th phase clock is generated, the digital controller circuit controls, in response to appearances of rising edges of the first input clock, the circuit branches to charge the capacitor using (N?n+1)×M ones of the first current source, and controls, in response to appearances of rising edges of the second input clock, the circuit branches to use N×M ones of the first current source to charge the capacitor. N, M, n are integers.
    Type: Grant
    Filed: November 30, 2022
    Date of Patent: January 30, 2024
    Assignee: REALTEK SEMICONDUCTOR CORP.
    Inventors: Tsung-Han Tsai, Peng-Fei Lin, Kuo-Wei Chi
  • Publication number: 20240030924
    Abstract: A signal generating circuit and a signal generating method are provided. The signal generating circuit includes a first synchronization circuit configured to synchronize a beacon signal and a first signal edge of a clock signal to generate a first synchronization signal; a frequency dividing circuit configured to receive the clock signal and perform frequency division operation on the clock signal to generate a frequency division signal, wherein the duty cycle of the frequency division signal is 50%; a second synchronization circuit configured to receive the first synchronization signal and the frequency division signal and synchronize the first synchronization signal and a second signal edge of frequency division signal to generate a second synchronization signal; and a synthesis circuit configured to receive the second synchronization signal and the frequency division signal and perform AND operation on the second synchronization signal and the frequency division signal to output full-cycle signals.
    Type: Application
    Filed: July 24, 2023
    Publication date: January 25, 2024
    Applicant: REALTEK SEMICONDUCTOR CORP.
    Inventor: Chih-Yuan Yeh
  • Publication number: 20240031635
    Abstract: An audio-visual managing system, applied to at least one data receiving circuit which receives audio-visual data and outputs processed audio-visual data, each of the data receiving circuit comprising a tuner or a demodulator, the audio-visual managing system comprising: a plurality of transmitting circuits, configured to stream the processed audio-visual data; wherein the processed audio-visual data output by a first data receiving circuit of the data receiving circuit can be used by a first transmitting circuit and a second transmitting circuit of the transmitting circuits simultaneously, when the first transmitting circuit and the second transmitting circuit receive the processed audio-visual data output by the first data receiving circuit.
    Type: Application
    Filed: July 24, 2023
    Publication date: January 25, 2024
    Applicant: Realtek Semiconductor Corp.
    Inventor: Chien-Chang Chen