Abstract: A method for calibrating a data reception window includes: (A) setting a level of a reference voltage by different predetermined values and repeatedly sampling a data signal to obtain multiple first valid data reception windows; (B) establishing a first eye diagram based on the first valid data reception windows; (C) resetting the level of the reference voltage by the predetermined values combined with a first offset and repeatedly sampling the data signal according to the reference voltage to obtain multiple second valid data reception windows and (D) selectively updating the first eye diagram according to the second valid data reception windows. When width of a second valid data reception window is greater than width of a first valid data reception window corresponding to the same predetermined value, the first valid data reception window in the first eye diagram is replaced by the second valid data reception window.

Abstract: A multi-member Bluetooth device for communicating data with a source Bluetooth device acting as a master in a first piconet. The multi-member Bluetooth device includes a main Bluetooth circuit acting as a slave in the first piconet and as a master in a second piconet, and an auxiliary Bluetooth circuit acting as a slave in the second piconet. The main Bluetooth circuit generates a first slave clock and a second main clock according to a first main clock generated by the source Bluetooth device, with which both the first slave clock and the second main clock are synchronized. The auxiliary Bluetooth circuit generates a second slave clock and a third slave clock according to the second main clock, with which both the second slave clock and the third slave clock are synchronized. The auxiliary Bluetooth circuit sniffs Bluetooth packets transmitted through the first piconet from the source Bluetooth device.

Abstract: A loop filter utilized in an encoder includes a constrained directional enhancement filter and a decision circuit. The constrained directional enhancement filter is arranged to process multiple frames, wherein for a first frame in the multiple frames, the constrained directional enhancement filter determines a best filter strength of each block in the first frame in a first filter strength list, and determines a second filter strength list according to content of the first frame. The decision circuit is coupled to the constrained directional enhancement filter, and is arranged to record which index in the first filter strength list is the best filter strength corresponding to each block in the first frame, and provide the first filter strength list and the index corresponding to each block to an encoding circuit of the encoder as an output of the encoder.

Abstract: The present invention provides a transceiver circuit including receiver circuit, wherein the receiver circuit includes a first mixer, a second mixer, a complex filter, a switch module and an ADC. The first mixer is configured to mix an input signal with a first oscillation signal to generate a first mixed signal. The second mixer is configured to mix the input signal with a second oscillation signal to generate a second mixed signal. The complex filter is configured to generate a first intermediate frequency signal and a second intermediate frequency signal according to the first mixed signal and the second mixed signal. The switch module is configured to select one of the first intermediate frequency signal and the second intermediate frequency signal to serve as an output intermediate frequency signal. The ADC is configured to perform an analog-to-digital conversion operation on the output intermediate frequency signal to generate a digital signal.

Abstract: The invention provides an electronic device and a flow control method thereof, wherein the electronic device can transmit a specific pause frame to another electronic device, or receive a specific pause frame from the other electronic device. The specific pause frame includes a local port flow control ability and a remote port congestion status for the electronic device to perform the most appropriate processing of each received packet, or to selectively transmit a pause frame to external devices to improve the efficiency of the network system.

Abstract: A method and a system for processing a data flow with an incomplete comparison process are provided. The method is implemented by a network device that includes a flow table and a flow filter in a memory thereof. A flow analyzing module is provided for analyzing and classifying packets of an input flow, and identifying an application category to which the input flow belongs. The flow table is queried according to a result of resolving the input flow for determining whether the input flow matches any flow entry of the flow table. The flow filter is queried if the input flow fails to match any flow entry of the flow table for determining whether features of the input flow match conditions of the flow filter. The input flow is processed accordingly, without needing to copy all flows that do not match the flow entries to the flow table.

Abstract: A method for calibrating one or more compensation values utilized by a compensation device of a transmitter includes: obtaining a plurality of output signals which were sequentially generated by the transmitter by processing a pair of input signals according to multiple pairs of compensation values as a plurality of feedback signals, where each feedback signal corresponds to one of the multiple pairs of compensation values, determining a plurality of coefficients of a cost function according to the multiple pairs of compensation values and the feedback signals in an operation of calibration; and determining a pair of calibrated compensation values according to the coefficients and providing the pair of calibrated compensation values to the compensation device.

Abstract: An all-digital phase-locked loop (ADPLL) circuit and a calibration method thereof are provided. The ADPLL circuit includes a digitally controlled oscillator (DCO) circuit, a phase detector circuit, and a calibration circuit coupled between the DCO circuit and the phase detector circuit. The DCO circuit generates a clock signal according to a frequency control signal. The phase detector circuit generates a phase error value according to a reference signal and the clock signal. More particularly, after the ADPLL circuit performs a locking operation for a period of time, the frequency control signal is tied at a locked value which is obtained when the ADPLL circuit performs the locking operation, and the calibration circuit may modify a current of at least one current source within the DCO circuit according to the phase error value.

Abstract: The present invention provides a frame transmission method of an electronic device, wherein the frame transmission method includes the steps of: receiving a pause frame from another electronic device, wherein the pause frame includes a plurality of inter frame gap control indicator, and each of the inter frame gap control indicator includes a plurality of packet size ranges and corresponding pause times; selecting one of the inter frame gap control indicator according to a priority of a first packet to be sent to the other electronic device, and determining a first inter frame gap according to which packet size range the first packet belongs to; and after a first frame including the first packet is sent to the other electronic device, at least waiting for the first inter frame gap before starting to send a second frame to the other electronic device.

Abstract: A method used in a stacking/stackable switch unit includes: providing a plurality of signal ports of the stacking/stackable switch unit, the signal ports having at least one master/slave control port corresponding to at least one operation function of the stacking/stackable switch unit; during a boot-up procedure, automatically determining whether the stacking/stackable switch unit is a master or a slave according to at least one signal level of the at least one master/slave control port and/or content of at least one bit obtained from the at least one master/slave control port.

Abstract: A method for dynamically resizing an instruction memory and a data memory in a system includes: defining, by a memory control circuit, a plurality of memory selection modes; selecting a memory selection mode from the plurality of memory selection modes, and writing the memory selection mode into a firmware control register; and redistributing, by the memory control circuit, a plurality of memory cells in the instruction memory and a plurality of memory cells in the data memory according to the memory selection mode stored in the firmware control register.

Abstract: A signal processing method for processing a signal received by a receiver device includes: performing a first correlation calculation on the received signal to obtain a first calculation result; performing carrier frequency offset estimation and compensation on the received signal to obtain a first compensated signal; performing a second correlation calculation on the first compensated signal to obtain a second calculation result; performing carrier frequency offset compensation on the first compensated signal to obtain a second compensated signal; determining whether at least one phase of the second compensated signal is correct; and determining whether at least one decoding result of the second compensated signal is correct. The received signal is determined not a signal conforming to a predetermined standard when the at least one phase of the second compensated signal or the at least one decoding result of the second compensated signal is determined incorrect.

Abstract: A multi-member Bluetooth device for communicating data with a source Bluetooth device, wherein the source Bluetooth device acts as a master in a first piconet. The multi-member Bluetooth device includes a main Bluetooth circuit and an auxiliary Bluetooth circuit. The main Bluetooth circuit acts as a slave in the first piconet, and acts as a master in a second piconet. The auxiliary Bluetooth circuit acts as a slave in the second piconet. The main Bluetooth circuit generates a first slave clock and a second main clock synchronized with a first main clock generated by the source Bluetooth device, and samples a first audio data to be playback. The auxiliary Bluetooth circuit generates a second slave clock and a third slave clock synchronized with the second main clock, and samples a second audio data to be playback.

Abstract: A prediction circuit in an encoder utilizes a specific partition mode to process a super block for generating a plurality of reconstructed pixel values for each block in the super block, and the reconstructed pixel values of each block are directly utilized as reference pixels for other blocks to perform intra-frame prediction, so as to improve the efficiency of the encoder.

Abstract: An electronic device having a universal serial bus (USB) power delivery function includes a connector, an electrostatic discharge (ESD) protection circuit, a power reception notification circuit, and a control circuit. The connector is coupled to a USB host. The connector includes a configuration channel (CC) pin. The power reception notification circuit is configured to turn on, in response to an enable signal, a pull-down path of a pull-down circuit of the ESD protection circuit. The configuration channel pin generates a pull-down voltage through the pull-down path of the pull-down circuit when the pull-down path is turned on. The control circuit is configured to send the enable signal to the power reception notification circuit when a trigger signal that meets a power reception condition is detected. The control circuit controls the connector to draw power from the USB host when the pull-down voltage of the connector is greater than a pull-down threshold.

Abstract: A wireless communication device includes a processor, a baseband signal processing circuit and a wireless transceiver circuit. The processor determines a transmission need, determines a transmission rate according to the transmission need and a channel condition, and provides data and information regarding the transmission rate to the baseband signal processing circuit. The information regarding the transmission rate includes at least one of a selected transmission standard, a selected physical layer data transmission rate and a selected modulation and coding scheme. The baseband signal processing circuit is coupled to the processor and processes the data according to the information regarding the transmission rate to accordingly generate a packet. The wireless transceiver circuit is coupled to the baseband signal processing circuit and transmits the packet.

Abstract: A bus interconnection system and a method for detecting bad routing by the same are provided. The bus interconnection system includes a master node, destination nodes, and a first order switch node. The destination nodes include slave nodes, the bus interconnection system assigns an identification symbol to each of the destination nodes, and adds a destination identification symbol to data sent to the slave nodes by the master node through the first order switch node. When the first order switch node receives the data, the first order switch node updates the destination identification symbol of the data according to a payload of the data, and when one of the destination nodes receives the data, the one of the destination nodes determines whether a bad routing occurs by checking whether the destination identification symbol is equal to the identification symbol assigned to the destination node that receives the data.

Abstract: A method for identifying and pairing a signal transmitting device, including: obtaining a setting value of a master identification key; obtaining a setting value of a slave identification key; determining whether at least one of the setting values equals to an initial value; determining whether the setting value of the master identification key equals to the setting value of the slave identification key when none of the setting values equals to the initial value; and controlling the signal processing device to operate in a limited mode when the setting value of the master identification key and the setting value of the slave identification key are not equal. In the limited mode, a signal processing device does not output any signal to the signal transmitting device or ignores any signal received from a signal transmitting device, or the signal processing device only outputs a limited signal to the signal transmitting device.

Abstract: The present invention provides a processing circuit applied to a face recognition system, which includes a characteristic value calculation module, a determination circuit and a threshold value calculation module.

Abstract: A wireless communication device for a transmission end of a wireless communication system is provided. The wireless communication device includes a wireless analog transmission unit, for transmitting a data packet on a data transmission channel; and a packet generating unit, for generating the data packet and at least one protection packet; wherein before transmitting the data packet on the data transmission channel, the wireless communication device transmits the at least one protection packet on at least one adjacent channel of the data transmission channel to indicate to at least one user of the at least one adjacent channel to stop using the at least one adjacent channel before transmission of the data packet is completed, and at least one frequency band of the at least one adjacent channel overlaps a frequency band of the data transmission channel.