Patents Assigned to RENESAS
  • Patent number: 12278198
    Abstract: A semiconductor device includes a semiconductor package having a differential signal terminal pair, and a wiring board. The wiring board includes a first and a second signal transmission line and a reference potential plane. The first and the second signal transmission line is formed in a first conductive layer and connected to the differential signal terminal pair. The reference potential plane includes a conductive pattern formed in a different conductive layer from the first conductive layer. The conductive pattern includes a first and a second region overlapped with the first and the second signal transmission line in plan view, respectively. The conductive pattern has a plurality of openings in the first and the second region. An area of a first conductive portion of the reference potential plane in the first region becomes equal to an area of a second conductive portion of the reference potential plane in the second region.
    Type: Grant
    Filed: May 12, 2022
    Date of Patent: April 15, 2025
    Assignee: RENESAS ELECTRONICS CORPORATION
    Inventors: Yoshikazu Tanaka, Tadashi Kameyama, Takafumi Betsui
  • Patent number: 12276532
    Abstract: A method and a system may inductively determine a position of a display screen of a computing device. Associated processes may generate a magnetic field by providing an alternating current to a driver coil, and may generate a voltage at a sensor coil in response to the magnetic field. The system and method may additionally include determining a linear position of the display screen by executing an algorithm at a processor. An input to the algorithm may include voltage data associated with the voltage generated at the sensor coil. The linear position of the display screen may correspond to a size of the display screen between a minimum size and a maximum size.
    Type: Grant
    Filed: May 13, 2021
    Date of Patent: April 15, 2025
    Assignee: Renesas Electronics America Inc.
    Inventors: Gustavo James Mehas, Damla Acar, Ashley De Wolfe, Pooja Agrawal, Nicholaus Wayne Smith
  • Patent number: 12278508
    Abstract: A battery charger is described that can support multiple battery applications with a single USB type-C port. An architecture can include a single charger transferring power to multiple battery stacks. The architecture can include a plurality of battery stacks each respectively housed in a distinct electronic device. The architecture is expandable from one charger with one USB type-C port coupled to a plurality of battery stacks, to a plurality of chargers with respective USB type-C ports all coupled to a plurality of battery stacks respectively housed in distinct electronic devices.
    Type: Grant
    Filed: June 15, 2020
    Date of Patent: April 15, 2025
    Assignee: Renesas Electronics America Inc.
    Inventors: Yen-Mo Chen, Sungkeun Lim, Qian Sun
  • Patent number: 12278558
    Abstract: Methods and systems for operating a voltage regulator are described. A integrated circuit can be configured to adjust at least one of a deadtime parameter and a drive strength parameter of a power stage based on at least one of an input voltage being provided to a power stage, a switch node voltage of the power stage, and an output current of the power stage. A controller of the power stage can be further configured to adjust a deadtime of the power stage based on adjustment of the deadtime parameter. The controller can be further configured to adjust a drive strength of the first driver and the second driver based on adjustment of the drive strength parameter.
    Type: Grant
    Filed: October 13, 2022
    Date of Patent: April 15, 2025
    Assignee: Renesas Electronics America Inc.
    Inventors: Chun Cheung, Ankit Sharma, Bo Wang
  • Patent number: 12273132
    Abstract: Methods and systems for operating a transceiver are described. A transceiver can include an upconverting mixer, a downconverting mixer, a controller, and an envelope detector. The upconverting mixer can mix an input signal with a local oscillator (LO) signal to generate a transmitter signal. The envelope detector can receive the transmitter signal outputted from the upconverting mixer and output an envelope of the transmitter signal to an output line of the downconverting mixer. The envelope can indicate at least one of a leaked LO signal and an image signal. The controller can receive a calibration parameter that is based on at least one of the leaked LO signal and image signal and calibrate the upconverting mixer based on the calibration parameter.
    Type: Grant
    Filed: September 28, 2022
    Date of Patent: April 8, 2025
    Assignee: Renesas Electronics America Inc.
    Inventors: Himanshu Khatri, Samet Zihir, Tumay Kanar
  • Patent number: 12272968
    Abstract: A wireless power system is disclosed that allows data to be read and written into a wireless power transmission system of a wireless power transmitter through near-field communications (NFC). A method of exchanging data with a power transmission system in the wireless power transmitter and a graphical user interface coupled to a wireless power receiver in communications with the wireless power transmitter includes communicating a data packet with the power transmission system through a near-field communications (NFC) link between a wireless power receiver and the wireless power transmitter; receiving the data packet in the power transmission system; and performing a task defined by a header command code in the data packet.
    Type: Grant
    Filed: April 10, 2020
    Date of Patent: April 8, 2025
    Assignee: Renesas Electronics America Inc.
    Inventors: Changjae Kim, Detelin Martchovsky, Amit Bavisi, Sophia Yi
  • Patent number: 12272400
    Abstract: A semiconductor device includes a memory array having a plurality of associative memory cells arranged in a matrix form for storing entries. The memory array is divided into a plurality of memory blocks for sequentially performing a retrieval operation along a column direction, and further includes a plurality of match lines corresponding to the respective memory blocks and provided correspondingly to each memory cell row, a plurality of search lines corresponding to the respective memory blocks and provided correspondingly to each memory cell column, and a plurality of match amplifiers corresponding to the respective memory blocks and provided to the plurality of match lines. The match line provided correspondingly to the preceding memory block is set to become shorter than the match line provided correspondingly to the subsequent memory block.
    Type: Grant
    Filed: February 2, 2023
    Date of Patent: April 8, 2025
    Assignee: RENESAS ELECTRONICS CORPORATION
    Inventors: Shinji Tanaka, Yohei Sawada, Masao Morimoto
  • Publication number: 20250112504
    Abstract: A system including a power device and a portable device for wireless powering of a load of the portable device is provided. The power device includes a transmitter stage to generate a carrier signal and an antenna connected to the transmitter stage to emit a magnetic field with a first waveform of the carrier signal. The portable device includes an antenna exposed to the magnetic field of the power device to receive an antenna signal and a receiver stage connected to the antenna to rectify the antenna signal to provide power to the load of the portable device. The power device is built to emit the magnetic field with the first waveform of the carrier signal in a power transfer mode and to emit the magnetic field with a second waveform of the carrier signal in a communication mode.
    Type: Application
    Filed: October 3, 2023
    Publication date: April 3, 2025
    Applicant: Renesas Design Austria GmbH
    Inventors: Jacob REYES, Francesco ANTONETTI
  • Publication number: 20250112663
    Abstract: According to an aspect, a transceiver comprises a transmitter section having a first PLL (phased locked loop) providing a first reference signal to the transmitter section, a receiver section having a second PLL providing a second reference signal to the receiver section, a coupler coupling the second PLL to the transmitter section when the transceiver is operative in a test mode measuring a first noise component introduced by the first PLL. The first reference signal is coupled to the receiver section internally within the transceiver as a local reference signal to the receiver section both in the test mode and a functional mode.
    Type: Application
    Filed: January 21, 2024
    Publication date: April 3, 2025
    Applicants: Renesas Electronics Corporation, Steradian Semiconductors Private Limited
    Inventors: Gireesh Rajendran, Alok Prakash Joshi, Xu Zhishan
  • Patent number: 12264946
    Abstract: A position sensor, wherein the position sensor detects the movement of a target relative to a sine receiver coil and a cosine receiver coil and generates a corresponding sine signal and a corresponding cosine signal, and a method for error detection of a position sensor.
    Type: Grant
    Filed: October 3, 2022
    Date of Patent: April 1, 2025
    Assignee: Renesas Electronics America Inc.
    Inventors: Gentjan Qama, Jürgen Peter Kernhof, Angel Karachomakov, Andreas Leo Buchinger, Thomas Oswald
  • Patent number: 12266727
    Abstract: The source region, drain region, buried insulating film, gate insulating film, and gate electrode of the semiconductor device are formed in a main surface of a semiconductor substrate. The buried insulating film is buried in a first trench formed between the source and drain regions. The first trench has a first side surface and a first bottom surface. The first side surface faces the source region in a first direction extending from one of the source and drain regions to the other. The first bottom surface is connected to the first side surface and is along the main surface of the semiconductor substrate. A crystal plane of a first surface of the semiconductor substrate, which is the first side surface of the first trench, is (111) plane. A crystal plane of a second surface of the semiconductor substrate, which is the bottom surface of the first trench, is (100) plane.
    Type: Grant
    Filed: October 19, 2023
    Date of Patent: April 1, 2025
    Assignee: RENESAS ELECTRONICS CORPORATION
    Inventors: Makoto Koshimizu, Yasutaka Nakashiba
  • Patent number: 12267053
    Abstract: Speed enhancement of data reading is achieved while suppressing an influence of an offset voltage of a differential amplifier.
    Type: Grant
    Filed: October 13, 2022
    Date of Patent: April 1, 2025
    Assignee: RENESAS ELECTRONICS CORPORATION
    Inventors: Koichi Takeda, Takahiro Shimoi, Masaya Nakano, Hidenori Mitani, Yoshinobu Kaneda
  • Publication number: 20250098990
    Abstract: Systems and methods for sensing and processing biosignals are described. An example system can include a first device configured to sense at least one biosignal and a second device. The second device can receive the at least one biosignal from the first device. The second device can receive power via a first wireless interface. The second device can charge a rechargeable battery using the received power. The second device can receive a signal via the first wireless interface, wherein the signal encodes credentials of a user. The second device can demodulate the signal to decode the user credentials. The second device can authenticate the user credentials. The second device can, in response to authentication of the user credentials, communicate the at least one biosignal to a user device via a second wireless interface.
    Type: Application
    Filed: June 27, 2024
    Publication date: March 27, 2025
    Applicant: Renesas Electronics Corporation
    Inventor: Dirk NAURATH
  • Publication number: 20250105646
    Abstract: Systems and methods for operating a battery charger are described. A controller can operate a battery charger under a charging mode to use an adapter power to support a system power of the battery charger. The controller can detect the adapter power reaches a maximum, transition the battery charger into a discharging mode to decrease a battery charging current in the battery charger to support the system power and decrease a system voltage at the output of the battery charger. The controller can detect the system voltage is less than a battery voltage of the battery by an offset and transition the battery charger from the discharging mode to a pass-through mode that continues to discharge the battery, where the PTM can cause the battery charger to discharge the battery without performing switching.
    Type: Application
    Filed: September 25, 2023
    Publication date: March 27, 2025
    Applicant: Renesas Electronics America Inc.
    Inventors: Sungkeun LIM, Yen-Mo CHEN, Chong HAN, Dongwoo HAN
  • Patent number: 12261205
    Abstract: Occurrence of short-channel characteristics and parasitic capacitance of a MOSFET on a SOI substrate is prevented. A sidewall having a stacked structure obtained by sequentially stacking a silicon oxide film and a nitride film is formed on a side wall of a gate electrode on the SOI substrate. Subsequently, after an epitaxial layer is formed beside the gate electrode, and then, the nitride film is removed. Then, an impurity is implanted into an upper surface of the semiconductor substrate with using the gate electrode and the epitaxial layer as a mask, so that a halo region is formed in only a region of the upper surface of the semiconductor substrate which is right below a vicinity of both ends of the gate electrode.
    Type: Grant
    Filed: April 22, 2024
    Date of Patent: March 25, 2025
    Assignee: RENESAS ELECTRONICS CORPORATION
    Inventors: Yoshiki Yamamoto, Hideki Makiyama, Toshiaki Iwamatsu, Takaaki Tsunomura
  • Publication number: 20250093183
    Abstract: A position sensor system having at least two receiver coil sets, at least one transmitter coil and a signal conditioning processor, wherein each receiver coil set of the at least two receiver coil sets includes at least two separate receiver coils including a sine receiver coil and a cosine receiver coil, wherein the signal conditioning processor is included in an integrated circuit, and wherein the at least two receiver coil sets, the at least one transmitter coil and the integrated circuit including the signal conditioning processor are located on a printed circuit board.
    Type: Application
    Filed: November 29, 2024
    Publication date: March 20, 2025
    Applicant: Renesas Electronics America Inc.
    Inventors: Rudolf PICHLER, Josef JANISCH, Thomas OSWALD
  • Publication number: 20250096183
    Abstract: A method includes preparing a substrate; cleaning a chip mounting surface of the substrate; supplying a homogenized die-bonding paste onto the chip mounting surface, and attaching a semiconductor chip on the chip mounting surface via the homogenized die-bonding paste, the semiconductor chip having a front surface, a back surface opposite the front surface, and a first electrode formed on the front surface; curing the homogenized die-bonding paste; electrically connecting the first electrode with a first terminal of the substrate via a first wire; and sealing the semiconductor chip and the first wire with a sealing resin, wherein the homogenized die-bonding paste used in supplying is initially provided as an unstirred die-bonding paste including a plurality of Ag fillers, and wherein, in supplying, the homogenized die-bonding paste is supplied onto the chip mounting surface after the unstirred die-bonding paste along with Ag fillers is stirred for a first predetermined time period.
    Type: Application
    Filed: September 20, 2023
    Publication date: March 20, 2025
    Applicant: RENESAS ELECTRONICS AMERICA INC.
    Inventor: Martin Ashley VAGUES
  • Patent number: 12255483
    Abstract: In an embodiment, a semiconductor device is disclosed that includes a wired input/output, a wireless input/output, and a battery. A wired charging path between the wired input/output and the battery includes a first transistor and a second transistor. A wireless charging path between the wireless input/output and the battery includes a third transistor and the second transistor.
    Type: Grant
    Filed: May 31, 2022
    Date of Patent: March 18, 2025
    Assignee: Renesas Electronics America Inc.
    Inventors: Mihail Jefremow, Amit Bavisi, Jiangjian Huang, Xue Ke, Turev Acar
  • Patent number: 12254896
    Abstract: An audio signal detector comprising: an input adapted to receive a transducer signal; an output to provide an output signal indicative of the presence of a voice component in the transducer signal; and a processor circuit adapted to estimate a noise characteristic of the transducer signal; detect a voice component of the transducer signal; adjust one or more adjustable voice-activity parameters for detecting the voice component, wherein the said one or more adjustable voice-activity parameters are adjusted based on the noise characteristic; and generate the output signal.
    Type: Grant
    Filed: July 19, 2021
    Date of Patent: March 18, 2025
    Assignee: Renesas Design Netherlands B.V.
    Inventors: Gavin Radolan, Yuan Chia Lu, Chih Chuan Chou, Ching-Hua Yeh
  • Patent number: 12253561
    Abstract: According to one embodiment, a semiconductor device includes a first chip and a second chip arranged on a substrate, the first chip outputs first time stamp data and first trace data in which a time stamp value is associated with a first execution result obtained by executing software, the second chip outputs second trace data in which a difference value with a marker is associated with a second execution result obtained by executing the software, the second execution result obtained by the second chip executing the software is associated with a third time stamp value calculated based on a second time stamp value and the difference value in a debugger.
    Type: Grant
    Filed: October 10, 2023
    Date of Patent: March 18, 2025
    Assignee: RENESAS ELECTRONICS CORPORATION
    Inventors: Masahide Matsumoto, Kazunori Ochiai, Tomoyoshi Ujii