Patents Assigned to Semiconductor Energy Laboratory Co., Ltd.
  • Publication number: 20200203345
    Abstract: A first transistor, a second transistor, a capacitor, and first to third conductors are included. The first transistor includes a first gate, a source, and a drain. The second transistor includes a second gate, a third gate over the second gate, first and second low-resistance regions, and an oxide sandwiched between the second gate and the third gate. The capacitor includes a first electrode, a second electrode, and an insulator sandwiched therebetween. The first low-resistance region overlaps with the first gate. The first conductor is electrically connected to the first gate and is connected to a bottom surface of the first low-resistance region. The capacitor overlaps with the first low-resistance region. The second conductor is electrically connected to the drain. The third conductor overlaps with the second conductor and is connected to the second conductor and a side surface of the second low-resistance region.
    Type: Application
    Filed: August 29, 2018
    Publication date: June 25, 2020
    Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.
    Inventors: Takanori MATSUZAKI, Yoshinobu ASAMI, Daisuke MATSUBAYASHI, Tatsuya ONUKI
  • Publication number: 20200203995
    Abstract: The transmission efficiency of a wireless power-feeding system is increased. A power-feeding device to be provided includes a power-feeding coil, a control device, a sensing device, and a moving device, in which the power-feeding coil has a function of generating a magnetic field, the control device is electrically connected to the power-feeding coil and the sensing device and has a function of determining a position of the power-feeding coil and a function of transmitting a position control signal, the moving device has a function of receiving the position control signal and a function of moving the power-feeding coil on the basis of the position control signal, the sensing device includes a first sensing coil and a second sensing coil, the first sensing coil has a function of generating a magnetic field, and the second sensing coil has a function of sensing a change in magnetic flux density.
    Type: Application
    Filed: July 4, 2018
    Publication date: June 25, 2020
    Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.
    Inventor: Takeshi OSADA
  • Publication number: 20200204755
    Abstract: A semiconductor device with an arithmetic processing function is provided. In the semiconductor device, an imaging portion and an arithmetic portion are electrically connected to each other through an analog processing circuit 24. The imaging portion includes a pixel array 21 in which pixels 20 used for imaging and reference pixels 22 used for image processing are arranged in a matrix, and a row decoder 25. The arithmetic portion includes a memory element array 31 in which memory elements 30 and reference memory elements 32 are arranged in a matrix, an analog processing circuit 34, a row decoder 35, and a column decoder 36.
    Type: Application
    Filed: February 27, 2020
    Publication date: June 25, 2020
    Applicant: Semiconductor Energy Laboratory Co., Ltd.
    Inventor: Yoshiyuki Kurokawa
  • Publication number: 20200199135
    Abstract: A novel organic compound is provided. That is, a novel organic compound that is effective in improving the element characteristics and reliability is provided. The organic compound has a benzofuropyrimidine skeleton or a benzothienopyrimidine skeleton and is represented by General Formula (G1). Note that in General Formula (G1), Q represents oxygen or sulfur; a represents a substituted or unsubstituted arylene group having 6 to 13 carbon atoms; n represents an integer of 0 to 4; A1 represents a group including an aryl group or a heteroaryl group and having 6 to 100 carbon atoms; R1 to R4 independently represent any one of hydrogen, a substituted or unsubstituted alkyl group having 1 to 6 carbon atoms, a substituted or unsubstituted cycloalkyl group having 3 to 7 carbon atoms, and a substituted or unsubstituted aryl group having 6 to 13 carbon atoms; and A2 represents a condensed ring.
    Type: Application
    Filed: June 12, 2018
    Publication date: June 25, 2020
    Applicant: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Miki KURIHARA, Tomoka HARA, Hideko YOSHIZUMI, Satomi WATABE, Hiromitsu KIDO, Satoshi SEO
  • Publication number: 20200203394
    Abstract: A liquid crystal display device with high aperture ratio is provided. The liquid crystal display device includes a first conductive layer, a second conductive layer, and a liquid crystal element where a liquid crystal layer is positioned between a third conductive layer and a fourth conductive layer. The first to fourth conductive layers transmit visible light and include a region where the first to fourth conductive layers overlap with each other. The second conductive layer is positioned between the first conductive layer and the third conductive layer. An insulating layer is positioned between the first conductive layer and the second conductive layer. An insulating layer is positioned between the second conductive layer and the third conductive layer. Therefore, two capacitors each including the second conductive layer as an electrode are stacked. The two capacitors transmit light and overlap with the liquid crystal element; thus, aperture ratio can be increased.
    Type: Application
    Filed: March 3, 2020
    Publication date: June 25, 2020
    Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.
    Inventors: Shunpei YAMAZAKI, Hideaki SHISHIDO
  • Patent number: 10693095
    Abstract: A light-emitting element having high emission efficiency which includes a fluorescent material as a light-emitting substance is provided. A light-emitting element includes a pair of electrodes and an EL layer between the pair of electrodes. The EL layer includes a light-emitting layer. The light-emitting layer includes a host material and a guest material. The host material has a difference of more than 0 eV and less than or equal to 0.2 eV between a singlet excitation energy level and a triplet excitation energy level. The guest material is capable of emitting fluorescence. The triplet excitation energy level of the host material is higher than a triplet excitation energy level of the guest material.
    Type: Grant
    Filed: January 19, 2018
    Date of Patent: June 23, 2020
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Satoshi Seo, Nobuharu Ohsawa, Shunsuke Hosoumi, Takahiro Ishisone
  • Patent number: 10693014
    Abstract: A change in electrical characteristics is inhibited and reliability is improved in a semiconductor device using a transistor including an oxide semiconductor. One embodiment of a semiconductor device including a transistor includes a gate electrode, first and second insulating films over the gate electrode, an oxide semiconductor film over the second insulating film, and source and drain electrodes electrically connected to the oxide semiconductor film. A third insulating film is provided over the transistor and a fourth insulating film is provided over the third insulating film. The third insulating film includes oxygen. The fourth insulating film includes nitrogen. The amount of oxygen released from the third insulating film is 1×1019/cm3 or more by thermal desorption spectroscopy, which is estimated as oxygen molecules. The amount of oxygen molecules released from the fourth insulating film is less than 1×1019/cm3.
    Type: Grant
    Filed: February 1, 2017
    Date of Patent: June 23, 2020
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Shunpei Yamazaki, Junichi Koezuka, Masami Jintyou, Daisuke Kurosaki
  • Patent number: 10693012
    Abstract: A semiconductor device with low parasitic capacitance is provided. The semiconductor device includes a first oxide insulator, an oxide semiconductor, a second oxide insulator, a gate insulating layer, a gate electrode layer, source and drain electrode layers and an insulating layer. The oxide semiconductor includes first to fifth regions. The first region overlaps with the source electrode layer. The second region overlaps with the drain electrode layer. The third region overlaps with the gate electrode layer. The fourth region is between the first region and the third region. The fifth region is between the second region and the third region. The fourth region and the fifth region each contain an element N (N is hydrogen, nitrogen, helium, neon, argon, krypton, or xenon). A top surface of the insulating layer is positioned at a lower level than top surfaces of the source and drain electrode layers.
    Type: Grant
    Filed: March 25, 2016
    Date of Patent: June 23, 2020
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventor: Yoshinobu Asami
  • Patent number: 10693085
    Abstract: A light-emitting element with a light-emitting substance comprising an organometallic complex. The organometallic complex having a structure represented by General Formula (G0). In the formula, X represents a substituted or unsubstituted six-membered heteroaromatic ring including two or more nitrogen atoms inclusive of a nitrogen atom that is a coordinating atom. Further, R1 and R2 each represent an alkyl group having 1 to 6 carbon atoms.
    Type: Grant
    Filed: December 8, 2017
    Date of Patent: June 23, 2020
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Hideko Inoue, Tomoya Yamaguchi, Hiromi Seo, Satoshi Seo, Kunihiko Suzuki, Miki Kanamoto
  • Patent number: 10693097
    Abstract: A first display element includes a first pixel electrode that reflects visible light, a liquid crystal layer, and a first common electrode that transmits visible light. A second display element includes a second pixel electrode that transmits visible light, a light-emitting layer, and a second common electrode that reflects visible light. A separation layer that reflects visible light is formed over a formation substrate, an insulating layer is formed over the separation layer, and the second display element is formed over the insulating layer. The formation substrate and a second substrate are bonded to each other. Then, the formation substrate and the separation layer are separated from each other. The exposed separation layer is processed into the first pixel electrode. The liquid crystal layer is positioned between the first common electrode and the first pixel electrode and a first substrate and the second substrate are bonded to each other.
    Type: Grant
    Filed: July 11, 2017
    Date of Patent: June 23, 2020
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Seiji Yasumoto, Masataka Sato, Hiroki Adachi, Toru Takayama, Natsuko Takase
  • Patent number: 10692869
    Abstract: A semiconductor device with a large storage capacity per unit area is provided. The disclosed semiconductor device includes a plurality of gain-cell memory cells each stacked over a substrate. Axes of channel length directions of write transistors of memory cells correspond to each other, and are substantially perpendicular to the top surface of the substrate. The semiconductor device can retain multi-level data. The channel of read transistors is columnar silicon (embedded in a hole penetrating gates of the read transistors). The channel of write transistors is columnar metal oxide (embedded in a hole penetrating the gates of the read transistors and gates, or write word lines, of the write transistors). The columnar silicon faces the gate of the read transistor with an insulating film therebetween. The columnar metal oxide faces the write word line with an insulating film, which is obtained by oxidizing the write word line, therebetween, and is electrically connected to the gate of the read transistor.
    Type: Grant
    Filed: November 8, 2017
    Date of Patent: June 23, 2020
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Yasuhiko Takemura, Yoshiyuki Kurokawa
  • Patent number: 10693013
    Abstract: A minute transistor with low parasitic capacitance, high frequency characteristics, favorable electrical characteristics, stable electrical characteristics, and low off-state current is provided. A semiconductor device includes a semiconductor over a substrate, a source and a drain over the semiconductor, a first insulator over the source and the drain, a second insulator over the semiconductor, a third insulator in contact with a side surface of the first insulator and over the second insulator, and a gate over the third insulator. The semiconductor includes a first region overlapping with the source, a second region overlapping with the drain, and a third region overlapping with the gate. The length between a top surface of the third region of the semiconductor and a bottom surface of the gate is longer than the length between the first region and the third region.
    Type: Grant
    Filed: April 5, 2016
    Date of Patent: June 23, 2020
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Satoshi Toriumi, Takashi Hamada, Tetsunori Maruyama, Yuki Imoto, Yuji Asano, Ryunosuke Honda, Shunpei Yamazaki
  • Patent number: 10692452
    Abstract: A display device with favorable display quality is provided. A display portion where a plurality of pixels is arranged in a matrix is divided into Region A and Region B, i.e., regions on the upstream side and the downstream side of a scanning direction. A signal line for supplying an image signal is provided in each of Region A and Region B. Region A and Region B adjoin each other such that a boundary line showing the boundary between the regions is bent. Bending the boundary line suppresses formation of a stripe in a boundary portion. For example, in a given column, the total number of pixels electrically connected to a signal line in Region A is made different from the total number of pixels electrically connected to a signal line in Region B.
    Type: Grant
    Filed: January 10, 2018
    Date of Patent: June 23, 2020
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Hidetomo Kobayashi, Kei Takahashi, Shunpei Yamazaki
  • Patent number: 10693448
    Abstract: Provided is a semiconductor device that can directly compare two negative potentials. The semiconductor device includes a first to a third transistor and a load and is configured to compare a first negative potential and a second negative potential. The first negative potential and the second negative potential are input to a gate of the first transistor and a gate of the second transistor, respectively. Each drain of the first transistor and the second transistor is electrically connected to the load. The third transistor serves as a current source. The first transistor and the second transistor each include a backgate. A positive potential is input to the backgates.
    Type: Grant
    Filed: March 25, 2019
    Date of Patent: June 23, 2020
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Kiyoshi Kato, Yutaka Shionoiri, Tomoaki Atsumi, Takanori Matsuzaki
  • Patent number: 10693094
    Abstract: To provide a light-emitting element with high emission efficiency and low driving voltage. The light-emitting element includes a guest material and a host material. A HOMO level of the guest material is higher than a HOMO level of the host material. An energy difference between the LUMO level and a HOMO level of the guest material is larger than an energy difference between the LUMO level and a HOMO level of the host material. The guest material has a function of converting triplet excitation energy into light emission. An energy difference between the LUMO level of the host material and the HOMO level of the guest material is larger than or equal to energy of light emission of the guest material.
    Type: Grant
    Filed: September 27, 2016
    Date of Patent: June 23, 2020
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Satoshi Seo, Takeyoshi Watabe, Satomi Mitsumori
  • Patent number: 10693093
    Abstract: Provided is a light-emitting element with high external quantum efficiency and a low drive voltage. The light-emitting element includes a light-emitting layer which contains a phosphorescent compound and a material exhibiting thermally activated delayed fluorescence between a pair of electrodes, wherein a peak of a fluorescence spectrum and/or a peak of a phosphorescence spectrum of the material exhibiting thermally activated delayed fluorescence overlap(s) with a lowest-energy-side absorption band in an absorption spectrum of the phosphorescent compound, and wherein the phosphorescent compound exhibits phosphorescence in the light-emitting layer by voltage application between the pair of electrodes.
    Type: Grant
    Filed: November 13, 2018
    Date of Patent: June 23, 2020
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventor: Satoshi Seo
  • Patent number: 10692891
    Abstract: To provide a display device including a flexible panel that can be handled without seriously damaging a driver circuit or a connecting portion between circuits. The display device includes a bent portion obtained by bending an element substrate. A circuit for driving the display device is provided in the bent portion and a wiring extends from the circuit, whereby the strength of a portion including the circuit for driving the display device is increased and failure of the circuit is reduced. Furthermore, the element substrate is bent in a connecting portion between an external terminal electrode and an external connecting wiring (FPC) so that the element substrate provided with the external terminal electrode fits the external connecting wiring, whereby the strength of the connecting portion is increased.
    Type: Grant
    Filed: September 9, 2019
    Date of Patent: June 23, 2020
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventor: Atsushi Miyaguchi
  • Patent number: 10692961
    Abstract: An object is to provide a display device with a high aperture ratio or a semiconductor device in which the area of an element is large. A channel formation region of a TFT with a multi-gate structure is provided under a wiring that is provided between adjacent pixel electrodes (or electrodes of an element). In addition, a channel width direction of each of a plurality of channel formation regions is parallel to a longitudinal direction of the pixel electrode. In addition, when a channel width is longer than a channel length, the area of the channel formation region can be increased.
    Type: Grant
    Filed: December 18, 2019
    Date of Patent: June 23, 2020
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventor: Mizuki Sato
  • Patent number: 10692894
    Abstract: An object is to control composition and a defect of an oxide semiconductor, another object is to increase a field effect mobility of a thin film transistor and to obtain a sufficient on-off ratio with a reduced off current. A solution is to employ an oxide semiconductor whose composition is represented by InMO3(ZnO)m, where M is one or a plurality of elements selected from Ga, Fe, Ni, Mn, Co, and Al, and m is preferably a non-integer number of greater than 0 and less than 1. The concentration of Zn is lower than the concentrations of In and M. The oxide semiconductor has an amorphous structure. Oxide and nitride layers can be provided to prevent pollution and degradation of the oxide semiconductor.
    Type: Grant
    Filed: October 16, 2018
    Date of Patent: June 23, 2020
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Shunichi Ito, Toshinari Sasaki, Miyuki Hosoba, Junichiro Sakata
  • Patent number: 10692994
    Abstract: To provide a semiconductor device with favorable electrical characteristics. To provide a method for manufacturing a semiconductor device with high productivity. To reduce the temperatures in a manufacturing process of a semiconductor device. An island-like oxide semiconductor layer is formed over a first insulating film; a second insulating film and a first conductive film are formed in this order, covering the oxide semiconductor layer; oxygen is supplied to the second insulating film through the first conductive film; a metal oxide film is formed over the second insulating film in an atmosphere containing oxygen; a first gate electrode is formed by processing the metal oxide film; a third insulating film is formed, covering the first gate electrode and the second insulating film; and first heat treatment is performed. The second insulating film and the third insulating film each include oxide. The highest temperature in the above steps is 340° C. or lower.
    Type: Grant
    Filed: December 19, 2017
    Date of Patent: June 23, 2020
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Yasuharu Hosaka, Takahiro Iguchi, Masami Jintyou, Takashi Hamochi, Junichi Koezuka