Patents Assigned to Semiconductor Energy Laboratory Co., Ltd.
  • Patent number: 11500254
    Abstract: An object is to provide a display device that performs accurate display. A circuit is formed using a transistor that includes an oxide semiconductor and has a low off-state current. A precharge circuit or an inspection circuit is formed in addition to a pixel circuit. The off-state current is low because the oxide semiconductor is used. Thus, it is not likely that a signal or voltage is leaked in the precharge circuit or the inspection circuit to cause defective display. As a result, a display device that performs accurate display can be provided.
    Type: Grant
    Filed: September 29, 2021
    Date of Patent: November 15, 2022
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Hajime Kimura, Atsushi Umezaki
  • Patent number: 11501695
    Abstract: The power consumption of a display device is reduced. The power consumption of a driver circuit in a display device is reduced. A pixel included in the display device includes a display element. The pixel is configured to have a function of retaining a first voltage corresponding to a first input pulse signal and a function of driving the display element with a third voltage obtained by addition of a second voltage corresponding to a second input pulse signal to the first voltage.
    Type: Grant
    Filed: September 3, 2019
    Date of Patent: November 15, 2022
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Shunpei Yamazaki, Kei Takahashi, Susumu Kawashima, Koji Kusunoki, Kazunori Watanabe
  • Patent number: 11501728
    Abstract: A semiconductor device where delay or distortion of a signal output to a gate signal line in a selection period is reduced is provided. The semiconductor device includes a gate signal line, a first and second gate driver circuits which output a selection signal and a non-selection signal to the gate signal line, and pixels electrically connected to the gate signal line and supplied with the two signals. In a period during which the gate signal line is selected, both the first and second gate driver circuits output the selection signal to the gate signal line. In a period during which the gate signal line is not selected, one of the first and second gate driver circuits outputs the non-selection signal to the gate signal line, and the other gate driver circuit outputs neither the selection signal nor the non-selection signal to the gate signal line.
    Type: Grant
    Filed: March 19, 2021
    Date of Patent: November 15, 2022
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Hajime Kimura, Atsushi Umezaki
  • Publication number: 20220359523
    Abstract: A semiconductor device that can be miniaturized or highly integrated is provided. The semiconductor device includes a transistor and a capacitor. The transistor includes a metal oxide and a first conductor that is electrically connected to the metal oxide. The capacitor includes a first insulator which is provided over the metal oxide and which the first conductor penetrates; a second insulator provided over the first insulator and including an opening reaching the first insulator and the first conductor; a second conductor in contact with an inner wall of the opening, the first insulator, and the first conductor; a third insulator provided over the second conductor; and a fourth conductor provided over the third insulator. The first insulator has higher capability of inhibiting the passage of hydrogen than the second insulator.
    Type: Application
    Filed: June 27, 2022
    Publication date: November 10, 2022
    Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.
    Inventors: Yuichi SATO, Ryota HODO, Yuta IIDA, Tomoaki MORIWAKA
  • Publication number: 20220359691
    Abstract: A semiconductor device with favorable electrical characteristics is provided. A semiconductor device with stable electrical characteristics is provided. The semiconductor device includes a first insulating layer, a second insulating layer, a third insulating layer, a fourth insulating layer, a semiconductor layer, and a first conductive layer. The second insulating layer is positioned over the first insulating layer and the island-shaped semiconductor layer is positioned over the second insulating layer. The second insulating layer has an island shape having an end portion outside a region overlapping with the semiconductor layer. The fourth insulating layer covers the second insulating layer, the semiconductor layer, the third insulating layer, and the first conductive layer, is in contact with part of a top surface of the semiconductor layer, and is in contact with the first insulating layer outside the end portion of the second insulating layer.
    Type: Application
    Filed: July 18, 2022
    Publication date: November 10, 2022
    Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.
    Inventors: Shunpei YAMAZAKI, Masami JINTYOU, Takahiro IGUCHI, Yukinori SHIMA, Kenichi OKAZAKI
  • Patent number: 11493816
    Abstract: It is an object to provide a liquid crystal display device which has excellent viewing angle characteristics and higher quality. The present invention has a pixel including a first switch, a second switch, a third switch, a first resistor, a second resistor, a first liquid crystal element, and a second liquid crystal element. A pixel electrode of the first liquid crystal element is electrically connected to a signal line through the first switch. The pixel electrode of the first liquid crystal element is electrically connected to a pixel electrode of the second liquid crystal element through the second switch and the first resistor. The pixel electrode of the second liquid crystal element is electrically connected to a Cs line through the third switch and the second resistor. A common electrode of the first liquid crystal element is electrically connected to a common electrode of the second liquid crystal element.
    Type: Grant
    Filed: April 22, 2021
    Date of Patent: November 8, 2022
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventor: Hajime Kimura
  • Patent number: 11495690
    Abstract: A semiconductor device having high on-state current and high reliability is provided. The semiconductor device includes, a first insulator; a first oxide over the first insulator; a second oxide over the first oxide; a first conductor and a second conductor over the second oxide; a third oxide over the second oxide; a second insulator over the third oxide; a third conductor located over the second insulator and overlapping with the third oxide; a third insulator in contact with a top surface of the first insulator, a side surface of the first oxide, a side surface of the second oxide, a side surface of the first conductor, a top surface of the first conductor, a side surface of the second conductor, and a top surface of the second conductor; a fourth insulator over the third insulator; a fifth insulator over the fourth insulator; and a sixth insulator over the third conductor, the second insulator, the third oxide and the fifth insulator.
    Type: Grant
    Filed: February 14, 2019
    Date of Patent: November 8, 2022
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Shunpei Yamazaki, Katsuaki Tochibayashi, Ryota Hodo
  • Patent number: 11493558
    Abstract: A capacity measurement system of a secondary battery that estimates an SOC with high estimation accuracy in a short time at low cost is provided. The capacity measurement system of a secondary battery is an estimation system of a state of charge of a power storage device that includes a unit for acquiring time-series data of a voltage measured value and a current measured value of a first power storage device; a unit for normalizing the time-series data of the voltage measured value; a unit for normalizing the time-series data of the current measured value; a database creation unit for creating a database where an SOC of the first power storage device is linked to superimposed data of time-series data of a time axis corresponding to a vertical axis and time-series data of a time axis corresponding to a horizontal axis; and a neural network unit.
    Type: Grant
    Filed: April 12, 2019
    Date of Patent: November 8, 2022
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Ryota Tajima, Akihiro Chida, Masataka Shiokawa
  • Patent number: 11495626
    Abstract: The number of masks and photolithography processes used in a manufacturing process of a semiconductor device are reduced. A first conductive film is formed over a substrate; a first insulating film is formed over the first conductive film; a semiconductor film is formed over the first insulating film; a semiconductor film including a channel region is formed by etching part of the semiconductor film; a second insulating film is formed over the semiconductor film; a mask is formed over the second insulating film; a first portion of the second insulating film that overlaps the semiconductor film and second portions of the first insulating film and the second insulating film that do not overlap the semiconductor film are removed with the use of the mask; the mask is removed; and a second conductive film electrically connected to the semiconductor film is formed over at least part of the second insulating film.
    Type: Grant
    Filed: April 14, 2021
    Date of Patent: November 8, 2022
    Assignee: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.
    Inventor: Takahiro Kasahara
  • Patent number: 11495691
    Abstract: The semiconductor device includes a first conductor and a second conductor; a first insulator to a third insulator; and a first oxide to a third oxide. The first conductor is disposed to be exposed from a top surface of the first insulator. The first oxide is disposed over the first insulator and the first conductor. A first opening reaching the first conductor is provided in the first oxide. The second oxide is disposed over the first oxide. The second oxide comprises a first region, a second region, and a third region positioned between the first region and the second region. The third oxide is disposed over the second oxide. The second insulator is disposed over the third oxide. The second conductor is disposed over the second insulator. The third insulator is disposed to cover the first region and the second region and to be in contact with the top surface of the first insulator.
    Type: Grant
    Filed: May 27, 2019
    Date of Patent: November 8, 2022
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Toshihiko Takeuchi, Naoto Yamade, Yutaka Okazaki, Sachiaki Tezuka, Shunpei Yamazaki
  • Patent number: 11495601
    Abstract: A semiconductor device that can be miniaturized or highly integrated is provided. The semiconductor device includes a capacitor, an electrode, and an interlayer film. The transistor includes a semiconductor layer, a gate, a source, and a drain; the transistor and the capacitor are placed to be embedded in the interlayer film. Below the semiconductor layer, one of the source and the drain is in contact with the electrode. Above the semiconductor layer, the other of the source and the drain is in contact with one electrode of the capacitor.
    Type: Grant
    Filed: June 17, 2019
    Date of Patent: November 8, 2022
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Shunpei Yamazaki, Takanori Matsuzaki, Ryo Tokumaru, Ryota Hodo
  • Patent number: 11495853
    Abstract: A secondary battery with an exterior body having a novel sealing structure, and a structure of a sealing portion that relaxes a stress of deformation are provided. The secondary battery includes a positive electrode, a negative electrode, an electrolyte solution, and an exterior body enclosing at least part of the positive electrode, at least part of the negative electrode, and the electrolyte solution. The exterior body includes a first region having a shape with a curve, a shape with a wavy line, a shape with an arc, or a shape with a plurality of inflection points, and a second region having the same shape as the first region. The first region is in contact with the second region. Alternatively, the first region has a shape without a straight line. The secondary battery may be flexible, and the exterior body in a region having flexibility may include the first region.
    Type: Grant
    Filed: March 9, 2020
    Date of Patent: November 8, 2022
    Assignee: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.
    Inventors: Minoru Takahashi, Ryota Tajima
  • Patent number: 11493808
    Abstract: A display device in which parasitic capacitance between wirings can be reduced is provided. Furthermore, a display device in which display quality is improved is provided. Furthermore, a display device in which power consumption can be reduced is provided. The display device includes a signal line, a scan line, a first electrode, a second electrode, a third electrode, a first pixel electrode, a second pixel electrode, and a semiconductor film.
    Type: Grant
    Filed: May 21, 2021
    Date of Patent: November 8, 2022
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Hiroyuki Miyake, Makoto Kaneyasu
  • Patent number: 11495753
    Abstract: A novel organic compound is provided. That is, a novel organic compound that is effective in improving reliability of a light-emitting element is provided. The organic compound includes a condensed ring including a pyrimidine ring and is represented by General Formula (G1). In General Formula (G1), A represents a group having 6 to 100 carbon atoms and includes at least one of an aromatic ring and a heteroaromatic ring. The aromatic ring and the heteroaromatic ring may each include a substituent. Furthermore, Q represents oxygen or sulfur. A ring X represents a substituted or unsubstituted naphthalene ring or a substituted or unsubstituted phenanthrene ring.
    Type: Grant
    Filed: March 7, 2018
    Date of Patent: November 8, 2022
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Miki Kurihara, Hideko Yoshizumi, Satomi Watabe, Hiromitsu Kido, Satoshi Seo
  • Patent number: 11495763
    Abstract: Provided is a light-emitting element with high external quantum efficiency and a low drive voltage. The light-emitting element includes a light-emitting layer which contains a phosphorescent compound and a material exhibiting thermally activated delayed fluorescence between a pair of electrodes, wherein a peak of a fluorescence spectrum and/or a peak of a phosphorescence spectrum of the material exhibiting thermally activated delayed fluorescence overlap(s) with a lowest-energy-side absorption band in an absorption spectrum of the phosphorescent compound, and wherein the phosphorescent compound exhibits phosphorescence in the light-emitting layer by voltage application between the pair of electrodes.
    Type: Grant
    Filed: May 21, 2020
    Date of Patent: November 8, 2022
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventor: Satoshi Seo
  • Patent number: 11495826
    Abstract: To provide a graphene compound having an insulating property and an affinity for lithium ions. To increase the molecular weight of a substituent included in a graphene compound. To provide a graphene compound including a chain group containing an ether bond or an ester bond. To provide a graphene compound including a substituent containing one or more branches. To provide a graphene compound including a substituent including at least one of an ester bond and an amide bond.
    Type: Grant
    Filed: May 22, 2020
    Date of Patent: November 8, 2022
    Assignee: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.
    Inventor: Masaki Yamakaji
  • Publication number: 20220352279
    Abstract: A display device with less display unevenness is provided. The display device includes a first layer and a second layer over the first layer; the first layer includes first circuits arranged in m rows and n columns; the second layer includes pixel blocks arranged in the m rows and the n columns; the pixel blocks each comprise pixels arranged in a rows and b columns; the pixel block includes a first wiring and a second wiring electrically connected to the pixel; the first wiring and the second wiring included in the pixel block in the i-th row and the j-th column are each electrically connected to the first circuit in the i-th row and the j-th column; the first wiring has a function of supplying an input signal from the first circuit to the pixel; and the second wiring has a function of supplying an output signal from the pixel to the first circuit.
    Type: Application
    Filed: June 15, 2020
    Publication date: November 3, 2022
    Applicant: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Hidetomo Kobayashi, Takayuki IKEDA
  • Publication number: 20220352378
    Abstract: A semiconductor device that can be highly integrated is provided. The semiconductor device includes first and second transistors and first and second capacitors. Each of the first and second transistors includes a gate insulator and a gate electrode over an oxide. Each of the first and second capacitors includes a conductor, a dielectric over the conductor, and the oxide. The first and second transistors are provided between the first capacitor and the second capacitor. One of a source and a drain of the first transistor is also used as one of a source and a drain of the second transistor. The other of the source and the drain of the first transistor is also used as one electrode of the first capacitor. The other of the source and the drain of the second transistor is also used as one electrode of the second capacitor. The channel lengths of the first and second transistors are larger than the lengths in a direction parallel to short sides of fourth and fifth conductors.
    Type: Application
    Filed: March 30, 2022
    Publication date: November 3, 2022
    Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.
    Inventors: Yuta ENDO, Hideomi SUZAWA
  • Patent number: 11488528
    Abstract: To provide a display device capable of displaying a plurality of images by superimposition using a plurality of memory circuits provided in a pixel. A plurality of memory circuits are provided in a pixel, and signals corresponding to images for superimposition are retained in each of the plurality of memory circuits. In the pixel, the signals corresponding to the images for superimposition are added to each of the plurality of memory circuits. The signals are added to the signals retained in the memory circuits by capacitive coupling. A display element can display an image corresponding to a signal in which a signal written to a pixel through a wiring is added to the signals retained in the plurality of memory circuits. Reduction in the amount of arithmetic processing for displaying images by superimposition can be achieved.
    Type: Grant
    Filed: October 30, 2018
    Date of Patent: November 1, 2022
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Susumu Kawashima, Koji Kusunoki, Kei Takahashi, Shunpei Yamazaki
  • Patent number: 11487144
    Abstract: A novel input/output device that is highly convenient or reliable is provided. The input/output device includes a display portion and an input portion, and the display portion includes a liquid crystal element. The liquid crystal element includes a first electrode, a second electrode, a layer containing a liquid crystal material, a first alignment film, and a second alignment film, and the second electrode is provided such that an electric field is applied to the layer containing a liquid crystal material between the first electrode and the second electrode. The layer containing a liquid crystal material scatters incident light with first scattering intensity when the electric field is in a first state, the layer containing a liquid crystal material scatters the incident light with second scattering intensity when the electric field is in a second state, which is higher than that in the first state, and the second scattering intensity is 10 or more times as high as the first scattering intensity.
    Type: Grant
    Filed: July 30, 2019
    Date of Patent: November 1, 2022
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Shunpei Yamazaki, Koji Kusunoki, Tetsuji Ishitani