Patents Assigned to Semiconductor Energy Laboratory Co., Ltd.
  • Patent number: 11960185
    Abstract: Display data of pixels is updated at different timings. A scan line is connected to a first pixel and a second pixel, a first wiring is connected to the first pixel, and a second wiring is connected to the second pixel. In a first period, a signal for selecting the first pixel and the second pixel is supplied to the scan line. Setting data for setting a state where the display data of the first pixel is updated is supplied to the first wiring, and setting data for setting a state where the display data of the second pixel is updated is supplied to the second wiring. In a second period, a signal for selecting the first pixel and the second pixel is supplied to the scan line. Setting data for setting a state where the display data of the first pixel is not updated is supplied to the first wiring, and the setting data for setting the state where the display data of the second pixel is updated is supplied to the second wiring.
    Type: Grant
    Filed: March 19, 2019
    Date of Patent: April 16, 2024
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Shunpei Yamazaki, Kouhei Toyotaka, Satoshi Yoshimoto, Kazunori Watanabe, Susumu Kawashima, Kei Takahashi
  • Patent number: 11963374
    Abstract: An object is to provide a semiconductor device with a novel structure. The semiconductor device includes a first wiring; a second wiring; a third wiring; a fourth wiring; a first transistor having a first gate electrode, a first source electrode, and a first drain electrode; and a second transistor having a second gate electrode, a second source electrode, and a second drain electrode. The first transistor is provided in a substrate including a semiconductor material. The second transistor includes an oxide semiconductor layer.
    Type: Grant
    Filed: January 24, 2022
    Date of Patent: April 16, 2024
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Shunpei Yamazaki, Jun Koyama, Kiyoshi Kato
  • Patent number: 11961842
    Abstract: An oxide semiconductor layer which is intrinsic or substantially intrinsic and includes a crystalline region in a surface portion of the oxide semiconductor layer is used for the transistors. An intrinsic or substantially intrinsic semiconductor from which an impurity which is to be an electron donor (donor) is removed from an oxide semiconductor and which has a larger energy gap than a silicon semiconductor is used. Electrical characteristics of the transistors can be controlled by controlling the potential of a pair of conductive films which are provided on opposite sides from each other with respect to the oxide semiconductor layer, each with an insulating film arranged therebetween, so that the position of a channel formed in the oxide semiconductor layer is determined.
    Type: Grant
    Filed: July 21, 2023
    Date of Patent: April 16, 2024
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Shunpei Yamazaki, Jun Koyama, Hiroyuki Miyake
  • Patent number: 11961894
    Abstract: A semiconductor device includes a semiconductor layer over a substrate; a gate insulating film covering the semiconductor layer; a gate wiring including a gate electrode, which is provided over the gate insulating film and is formed by stacking a first conductive layer and a second conductive layer; an insulating film covering the semiconductor layer and the gate wiring including the gate electrode; and a source wiring including a source electrode, which is provided over the insulating film, is electrically connected to the semiconductor layer, and is formed by stacking a third conductive layer and a fourth conductive layer. The gate electrode is formed using the first conductive layer. The gate wiring is formed using the first conductive layer and the second conductive layer. The source electrode is formed using the third conductive layer. The source wiring is formed using the third conductive layer and the fourth conductive layer.
    Type: Grant
    Filed: December 23, 2021
    Date of Patent: April 16, 2024
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventor: Hajime Kimura
  • Patent number: 11961916
    Abstract: A novel memory device is provided. The memory device includes a plurality of first wirings extending in a first direction, a plurality of memory element groups, and an oxide layer extending along a side surface of the first wiring. Each of the memory element groups includes a plurality of memory elements. Each of the memory elements includes a first transistor and a capacitor. A gate electrode of the first transistor is electrically connected to the first wiring. The oxide layer includes a region in contact with a semiconductor layer of the first transistor. A second transistor is provided between the adjacent memory element groups. A high power supply potential is supplied to one or both of a source electrode and a drain electrode of the second transistor.
    Type: Grant
    Filed: July 29, 2019
    Date of Patent: April 16, 2024
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Tatsuya Onuki, Kiyoshi Kato, Tomoaki Atsumi, Shunpei Yamazaki
  • Patent number: 11963360
    Abstract: A highly integrated semiconductor device is provided. The semiconductor device includes a substrate, a prism-like insulator, a memory cell string including a plurality of transistors connected in series. The prism-like insulator is provided over the substrate. The memory cell string is provided on the side surface of the prism-like insulator. The plurality of transistors each include a gate insulator and a gate electrode. The gate insulator includes a first insulator, a second insulator, and a charge accumulation layer. The charge accumulation layer is positioned between the first insulator and the second insulator.
    Type: Grant
    Filed: April 21, 2021
    Date of Patent: April 16, 2024
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Shunpei Yamazaki, Tomoaki Atsumi, Yuta Endo
  • Patent number: 11962013
    Abstract: The positive electrode active material layer includes a plurality of particles of a positive electrode active material and a reaction mixture where reduced graphene oxide is bonded to a polymer having a functional group as a side chain. The reduced graphene oxide has a sheet-like shape and high conductivity and thus functions as a conductive additive by being in contact with the plurality of particles of the positive electrode active material. The reaction mixture serves as an excellent binder since the reduced graphene oxide is bonded to the polymer. Therefore, even a small amount of the reaction mixture where the reduced graphene oxide is covalently bonded to the polymer excellently serves as a conductive additive and a binder.
    Type: Grant
    Filed: February 18, 2021
    Date of Patent: April 16, 2024
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Masaki Yamakaji, Kuniharu Nomoto
  • Patent number: 11961843
    Abstract: An object is to improve the drive capability of a semiconductor device. The semiconductor device includes a first transistor and a second transistor. A first terminal of the first transistor is electrically connected to a first wiring. A second terminal of the first transistor is electrically connected to a second wiring. A gate of the second transistor is electrically connected to a third wiring. A first terminal of the second transistor is electrically connected to the third wiring. A second terminal of the second transistor is electrically connected to a gate of the first transistor. A channel region is formed using an oxide semiconductor layer in each of the first transistor and the second transistor. The off-state current of each of the first transistor and the second transistor per channel width of 1 ?m is 1 aA or less.
    Type: Grant
    Filed: November 23, 2020
    Date of Patent: April 16, 2024
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Hajime Kimura, Atsushi Umezaki, Shunpei Yamazaki
  • Patent number: 11961979
    Abstract: A semiconductor device capable of charging that is less likely to cause deterioration of a power storage device is provided. The amount of a charging current is adjusted in accordance with the ambient temperature. Charging under low-temperature environments is performed with a reduced charging current. When the ambient temperature is too low or too high, the charging is stopped. Measurement of the ambient temperature is performed with a memory element using an oxide semiconductor. The use of a memory element using an oxide semiconductor enables measurement of the ambient temperature and retention of the temperature information to be performed at the same time.
    Type: Grant
    Filed: July 3, 2019
    Date of Patent: April 16, 2024
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Takayuki Ikeda, Munehiro Kozuma, Takanori Matsuzaki, Ryota Tajima, Shunpei Yamazaki
  • Patent number: 11961918
    Abstract: A semiconductor device which has favorable electrical characteristics, a method for manufacturing a semiconductor device with high productivity, and a method for manufacturing a semiconductor device with a high yield are provided.
    Type: Grant
    Filed: August 24, 2022
    Date of Patent: April 16, 2024
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Yasutaka Nakazawa, Yukinori Shima, Kenichi Okazaki, Junichi Koezuka, Shunpei Yamazaki
  • Patent number: 11963343
    Abstract: A semiconductor device capable of obtaining the threshold voltage of a transistor is provided. The semiconductor device includes a first transistor, a first capacitor, a first output terminal, a first switch, and a second switch. A gate and a source of the first transistor are electrically connected to each other. A first terminal of the first capacitor is electrically connected to the source. A second terminal and the first output terminal of the first capacitor are electrically connected to a back gate of the first transistor. The first switch controls input of a first voltage to the back gate. A second voltage is input to a drain of the first transistor. The second switch controls input of a third voltage to the source.
    Type: Grant
    Filed: August 22, 2022
    Date of Patent: April 16, 2024
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Hitoshi Kunitake, Ryunosuke Honda, Tomoaki Atsumi
  • Patent number: 11963430
    Abstract: An object is to provide a highly reliable display unit having a function of sensing light. The display unit includes a light-receiving device and a light-emitting device. The light-receiving device includes an active layer between a pair of electrodes. The light-emitting device includes a hole-injection layer, a light-emitting layer, and an electron-transport layer between a pair of electrodes. The light-receiving device and the light-emitting device share one of the electrodes, and may further share another common layer between the pair of electrodes. The hole-injection layer is in contact with an anode and contains a first compound and a second compound. The electron-transport property of the electron-transport layer is low; hence, the light-emitting layer is less likely to have excess electrons. Here, the first compound is the material having a property of accepting electrons from the second compound.
    Type: Grant
    Filed: April 14, 2023
    Date of Patent: April 16, 2024
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Taisuke Kamada, Ryo Hatsumi, Daisuke Kubota, Naoaki Hashimoto, Tsunenori Suzuki, Harue Osaka, Satoshi Seo
  • Publication number: 20240121497
    Abstract: A small light-emitting device is provided. A light-emitting device which is less likely to produce a shadow is provided. A structure including a switching circuit for supplying a pulsed constant current and a light-emitting panel supplied with the pulsed constant current has been conceived.
    Type: Application
    Filed: December 1, 2023
    Publication date: April 11, 2024
    Applicant: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Yoshiharu HIRAKATA, Nobuharu OHSAWA, Hisao IKEDA, Kazuhiko FUJITA, Akihiro KAITA
  • Publication number: 20240121979
    Abstract: A light-emitting device with high heat resistance in a manufacturing process is to be provided.
    Type: Application
    Filed: February 1, 2022
    Publication date: April 11, 2024
    Applicant: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Yui YOSHIYASU, Naoaki HASHIMOTO, Tatsuyoshi TAKAHASHI, Sachiko KAWAKAMI, Satoshi SEO
  • Publication number: 20240120339
    Abstract: Disclosed is a semiconductor device capable of functioning as a memory device. The memory device comprises a plurality of memory cells, and each of the memory cells contains a first transistor and a second transistor. The first transistor is provided over a substrate containing a semiconductor material and has a channel formation region in the substrate. The second transistor has an oxide semiconductor layer. The gate electrode of the first transistor and one of the source and drain electrodes of the second transistor are electrically connected to each other. The extremely low off current of the second transistor allows the data stored in the memory cell to be retained for a significantly long time even in the absence of supply of electric power.
    Type: Application
    Filed: December 13, 2023
    Publication date: April 11, 2024
    Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.
    Inventor: Shunpei YAMAZAKI
  • Publication number: 20240120341
    Abstract: Disclosed is a semiconductor device capable of functioning as a memory device. The memory device comprises a plurality of memory cells, and each of the memory cells contains a first transistor and a second transistor. The first transistor is provided over a substrate containing a semiconductor material and has a channel formation region in the substrate. The second transistor has an oxide semiconductor layer. The gate electrode of the first transistor and one of the source and drain electrodes of the second transistor are electrically connected to each other. The extremely low off current of the second transistor allows the data stored in the memory cell to be retained for a significantly long time even in the absence of supply of electric power.
    Type: Application
    Filed: December 13, 2023
    Publication date: April 11, 2024
    Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.
    Inventor: Shunpei YAMAZAKI
  • Publication number: 20240120340
    Abstract: Disclosed is a semiconductor device capable of functioning as a memory device. The memory device comprises a plurality of memory cells, and each of the memory cells contains a first transistor and a second transistor. The first transistor is provided over a substrate containing a semiconductor material and has a channel formation region in the substrate. The second transistor has an oxide semiconductor layer. The gate electrode of the first transistor and one of the source and drain electrodes of the second transistor are electrically connected to each other. The extremely low off current of the second transistor allows the data stored in the memory cell to be retained for a significantly long time even in the absence of supply of electric power.
    Type: Application
    Filed: December 13, 2023
    Publication date: April 11, 2024
    Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.
    Inventor: Shunpei YAMAZAKI
  • Patent number: 11951769
    Abstract: Space-saving in an automobile or the like provided with a battery is achieved. Design flexibility of an automobile or the like can be improved. An electric power control method or an electric power control system capable of utilizing electric power efficiently is provided. It is an electric power control system of an automobile including a car body, a first battery, a second battery, and a control unit. The control unit obtains states of charge of the first battery and the second battery, determines whether or not a difference between remaining capacities of the first battery and the second battery exceeds a predetermined value, and controls transmission of electric power between the first battery and the second battery, in the case where the difference in the remaining capacities exceeds the predetermined value, to be made such that the remaining capacities are close to each other.
    Type: Grant
    Filed: January 18, 2017
    Date of Patent: April 9, 2024
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Kensuke Yoshizumi, Ryota Tajima
  • Patent number: 11954276
    Abstract: A touch panel including an oxide semiconductor film having conductivity is provided. The touch panel includes a transistor, a second insulating film, and a touch sensor. The transistor includes a gate electrode; a gate insulating film; a first oxide semiconductor film; a source electrode and a drain electrode; a first insulating film; and a second oxide semiconductor film. The second insulating film is over the second oxide semiconductor film so that the second oxide semiconductor film is positioned between the first insulating film and the second insulating film. The touch sensor includes a first electrode and a second electrode. One of the first and second electrodes includes the second oxide semiconductor film.
    Type: Grant
    Filed: May 11, 2021
    Date of Patent: April 9, 2024
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Shunpei Yamazaki, Hajime Kimura, Masami Jintyou, Yasuharu Hosaka, Naoto Goto, Takahiro Iguchi, Daisuke Kurosaki, Junichi Koezuka
  • Patent number: 11956981
    Abstract: A light-emitting element having high emission efficiency is provided. The light-emitting element includes a first organic compound, a second organic compound, and a third organic compound. The first organic compound has a function of converting triplet excitation energy into light emission. The second organic compound is preferably a TADF material. The third organic compound is a fluorescent compound. Light emitted from the light-emitting element is obtained from the third organic compound. Triplet excitation energy in a light-emitting layer is transferred to the third organic compound by reverse intersystem crossing caused by the second organic compound or through the first organic compound.
    Type: Grant
    Filed: April 24, 2023
    Date of Patent: April 9, 2024
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Nobuharu Ohsawa, Satoshi Seo