Abstract: A method for fabricating a high density semiconductor integrated circuit device with a multilayer interconnect wiring structure is disclosed. This structure has a low-dielectric constant insulator film including an organic thin-film with its dielectric constant ranging from about 2.0 to about 2.4. To fabricate the multilayer wiring structure, a substrate with an inorganic film for use as an underlayer dielectric film is prepared. Then, apply plasma processing, such as plasma-assisted chemical vapor-phase growth, to a top surface of the inorganic underlayer dielectric film in environment that contains therein organic silane-based chemical compounds, thereby to form on the inorganic film surface a hydrophobic surface layer with a contact angle with water being 50° or higher. Next, form on the plasma-processed hydrophobic surface an organic film including a fluorinated aromatic carbon hydride polymer film.

Abstract: A gate insulating film is formed in a first region and a second region of a substrate, a first metallic film is formed on the gate insulating film in one of the first region or the second region, and a second metallic film is formed on each of the first and second regions. Furthermore, a protective film is formed on the second metallic film, and the protective film and the metallic film are patterned to the pattern of the gate electrode. Next, a first sidewall is formed on the side of a gate electrode. Then, impurities producing first and second conductivity types are implanted into the surface of the substrate in respective regions, using the first sidewalls and the gate electrodes as masks to form a first impurity-diffused region, and impurities producing second and first conductivity types are implanted to form an impurity diffusion preventing layer.

Abstract: In a method for forming a semiconductor device, the major surface of a substrate is separated into a first element region for forming a first field-effect transistor and a second element region for forming a second field-effect transistor. A silicon nitride film is formed in each of the first and second element regions. Thereafter, the silicon nitride film formed in the second element region is removed, and the substrate is subjected to heat treatment in an ambient that contains nitrogen oxide. Thereby, the silicon nitride film in the first element region is oxidized to form an oxynitride film, and a silicon oxynitride film is formed in the second element region. Thereafter, a high-dielectric-constant film is formed on the silicon oxynitride films in each of the first and second element regions.

Abstract: A cleaning apparatus is provided with a processing bath to be filled with a cleaning chemical, an ultrasonic oscillator, and a retainer for holding a substrate to be immersed into a cleaning chemical. The front surface of the substrate is cleaned while ultrasonic waves are radiated from the ultrasonic oscillator onto the back surface of the substrate.

Abstract: A wafer edge exposure apparatus is provided with an optical section for radiating exposure light onto the edge of a semiconductor wafer. The optical section is provided with a focus sensor for sensing a distance from the lower end of the optical section to the edge of the semiconductor wafer. There is provided a position control mechanism for moving the optical section vertically on the basis of a value detected by the focus sensor such that the distance matches a focal distance of the optical section.

Abstract: A mask layer having an opening is formed on a semiconductor substrate. Next, oxygen ions and a first impurity are implanted into the semiconductor substrate using the mask layer as a mask. Then, the mask layer is removed. Next, the oxygen ions are heat treated to react and form an oxide film on the region where the first impurity has been implanted. Then, the oxide film is removed to form a depression in the semiconductor substrate. Next, a gate insulating film and a gate electrode are formed on the depression. Then a second impurity is implanted into the surface of the semiconductor substrate to form a source/drain. An impurity lighter than the oxygen ions and the second impurity is used as the first impurity.

Abstract: A first CVD dielectric layer is deposited on a surface of a semiconductor substrate. Next, low-k layers are deposited in at least two different steps to form one of a via-layer dielectric film and a wiring-layer dielectric film on the first CVD dielectric layer. Immediately after the depositions, thermal treatment is performed. A second CVD dielectric layer is deposited on the low-k layers. A groove is formed in the second CVD dielectric layer and the low-k layers. A metal layer is deposited on that structure, filling the groove. The metal layer is removed from the second CVD dielectric layer by chemical mechanical polishing.

Abstract: A semiconductor device of the present invention comprises: a silicon substrate; a gate insulating film on the silicon substrate; and a gate electrode on the gate insulating film, wherein the gate insulating film includes: a first insulating film; a second insulating film on the first insulating film; and a metal nitride film on the second insulating film. The metal nitride film may be either AlN or Hf3N4. The metal nitride film may include nitrides of two or more different metals.

Abstract: A gate electrode in an NMOS region is one of intrinsic silicon and a material having a work function equivalent to that of intrinsic silicon, and a material having a work function smaller than that of intrinsic silicon. A gate electrode in a PMOS region is one of intrinsic silicon and a material having a work function equivalent to that of intrinsic silicon, and a material having a work function larger than that of intrinsic silicon. Further, a source/drain region in the NMOS region includes a silicide layer of a material having a work function smaller than that of intrinsic silicon, and a source/drain region in the PMOS region includes a silicide layer of a material having a work function larger than that of intrinsic silicon.

Abstract: A gate insulating film on a silicon substrate includes a SiO2 film and a high-k film. The high-k film contains a transition metal, aluminum, silicon, and oxygen. The concentration of silicon in the high-k film is higher than the concentrations of the transition metal and aluminum in the vicinity of the interface with the SiO2 film and the vicinity of the interface with the gate electrode. Furthermore, it is preferable that the concentration of silicon is the highest at least in one of the vicinity of the interface with the SiO2 film or the vicinity of the interface with the gate electrode, gradually decreases with distance from these interfaces, and becomes the lowest in a central part of the high-k film.

Abstract: A first insulating film is formed on a base substrate, then a second insulating film is formed on the first insulating film, the second insulating film having a relative permittivity higher than that of the first insulating film. A gate electrode is formed on the second insulating film. The second insulating film forming includes first to sixth steps, and a cycle consisting of the first to sixth steps is repeated.

Abstract: A gate insulating film having an insulating film that contains at least nitrogen is formed on a substrate, and the gate insulating film is subjected to heat treatment for about 500 milliseconds or less using a flash lamp. Thereafter, a gate electrode is formed on the gate insulating film. Specifically, for example, a laminated film of SiO2 and SixN(1-x), a laminated film of SiO2, HfSiO, and SixN(1-x), or the like, is formed in forming the gate insulating film.

Abstract: After forming a gate insulating film and a gate electrode on a substrate, ion implantation is performed to form a doped region. Thereafter, ions are implanted in the doped region and the gate electrode to form an amorphous layer on the doped region and the gate electrode. The amorphous layer is subjected to heat treatment at temperatures of 550° C. to 650° C. and recrystallized. Thereafter, a material film is formed for forming a silicide layer, at least on the doped region and the gate electrode, and heat treatment is performed so the Si of the doped region and the gate electrode reacts with said material film to form a silicide layer. Furthermore, the material film that has not reacted is removed. The thickness of the amorphous layer formed is substantially identical to the thickness of the silicide layer.

Abstract: A semiconductor includes a gate electrode having a SiGe film on a a gate dielectric film that is on a silicon substrate. The gate dielectric film includes an underlying interfacial layer on the substrate, and a high-k dielectric film having higher dielectric constant than the underlying interfacial layer. The gate electrode includes a seed Si film on the high-k dielectric film and a SiGe film formed on the seed Si film. The seed Si film has a thickness of 0.1 nm or more and smaller than 5 nm.

Abstract: A method for observing defect in an amorphous material by transmission electron microscopy is disclosed. The method comprises the steps of: incident electron beam into the amorphous material; eliminating a generated diffraction wave to form an image only by a transmission wave coming through the amorphous material; and observing the image under an under-focus condition. A method for respectively observing an amorphous material and a crystalline material in a composite material containing both of the amorphous material and the crystalline material by transmission electron microscopy is also disclosed.

Abstract: In a method for forming a semiconductor device, the major surface of a substrate is separated into a first element region for forming a first field-effect transistor and a second element region for forming a second field-effect transistor. A silicon nitride film is formed in each of the first and second element regions. Thereafter, the silicon nitride film formed in the second element region is removed, and the substrate is subjected to heat treatment in an ambient that contains nitrogen oxide. Thereby, the silicon nitride film in the first element region is oxidized to form an oxynitride film, and a silicon oxynitride film is formed in the second element region. Thereafter, a high-dielectric-constant film is formed on the silicon oxynitride films in each of the first and second element regions.

Abstract: A semiconductor device includes semiconductor elements and at least one dummy pattern. Each or at least some of the semiconductor elements has a Damascene gate structure or a replacing gate structure and is located in element-forming regions. In addition, at least a dummy pattern is located in a region different from the element-forming regions. The dummy pattern may have a semiconductor element structure of the same or different kind from the Damascene gate structure or replacing gate structure. The dummy pattern may be a pattern of an insulating film, an interface transistor, or an analog circuit capacitor electrode instead of the dummy gate.

Abstract: In a method for manufacturing a semiconductor device, an insulating film having pores is formed on a substrate, and an opening is formed in the insulating film. Thereafter, a material gas supplying Si or C is supplied to the insulating film. Thereby, deficient elements, such as Si or C, are supplied to the insulating film. Thereafter, in the opening, including a barrier metal, is filled with a conductive member to form a wiring structure.

Abstract: In a method for manufacturing a semiconductor device, a gate insulating film and a gate electrode are first formed on a substrate. Next, Ge ions, Si ions, or the like are implanted to make the surface of the substrate amorphous, using the gate electrode as a mask. Thereafter, impurities such as B ions or the like, for forming a doped region, are implanted into the amorphous area of the substrate, using the gate electrode as a mask. Furthermore, the doped region is irradiated with visible light for a short period of time.

Abstract: In a method for manufacturing a semiconductor device having a multi-layer insulating film, a first insulating film is formed as one layer of the multi-layer insulating film, and a plasma treatment is performed on the surface of the first insulating film in an ambient of helium and argon, containing 5 to 31% Ar. After the plasma treatment, a second insulating film, different from the first insulating film, is formed on the first insulating film as another layer of the multi-layer insulating film.