Abstract: The present disclosure provides a local carbon-supply device and a method for preparing a wafer-level graphene single crystal by local carbon supply. The method includes: providing the local carbon-supply device; preparing a nickel-copper alloy substrate, placing the nickel-copper alloy substrate in the local carbon-supply device; placing the local carbon-supply device provided with the nickel-copper alloy substrate in a chamber of a chemical vapor-phase deposition system, and introducing a gaseous carbon source into the local carbon-supply device to grow the graphene single crystal on the nickel-copper alloy substrate. A graphene prepared by embodiments of the present disclosure has the advantages of good crystallinity of a crystal domain, simple preparation condition, low cost, a wider window of condition parameters required for growth, and good repeatability, which lays a foundation for wide application of the wafer-level graphene single crystal in a graphene apparatus and other fields.

Abstract: The present invention provides a capacitive acceleration sensor with a bending elastic beam and a preparation method. The sensor at least includes a first electrode structural layer, a middle structural layer and a second electrode structural layer; wherein the first electrode structural layer and the second electrode structural layer are provided with an electrode lead via-hole, respectively; the middle structural layer includes: a frame formed on a SOI silicon substrate with a double device layers, a seismic mass whose double sides are symmetrical and a bending elastic beam with one end connected to the frame and the other end connected to the seismic mass, wherein anti-overloading bumps and damping grooves are symmetrically provided on two sides of the seismic mass, and the bending elastic beams at different planes are staggered distributed and are not overlapped with each other in space.

Abstract: The present invention provides a variable area capacitive lateral acceleration sensor and a preparation method. The acceleration sensor at least includes: three-layer stack structure bonded by a first substrate, a second substrate and a third substrate which are electrically isolated with each other, wherein, the second substrate includes a movable seismic mass, a frame surrounded the movable seismic mass, a elastic beam connected to the movable seismic mass and the frame, a plurality of bar structure electrodes positioned on two surfaces of the movable seismic mass, an anti-overloading structure arranged on the movable seismic mass, etc.

Abstract: An ultrahigh resolution magnetic resonance imaging method and apparatus, the method comprises the following steps of: placing a test sample within an action range of a magnetic gradient source and a nano-scale superconducting quantum interference device, applying a static magnetic field on the test sample by a static magnetic source, and applying a nuclear magnetic resonance radio-frequency pulse on the test sample by a radio-frequency source to excite the test sample to cause nuclear magnetic resonance; directly coupling the nano-scale superconducting quantum interference device with the test sample to detect nuclear magnetic resonance spectrum signals generated by the test sample; establishing an image of the test sample according to the detected nuclear magnetic resonance spectrum signals and space distribution information of gradient magnetic fields generated by the magnetic gradient source.

Abstract: A method and a device for reducing the extrinsic dark count of a superconducting nanowire single photon detector (SNSPD), it comprises the steps of: integrating a multi-layer film filter on the superconducting nanowire single photon detector; the multi-layer film filter is a device implemented by a multi-layer dielectric film and having a band-pass filtering function. The extrinsic dark count is the dark count triggered by optical fiber blackbody radiance and external stray light. The superconducting nanowire single photon detector comprises: a substrate having an upper surface integrated with an upper anti-reflection layer and a lower surface integrated with a lower anti-reflection layer; an optical cavity structure; a superconducting nanowire; and a reflector. The present invention is easy to operate, and only needs to integrate the multi-layer film filter on the substrate of the SNSPD to filter non-signal radiation.

Abstract: A nano-scale superconducting quantum interference device and a manufacturing method thereof, comprising the following steps of: S1: providing a substrate and growing a first superconducting material layer thereon; S2: forming a photo-resist layer and performing patterning; S3: etching the first superconducting material layer in a predetermined region; S4: covering a layer of insulation material on a top and a side of a structure obtained in step S3; S5: growing a second superconducting material layer; S6: removing the structure above the plane where the upper surface of the first superconducting material layer locates, to obtain a plane superconducting structure, in the middle of which at least one insulating interlayer is inserted; S7: forming at least one nanowire vertical to the insulating interlayer, to obtain the nano-scale superconducting quantum interference device. The width of the superconducting ring and the length of the nano junction are determined by the insulating interlayer.

Abstract: A manufacturing method of a graphene modulated high-k oxide and metal gate Ge-based MOS device, which comprises the following steps: 1) introducing a graphene thin film on a Ge-based substrate; 2) conducting fluorination treatment to the graphene thin film to form fluorinated graphene; 3) activating the surface of the fluorinated graphene by adopting ozone plasmas, and then forming a high-k gate dielectric on the surface of the fluorinated graphene through an atomic layer deposition technology; and 4) forming a metal electrode on the surface of the high-k gate dielectric. Since the present invention utilizes the graphene as a passivation layer to inhibit the formation of unstable oxide GeOx on the surface of the Ge-based substrate and to stop mutual diffusion between the gate dielectric and the Ge-based substrate, the interface property between Ge and the high-k gate dielectric layer is improved.

Abstract: The invention provides a sulfur doping method for graphene, which comprises the steps of: 1) providing graphene and placing the grapheme in a chemical vapor deposition reaction chamber; 2) employing an inert gas to perform ventilation and exhaust treatment in the reaction chamber; 3) introducing a sulfur source gas to perform sulfur doping on the graphene at 500-1050° C.; and 4) cooling the reaction chamber in a hydrogen and inert gas atmosphere. The present invention can perform sulfur doping on the graphene simply and efficiently, the economic cost is low, and large-scale production can be realized. Large area sulfur doping on graphene can be realized, and doping of graphene on an insulating substrate or metal substrate can be carried out directly.

Abstract: A preparation method of a graphene nanoribbon on h-BN, comprising: 1) forming a h-BN groove template with a nano ribbon-shaped groove structure on the h-BN by adopting a metal catalysis etching method; 2) growing a graphene nanoribbon in the h-BN groove template by adopting a chemical vapor deposition method. In the present invention, a CVD method is adopted to directly prepare a morphology controllable graphene nanoribbon on the h-BN, which helps to solve the long-term critical problem that the graphene is difficult to nucleate and grow on an insulating substrate, and to avoid the series of problems introduced by the complicated processes of the transferring of the graphene and the subsequent clipping manufacturing for a nanoribbon and the like.

Abstract: A capacitive acceleration sensor with an “H”-shaped beam and a preparation method. The sensor at least includes: a first electrode structural layer, a middle structural layer and a second electrode structural layer; the first electrode structural layer and the second electrode structural layer are provided with electrode lead via holes, respectively; the middle structural layer includes: a frame formed at SOI silicon substrate having a double device layer, a seismic mass whose double sides are symmetrical, and an “H”-shaped elastic beam whose double sides are symmetrical, with one end connected to the frame and the other end connected to the seismic mass, there are anti-overloading bumps and damping grooves symmetrically provided on the two sides of the seismic mass, and the “H”-shaped elastic beam and a bulk silicon layer of the oxygen containing silicon substrate satisfy the requirements therebetween: ?{square root over (2)}(a+b+c)<h, ?{square root over (2)}d<h.

Abstract: A preparation method of a graphene nanoribbon on h-BN, comprising: 1) forming a h-BN groove template with a nano ribbon-shaped groove structure on the h-BN by adopting a metal catalysis etching method; 2) growing a graphene nanoribbon in the h-BN groove template by adopting a chemical vapor deposition method. In the present invention, a CVD method is adopted to directly prepare a morphology controllable graphene nanoribbon on the h-BN, which helps to solve the long-term critical problem that the graphene is difficult to nucleate and grow on an insulating substrate, and to avoid the series of problems introduced by the complicated processes of the transferring of the graphene and the subsequent clipping manufacturing for a nanoribbon and the like.

Abstract: Provided is an image type electron spin polarimeter. It at least comprises a scattering target, a two-dimensional electron detector and an electron bending unit, wherein the electron bending unit is used for bending the orbit of the incident (scattered) electrons to a first (second) angle to arrive the scattering target (two-dimensional electron detector) with an optimal incident angle, and to transfer the image of the electron intensities from the entrance plane (scattering target) to the scattering target (two-dimensional electron detector) with small aberrations, and to separate the orbits of incident and scattered electrons to increase the degree of freedom of the geometric configuration of each component of the spin polarimeter.

Abstract: The present invention provides a phase-change storage unit for replacing DRAM and FLASH and a manufacturing method thereof, and the phase-change storage unit includes a phase-change material layer and a cylindrical lower electrode being in contact with and located below the phase-change material layer, where the phase-change material layer is formed by connecting a side wall layer and a round bottom layer, forms a hollow cylinder or hollow inverted conical frustum having an opening at an upper part, and the hollow cylinder or hollow inverted conical frustum is internally filled with a medium layer.

Abstract: An epitaxial growth method for preventing auto-doping effect is presented. This method starts with the removal of impurities from the semiconductor substrate and the reaction chamber to be used. Then the semiconductor substrate is loaded in the cleaned reaction chamber to be pre-baked under vacuum conditions before the extraction of the dopant atoms desorbed from the surface of the semiconductor substrate. Next, under high temperature and low gas flow conditions, a first intrinsic epitaxial layer is formed on the surface of said semiconductor substrate. Following this, under low temperature and high gas flow conditions, a second epitaxial layer of required thickness is formed on the structural surface of the grown intrinsic epitaxial layer. Last, silicon wafer is unloaded after cooling. This method can prevent auto-doping effect during the epitaxial growth on semiconductor substrate and thus ensure the performance and enhance the reliability of the devices in peripheral circuit region.

Abstract: A method for growing a graphene nanoribbon on an insulating substrate having a cleavage plane with atomic level flatness is provided, and belongs to the field of low-dimensional materials and new materials. The method includes the following steps. Step 1: Cleave an insulating substrate to obtain a cleavage plane with atomic level flatness, and prepare a single atomic layer step. Step 2: Directly grow a graphene nanoribbon on the insulating substrate having regular single atomic steps. In the method, a characteristic that nucleation energy of graphene on the atomic step is different from that on the flat cleavage plane is used, and conditions, such as the temperature, intensity of pressure and supersaturation degree of activated carbon atoms, are adjusted, so that the graphene grows only along a step edge into a graphene nanoribbon of an adjustable size. The method is mainly applied to the field of new-type graphene optoelectronic devices.

Abstract: An Sb—Te—Ti phase-change thin-film material applicable to a phase-change memory and preparation thereof. The Sb—Te—Ti phase-change memory material is formed by doping an Sb—Te phase-change material with Ti, Ti forms bonds with both Sb and Te, and the Sb—Te—Ti phase-change memory material has a chemical formula SbxTeyTi100-x-y, where 0<x<80 and 0<y<100?x. When the Sb—Te—Ti phase-change memory material is a Ti—Sb2Te3 phase-change memory material, Ti atoms replace Sb atoms, and phase separation does not occur. The crystallization temperature of the Sb—Te—Ti phase-change memory material is significantly risen, retention is improved, and thermal stability is enhanced; meanwhile, the amorphous state resistance decreases, and the crystalline state resistance increases; and the Sb—Te—Ti phase-change memory material has wide application in phase-change memories.

Abstract: A method for preparing a semiconductor substrate with an buried insulating layer by a guttering process, includes the following steps: providing a device substrate and a supporting substrate; forming an insulating layer on a surface of the device substrate; performing a heating treatment on the device substrate, so as to form a denuded zone on the surface of the device substrate; bonding the device substrate having the insulating layer with the supporting substrate, such that the insulating layer is sandwiched between the device substrate and the supporting substrate; annealing and reinforcing a bonding interface, such that an adherence level of the bonding interface meets requirements in the following chamfering grinding, thinning and polishing processes; performing the chamfering grinding, thinning and polishing processes on the device substrate which is bonded.

Abstract: The present invention provides a phase-change storage unit containing a TiSiN material layer and a method for preparing the same. The phase-change storage unit includes a phase-change material layer and a lower electrode located there below, the phase-change material layer and the lower electrode are connected by a TiSiN material layer, the lower electrode includes a bottom and a sheet side connected to the bottom, the sheet side is perpendicular to the bottom to form a blade structure, and the top of the sheet side contacts the TiSiN material layer. The present invention adopts annealing to increase the grain size of the electrode so as to reduce the overall resistance of the device and form a TiSiN material layer on the top of the lower electrode so as to reduce the effective operation region. The phase-change storage unit of the present invention is applied to a phase-change memory to achieve the advantages such as low power consumption, high density and high data retention performance.

Abstract: A manufacturing method of a graphene modulated high-k oxide and metal gate Ge-based MOS device, which comprises the following steps: 1) introducing a graphene thin film on a Ge-based substrate; 2) conducting fluorination treatment to the graphene thin film to form fluorinated graphene; 3) activating the surface of the fluorinated graphene by adopting ozone plasmas, and then forming a high-k gate dielectric on the surface of the fluorinated graphene through an atomic layer deposition technology; and 4) forming a metal electrode on the surface of the high-k gate dielectric. Since the present invention utilizes the graphene as a passivation layer to inhibit the formation of unstable oxide GeOx on the surface of the Ge-based substrate and to stop mutual diffusion between the gate dielectric and the Ge-based substrate, the interface property between Ge and the high-k gate dielectric layer is improved.

Abstract: The present invention provides a method for preparing an ultra-thin material on insulator through adsorption by a doped ultra-thin layer. In the method, first, an ultra-thin doped single crystal film and an ultra-thin top film (or contains a buffer layer) are successively and epitaxially grown on a first substrate, and then a high-quality ultra-thin material on insulator is prepared through ion implantation and a bonding process. A thickness of the prepared ultra-thin material on insulator ranges from 5 nm to 50 nm. In the present invention, the ultra-thin doped single crystal film adsorbs the implanted ion, and a micro crack is then formed, so as to implement ion-cut; therefore, the roughness of a surface of a ion-cut material on insulator is small.