Abstract: Embodiments of the present invention comprise methods and systems for processing image data for use on LCD displays.

Abstract: A method of beacon rebroadcast for use in a packet-based, centrally-controlled, wireless network includes embedding auxiliary network information in a header portion of a packet transmitted over the network by a central controller; receiving a packet having auxiliary network information therein by a device in the network; rebroadcast, by the device in the network, of the packet having auxiliary network information therein in a predetermined time slot, wherein the predetermined time slot is predetermined by the central controller; and receiving, by a device not already on the network, of the auxiliary network information bearing packet, thereby allowing the device not already on the network to join the network.

Abstract: An image forming apparatus includes a history storage portion for storing the usage history involving the number of prints of the image forming apparatus, and a processing time controller for changing the time of the pre-processing operation before or the time of the post-processing operation after a printing process of the printing portion, based on the stored usage history so as to exclude the influence of the unfixed developer on the printing process.

Abstract: A nonvolatile semiconductor storing device according to the present invention comprises a block replacing means for replacing a defective block with a redundant block when a memory block in a memory array is the defective block. The block replacing means includes an address translation circuit 10 for converting an inputted external block address into an internal block address by inverting an address bit corresponding to dissident of each address bit between a defective block address of the defective block and a redundant block address among address bits of the inputted external block address, and each of the memory blocks 5 is selected based on the internal block address after the translation of the external block address inputted from outside by the address translation circuit 10.

Abstract: A display control circuit incorporating a RAM in which display data is stored, comprises an oscillation circuit which oscillates a reference clock to define a transfer period in which the display data is transferred from the RAM to a display and a counter circuit which counts the number of the reference clocks, and the transfer period is determined by the number of counts of the reference clocks by the counter circuit. In addition, the oscillation circuit starts oscillation when a transfer request of the display data is generated while the oscillation is stopped, and stops the oscillation when an access request from the CPU is generated during the oscillation, and resumes the oscillation when the access request is stopped.

Abstract: An active matrix substrate includes base substrate, gate lines, data lines, thin-film transistors and pixel electrodes. The gate lines are formed on the base substrate. The data lines are formed over the gate lines. Each of the data lines crosses all of the gate lines with an insulating film interposed therebetween. The thin-film transistors are formed over the base substrate. Each of the thin-film transistors is associated with one of the gate lines and operates responsive to a signal on the associated gate line. Each of the pixel electrodes is associated with one of the data lines and one of the thin-film transistors and is electrically connectable to the associated data line by way of the associated thin-film transistor. Each of the pixel electrodes and the associated thin-film transistor are connected together by way of a conductive member.

Abstract: A CMOS logical circuit comprises two electric current paths each of which has circuits consisting of n-type and p-type transistors. In a circuit consisting of n-type or p-type transistors, one electric current path is provided with a circuit having the same construction as that of a circuit having an n-type transistor of a CMOS logical circuit outputting a logical operation result similar to that of this logical circuit, and the other electric current path is provided with a circuit having the same construction as that of a circuit having a p-type transistor of the CMOS logical circuit outputting a logical operation result similar to that of this logical circuit. In another circuit consisting of the other channel type, a gate electrode of the transistor provided on the one electric current path and that of the transistor provided on the other electric current path are connected to drain electrodes of the counterparts.

Abstract: A two-way transmission system of the present invention is arranged in such a manner that, when a host-side controller confirms the receipt of an IN packet from a USB host, the host-side controller transfers the IN packet to a function-side controller, and receives a DATA packet from the function side. The received DATA packet is temporarily stored in a FIFO. At the time of the receipt of the IN packet again, the host-side controller supplies, to the USB host, the DATA packet stored in the FIFO.

Abstract: In an optical communication-use receiving circuit of the present invention, the pulse width of the received pulse which is a binary signal corresponding to the signal optical pulse is specified by using an integration circuit and a trigger generating circuit. If the pulse width of the received pulse is not shorter than a predetermined value, a signal having a fixed pulse width is outputted as an output signal from a one-shot pulse generating circuit, so that a pulse having a constant pulse width corresponding to the specified communication speed is outputted. Accordingly, if the pulse width deriving from the signal optical pulse is larger than a certain value, the communication is deemed as a low-speed communication, and a pulse having a constant pulse width corresponding to the communication speed is outputted. As a result, it is possible to realize a small-size receiving circuit and a small-size electronic device which require no external switching-over terminal.

Abstract: The present invention provides an offset adjusting circuit and an operational amplifier circuit. In the operational amplifier circuit (1), a switching element (S1) is closed and a switching element (S2) is opened. The latch circuit DL latches an output voltage of an operational amplifier (1a), and output a Q-output in accordance with the output voltage. The control circuit (2a) inputs an offset adjustment signal s1 to an offset adjustment input terminal OR of the operational amplifier (1a). Then, the latch circuit DL latches the output voltage having been subjected to the offset adjustment, and the offset adjustment signal s1 is finely adjusted for adjusting the remaining offset. In this way, the offset in the output voltage of the operational amplifier (1a) is quantized in accordance with the number of times the latching operation has been performed, and is stored in the control circuit (2a) in the form of a binary logical signal.

Abstract: A wiring structure, a substrate for a display device provided therewith and a display device. The display device features a high brightness and a good display quality. The display device comprises a plurality of pixel regions arranged on a glass substrate; a TFT arranged for each of the pixel regions; an organic EL element including an anode formed by using an ITO for each of the pixel regions, and electrically connected to the source electrode of the TFT, an organic EL layer formed on the anode, and a cathode formed on the organic EL layer to transmit light from the organic EL layer; and a reflection plate for reflecting light from the organic EL layer.

Abstract: A display device is for carrying out display by supplying a data signal, that is supplied from a video signal line, to one of a plurality of pixel electrodes via a switching element, and by supplying a scanning signal for controlling ON/OFF state of the switching element to the switching element via a scanning signal line that is orthogonal to the video signal line and is connected to the switching element. When the scanning signal is outputted to the scanning signal line, the scanning signal has a falling waveform that first falls substantially vertically from an ON-level of the switching element in a direction of an OFF-level of the switching element, and then starts falling with a slope, and again falls substantially vertically before reaching the OFF-level of the switching element. As such, the writing of the data signal to the pixel electrode may be securely carried out even when the writing period for each scanning signal is reduced, thereby displaying a high-quality image.

Abstract: The subject invention provides an image forming device including a main control section and a signal detection circuit for detecting presence or absence of an external signal supplied to the main control section, and further provided with an interface section for controlling external communication; a main power supply circuit; a power supply control circuit. The signal detection circuit includes a low power mode prohibition circuit for outputting a low power mode prohibition signal for voiding the request for low power consumption with respect to the power supply control circuit or the main power supply circuit while the external signal is supplied to the signal detection circuit. With this arrangement, the present invention provides an image forming device capable of appropriate transition into the low power consumption operation by hardware without use of software.

Abstract: A display element included in a display device is provided with a TFT circuit portion and a pixel aperture portion to which an organic EL element material is applied and which emits light in accordance with a current from the TFT circuit portion, as well as a scanning signal line electrode, a data signal line electrode and a power source line electrode. The resistance Re of the power source line electrode can be reduced, because the electrode width at a portion where the power source line electrode is in contact with the pixel aperture portion is larger than the electrode width at other portions. The resistance ratio Rx/Re between the electrode resistance Re and a combined resistance Rx of a current path from the power source line electrode through the pixel aperture portion is at least 105. Thus, a display element and a display device are realized, which have little luminance variation within the display screen, which have a high numerical aperture, a high light emission efficiency and a long lifetime.

Abstract: The present invention provides an image processing device which can reduce a storage capacity and perform color correction in accordance with the types of image. The image processing device of the present invention has an input correction section 6 including: input color correction section 24 for, using a matrix coefficient, correcting strength of signals for color components in image data of a supplied image; a matrix coefficient storage section 26 for storing a plurality of matrix coefficients in accordance with types of image; and control section 25 for reading a matrix coefficient corresponding to the type of a supplied image out of the matrix coefficients stored in the matrix coefficient storage section 26 and setting the matrix coefficient that has been read in the input color correction section 24.

Abstract: A method of fabricating a silicon-on-plastic layer via layer transfer includes depositing a layer of SiGe on a silicon substrate; depositing a layer of silicon; implanting splitting hydrogen ions into the silicon substrate; bonding a glass substrate to the silicon layer; splitting the wafer; removing the silicon layer and a portion of the SiGe layer; depositing a dielectric on the silicon side of the silicon-on-glass wafer; applying adhesive and bonding a plastic substrate to the silicon side of the silicon-on-glass wafer; removing the glass from the glass side of the bonded, silicon-on-glass wafer to form a silicon-on-plastic wafer; and completing a desired IC device on the silicon-on-plastic. Multi-level structure may be fabricated according to the method of the invention by repeating the last few steps of the method of the invention.

Abstract: A printer driver comprising: a layout determining section that acquires data of a document page (logical page) and determines a layout of one or more printing pages (physical pages) by allocating a content of the logical page; a re-layout determining section that makes determination whether the determined layout includes an combinable pages or not, based on a ratio of a blank area in the physical page and based on presence/absence of continuity in the contents between the page and the immediately preceding physical page or based on an arrangement characteristic of a non-blank area in the physical page, when one logical page is allocated to plural physical pages; and a page combination control section that causes the layout determining section to determine a combined layout by re-allocating the combinable page and immediately preceding physical page to a single physical page based on the determination.

Abstract: An image processing device in which predetermined image processing is carried out on image data, and the image data that has been processed is saved as processing history information, is provided with: a format determination means that determines whether or not the image data is in a specified document format, and a saving means that, when it is judged that the image data determined by the format determination means is in the specified document format, saves format information of the specified document format together with the image data as the processing history information.

Abstract: A liquid crystal display device includes a pair of substrates, a liquid crystal between substrates and alignment layers disposed on the inner surface sides of the substrates. The alignment layer is made from a material including polyamic acid containing a diamine component and polyimide containing a diamine component different from the diamine component of the polyamic acid. The alignment layer is subjected to alignment treatment by irradiation of light. UV light can be irradiated in the oblique direction onto the alignment layer through a mask having openings. A reflecting plate can be arranged between a UV light source and the mask. Also, bank structures having a thickness from 0.1 to 0.15 ?m can be provided on the alignment layer of the TFT substrate.

Abstract: A heat dissipative structure that offers high heat dissipation effect with a simple configuration, an optical pickup apparatus having the same, and an optical recording/reproducing apparatus are provided. A heat-dissipating component is provided for a heat-producing component. Heat generated in the heat-producing component can be transferred to the heat-dissipating component and released therefrom. The heat-dissipating component has a heat-dissipating plate, whereby a large surface area and high heat dissipation effect is obtained. The heat-dissipating portion having the heat-dissipating plate is disposed in a region including a side opposite from a heat-receiving portion which receives heat from the heat-producing component, whereby heat is released at a location as far away from the heat-receiving portion as possible. The heat dissipative structure which offers high heat dissipation effect can be implemented with a simple configuration, and the heat-producing component can be cooled effectively.