Abstract: Methods and systems include generating, from an electron beam generator, an electron beam in a vacuum chamber. A mounting platform in the vacuum chamber is configured to support a material. The electron beam is directed at a surface region of the material at a grazing angle. A detector assembly, which may have an optical entry path positioned above the surface region, receives cathodoluminescent light emission arising from the electron beam transferring energy to the surface region. The detector assembly determines spectral characteristics of the cathodoluminescent light emission to characterize the surface region.

Abstract: In some embodiments, a semiconductor structure includes a first conductivity type region comprising a first superlattice, and an i-type active region adjacent to the first conductivity type region comprising an i-type superlattice. The first conductivity type region can be a p-type region or an n-type region. The first superlattice can be comprised of a plurality of first unit cells comprising a first set of single crystal layers, and the i-type superlattice can be comprised of a plurality of i-type unit cells comprising a second set of single crystal layers. An average alloy content of the plurality of the first unit cells and the i-type unit cells can be constant along a growth direction. The structure can be configured such that electrons and holes recombine to generate a spectrum of light with a longest wavelength peak that corresponds to a transition between electron and hole confined energy states within the i-type superlattice.

Abstract: Various forms of MgxGe1-xO2-x are disclosed, where the MgxGe1-xO2-x are epitaxial layers formed on a substrate comprising a substantially single crystal substrate material. The epitaxial layer of MgxGe1-xO2-x has a crystal symmetry compatible with the substrate material. Semiconductor structures and devices comprising the epitaxial layer of MgxGe1-xO2-x are disclosed, along with methods of making the epitaxial layers and semiconductor structures and devices. Also disclosed is single crystal MgxGe1-xO2-x, with x having a value of 0?x<1. The single crystal MgxGe1-xO2-x may comprise a dopant chosen from Ga, Al, Li+, N3+. The single crystal MgxGe1-xO2-x may comprise a p-type conductivity.

Abstract: In some embodiments, a composition of matter includes Li and F atoms within a single crystal Ga2O3 host including a monoclinic, orthorhombic, cubic, corundum, or hexagonal crystal symmetry, or within a single crystal LiGaO2 host including an orthorhombic or trigonal crystal symmetry. In some embodiments, a method includes sublimating a lithium fluoride (LiF) bulk crystal within a Knudsen cell to provide both Li and F and co-depositing the Li and F with an elemental Ga beam under an activated oxygen environment. The method can further include growing, on a growth surface of a substrate, an epitaxial layer including the Li, the F, the Ga, and the activated oxygen within an epitaxially formed Ga2O3 or LiGaO2 host.

Abstract: In some embodiments, an optoelectronic semiconductor light emitting device includes a single crystal LiF substrate and an optical emission region including an epitaxial oxide layer disposed on the substrate. The optical emission region can be configured to emit light having a wavelength in a range from 150 nm to 425 nm. In some embodiments, a semiconductor structure includes a single crystal LiF substrate and an epitaxial oxide layer disposed on the substrate, where the epitaxial layer includes MgxAl2(1?x)O3?2x or MgxGa2(1?x)O3?2x where 0?x?1, or a polar form of Ga2O3 with a hexagonal crystal symmetry.

Abstract: The present disclosure provides techniques for epitaxial oxide materials, structures and devices. In some embodiments, the techniques described herein relate to a transistor, including: a substrate including a first oxide material; an epitaxial oxide layer on the substrate including a second oxide material with a first bandgap; a gate layer on the epitaxial oxide layer, the gate layer including a third oxide material with a second bandgap, wherein the second bandgap is wider than the first bandgap; and electrical contacts. The second oxide material can include: one or two of Li, Ni, Al, Ga, Mg, and Zn; Ge; and O. The second oxide can also include (NixMgyZn1-x-y)2GeO4 wherein 0?x?1 and 0?y?1. The electrical contacts can include: a source electrical contact coupled to the epitaxial oxide layer; a drain electrical contact coupled to the epitaxial oxide layer; and a first gate electrical contact coupled to the gate layer.

Abstract: Various forms of MgxGe1?xO2?x are disclosed, where an epitaxial layer comprises single crystal MgxGe1?xO2?x, with x having a value of 0?x<1, wherein the single crystal MgxGe1?xO2?x has a crystal symmetry compatible with a substrate or with an underlying layer on which the single crystal MgxGe1?xO2?x is grown. Semiconductor structures and devices comprising the epitaxial layer of MgxGe1?xO2?x are disclosed, along with methods of making the epitaxial layers and semiconductor structures and devices.

Abstract: The present disclosure provides techniques for epitaxial oxide materials, structures and devices. In some embodiments, an integrated circuit includes a field effect transistor (FET) and a waveguide coupled to the FET, wherein the waveguide comprises a signal conductor. The FET can include: a substrate comprising a first oxide material; an epitaxial semiconductor layer on the substrate, the epitaxial semiconductor layer comprising a second oxide material with a first bandgap; a gate layer on the epitaxial semiconductor layer, the gate layer comprising a third oxide material with a second bandgap, wherein the second bandgap is wider than the first bandgap; and electrical contacts. The electrical contacts can include: a source electrical contact coupled to the epitaxial semiconductor layer; a drain electrical contact coupled to the epitaxial semiconductor layer; and a first gate electrical contact coupled to the gate layer.

Abstract: A semiconductor structure can comprise a plurality of first semiconductor layers comprising wide bandgap semiconductor layers, a narrow bandgap semiconductor layer, and a chirp layer between the plurality of first semiconductor layers and the narrow bandgap semiconductor layer. The values of overlap integrals between different electron wavefunctions in a conduction band of the chirp layer can be less than 0.1 for intersubband transition energies greater than 1.0 eV, and/or the values of overlaps between electron wavefunctions and barrier centers in a conduction band of the chirp layer can be less than 0.4 nm?1, when the structure is biased at an operating potential. The chirp layer can comprise a short-period superlattice with alternating wide bandgap barrier layers and narrow bandgap well layers, wherein the thickness of the barrier layers, or the well layers, or the thickness of both the barrier and well layers changes throughout the chirp layer.

Abstract: Embodiments disclose LEDs that operate using impact ionization. Devices include a first conductivity type layer having a first conductivity type, a first intrinsic layer, a charge layer, an impact ionization layer, and a contact layer. The charge layer has a net charge of the first conductivity type and has a material comprising a polar oxide or a non-polar oxide. The charge layer forms a barrier for transporting carriers of the first conductivity type until a bias is applied between the first conductivity type layer and the contact layer to flatten the barrier.

Abstract: In some embodiments, a semiconductor structure includes a first conductivity type region comprising a first superlattice, and an i-type active region adjacent to the first conductivity type region comprising an i-type superlattice. The first conductivity type region can be a p-type region or an n-type region. The first superlattice can be comprised of a plurality of first unit cells comprising a first set of single crystal layers, and the i-type superlattice can be comprised of a plurality of i-type unit cells comprising a second set of single crystal layers. An average alloy content of the plurality of the first unit cells and the i-type unit cells can be constant along a growth direction. A combined thickness of the second set single crystal layers can be thicker than a combined thickness of the first set of single crystal layers.

Abstract: Various forms of MgxGe1-xO2-x are disclosed, where the MgxGe1-xO2-x are epitaxial layers formed on a substrate comprising a substantially single crystal substrate material. The epitaxial layer of MgxGe1-xO2-x has a crystal symmetry compatible with the substrate material. Semiconductor structures and devices comprising the epitaxial layer of MgxGe1-xO2-x are disclosed, along with methods of making the epitaxial layers and semiconductor structures and devices.

Abstract: A semiconductor structure can comprise a plurality of first semiconductor layers comprising wide bandgap semiconductor layers, a narrow bandgap semiconductor layer, and a chirp layer between the plurality of first semiconductor layers and the narrow bandgap semiconductor layer. The values of overlap integrals between different electron wavefunctions in a conduction band of the chirp layer can be less than 0.05 for intersubband transition energies greater than 1.0 eV, and/or the values of overlaps between electron wavefunctions and barrier centers in a conduction band of the chirp layer can be less than 0.3 nm?1, when the structure is biased at an operating potential. The chirp layer can comprise a short-period superlattice with alternating wide bandgap barrier layers and narrow bandgap well layers, wherein the thickness of the barrier layers, or the well layers, or the thickness of both the barrier and well layers changes throughout the chirp layer.

Abstract: Resonant optical cavity light emitting devices are disclosed, where the device includes a substrate, a first spacer region, a light emitting region, a second spacer region, and a reflector. The light emitting region is configured to emit a target emission deep ultraviolet wavelength and is positioned at a separation distance from the reflector. The reflector may be a distributed Bragg reflector. The device has an optical cavity comprising the first spacer region, the second spacer region and the light emitting region, where the optical cavity has a total thickness less than or equal to K·?/n. K is a constant ranging from 0.25 to 10, ? is the target wavelength, and n is an effective refractive index of the optical cavity at the target wavelength.

Abstract: A light emitting device includes a first active layer on a substrate, a current spreading length, and a plurality of mesa regions on the first active layer. At least a first portion of the first active layer can comprise a first electrical polarity. Each mesa region can include, at least a second portion of the first active layer, a light emitting region on the second portion of the first active layer with a dimension parallel to the substrate smaller than twice the current spreading length, and a second active layer on the light emitting region. The light emitting region can be configured to emit light with a target wavelength from 200 nm to 300 nm. At least a portion of the second active layer can comprise a second electrical polarity.

Abstract: In some embodiments, a light emitting structure comprises a layered semiconductor stack comprising a first set of doped layers, a second layer, a light emitting layer positioned between the first set of doped layers and the second layer, and an electrical contact to the first set of doped layers. The first set of doped layers can comprise a first sub-layer, a second sub-layer, and a third sub-layer, wherein the third sub-layer is adjacent to the light emitting layer. The electrical contact can be coupled to the second sub-layer. The first, second and third sub-layers can be doped n-type, and an electrical conductivity of the second sub-layer can be higher than an electrical conductivity of the first and third sub-layers. The first, second and third sub-layers, the light emitting layer, and the second layer can each comprise a superlattice.

Abstract: In some embodiments, a semiconductor structure includes: a first epitaxial oxide semiconductor layer; a metal layer; and a contact layer adjacent to the metal layer, and between the first epitaxial oxide semiconductor layer and the metal layer. The contact layer can include an epitaxial oxide semiconductor material. The contact layer can also include a region comprising a gradient in a composition of the epitaxial oxide semiconductor material adjacent to the metal layer, or a gradient in a strain of the epitaxial oxide semiconductor material over a region adjacent to the metal layer.

Abstract: Methods and systems of heating a substrate in a vacuum deposition process include a resistive heater having a resistive heating element. Radiative heat emitted from the resistive heating element has a wavelength in a mid-infrared band from 5 ?m to 40 ?m that corresponds to a phonon absorption band of the substrate. The substrate comprises a wide bandgap semiconducting material and has an uncoated surface and a deposition surface opposite the uncoated surface. The resistive heater and the substrate are positioned in a vacuum deposition chamber. The uncoated surface of the substrate is spaced apart from and faces the resistive heater. The uncoated surface of the substrate is directly heated by absorbing the radiative heat.

Abstract: In some embodiments, a semiconductor structure includes: a first epitaxial oxide semiconductor layer; a metal layer; and a contact layer adjacent to the metal layer, and between the first epitaxial oxide semiconductor layer and the metal layer. The contact layer can include an epitaxial oxide semiconductor material. The contact layer can also include a region comprising a gradient in a composition of the epitaxial oxide semiconductor material adjacent to the metal layer, or a gradient in a strain of the epitaxial oxide semiconductor material over a region adjacent to the metal layer.

Abstract: In some embodiments, a semiconductor structure includes: a first epitaxial oxide semiconductor layer; a metal layer; and a contact layer adjacent to the metal layer, and between the first epitaxial oxide semiconductor layer and the metal layer. The contact layer can include an epitaxial oxide semiconductor material. The contact layer can also include a region comprising a gradient in a composition of the epitaxial oxide semiconductor material adjacent to the metal layer, or a gradient in a strain of the epitaxial oxide semiconductor material over a region adjacent to the metal layer.