Abstract: The present disclosure describes epitaxial oxide integrated circuits. In some embodiments, an integrated circuit comprises: a field effect transistor (FET), comprising: a substrate comprising a first oxide material; an epitaxial buried ground plane on the substrate and comprising a second oxide material; an epitaxial buried oxide layer on the epitaxial buried ground plane and comprising a third oxide material; an epitaxial semiconductor layer on the epitaxial buried oxide layer and comprising a fourth oxide material with a first bandgap; a gate layer on the epitaxial semiconductor layer and comprising a fifth oxide material with a second bandgap; electrical contacts; and a waveguide coupled to the field effect transistor. The waveguide can comprise: the epitaxial buried ground plane; the epitaxial buried oxide layer; and a signal conductor, wherein the epitaxial buried oxide layer is between the signal conductor and the epitaxial buried ground plane.

Abstract: The present disclosure provides techniques for epitaxial oxide materials, structures and devices. In some embodiments, a semiconductor structure includes an epitaxial oxide heterostructure, comprising: a substrate; a first epitaxial oxide layer comprising (Nix1Mgy1Zn1?x1?yl)2GeO4 wherein 0?x1?1 and 0?y1?1; and a second epitaxial oxide layer comprising (Nix2Mgy2Zn1?x2?y2)2GeO4 wherein 0?x2?1 and 0?y2?1. In some cases, either: x1?x2 and y1=y2; x1=x2 and y1?y2; or x1?x2 and y1?y2. In some embodiments, a semiconductor structure includes an epitaxial oxide heterostructure, comprising: a substrate; a first epitaxial oxide layer comprising (Mgx1Zn1?x1)(Aly1Ga1?y1)2O4 wherein 0?x1?1 and 0?y1?1; and a second epitaxial oxide layer comprising (Nix2Mgy2Zn1?x2?y2)2GeO4 wherein 0?x2?1 and 0?y2?1.

Abstract: A semiconductor structure can include a substrate comprising a first in-plane lattice constant, a graded layer on the substrate, and a first region of the graded layer comprising a first epitaxial oxide material comprising a second in-plane lattice constant. The graded layer on the substrate can include (Alx1Ga1?x1)y1Oz1, wherein x1 is from 0 to 1, wherein y1 is from 1 to 3, wherein z1 is from 2 to 4, and wherein x1 varies in a growth direction such that the graded layer has the first in-plane lattice constant adjacent to the substrate and a second in-plane lattice constant at a surface of the graded layer opposite the substrate. In some cases, a semiconductor structure includes a first region comprising a first epitaxial oxide material; a second region comprising a second epitaxial oxide material; and the graded region located between the first and the second regions.

Abstract: The present disclosure describes epitaxial oxide field effect transistors (FETs). In some embodiments, a FET comprises: a substrate comprising an oxide material; an epitaxial semiconductor layer on the substrate; a gate layer on the epitaxial semiconductor layer; and electrical contacts. In some cases, the epitaxial semiconductor layer can comprise a superlattice comprising a first and a second set of layers comprising oxide materials with a first and second bandgap. The gate layer can comprise an oxide material with a third bandgap, wherein the third bandgap is wider than the first bandgap. In some cases, the epitaxial semiconductor layer can comprise a second oxide material with a first bandgap, wherein the second oxide material comprises single crystal AxB1-xOn, wherein 0<x<1.0, wherein A is Al and/or Ga, wherein B is Mg, Ni, a rare earth, Er, Gd, Ir, Bi, or Li.

Abstract: Various forms of MgxGe1-xO2-x are disclosed, where the MgxGe1-xO2-x are epitaxial layers formed on a substrate comprising a substantially single crystal substrate material. The epitaxial layer of MgxGe1-xO2-x has a crystal symmetry compatible with the substrate material. Semiconductor structures and devices comprising the epitaxial layer of MgxGe1-xO2-x are disclosed, along with methods of making the epitaxial layers and semiconductor structures and devices.

Abstract: Embodiments disclose LEDs that operate using impact ionization. Devices include a first conductivity type layer, an intrinsic layer, and an impact ionization layer. In some embodiments, a charge layer is on the intrinsic layer, where the charge layer comprises a first material and has a net charge. The impact ionization layer comprises a second material. The charge layer forms a barrier for transporting carriers until a bias of at least 1.5 times a bandgap of the second material is applied, and a resulting electric field in the impact ionization layer is greater than or equal to a threshold for the second material. In some embodiments the first intrinsic layer is on the first conductivity type layer and is made of the first material, and a compositional step at an interface between the intrinsic layer and the impact ionization layer creates a barrier for transporting carriers.

Abstract: Various forms of MgxGe1-xO2-x are disclosed, where the MgxGe1-xO2-x are epitaxial layers formed on a substrate comprising a substantially single crystal substrate material. The epitaxial layer of MgxGe1-xO2-x has a crystal symmetry compatible with the substrate material. Semiconductor structures and devices comprising the epitaxial layer of MgxGe1-xO2-x are disclosed, along with methods of making the epitaxial layers and semiconductor structures and devices.

Abstract: In some embodiments, an optoelectronic semiconductor light emitting device includes: a substrate; and a plurality of epitaxial semiconductor layers disposed on the substrate. Each of the epitaxial semiconductor layers can comprise an epitaxial oxide. At least one of the epitaxial semiconductor layers can comprise an optically emissive material of direct bandgap type. At least one of the epitaxial semiconductor layers can comprise (Alx1Ga1?x1)2O3 wherein 0?x1?1. The plurality of epitaxial semiconductor layers can comprise: first region comprising a first conductivity type; a second region comprising a not-intentionally doped (NID) intrinsic region; and a third region comprising a second conductivity type. The substrate and the plurality of epitaxial semiconductor layers can be a substantially single crystal epitaxially formed device. The optoelectronic semiconductor light emitting device can be configured to emit light having a wavelength in a range from 150 nm to 425 nm.

Abstract: Systems and methods for forming semiconductor layers, including oxide-based layers, are disclosed in which a material deposition system has a rotation mechanism that rotates a substrate around a center axis of the substrate. The system includes a heater configured to heat the substrate and a positioning mechanism that allows dynamic adjusting of an orthogonal distance, a lateral distance, and a tilt angle of an exit aperture of a material source relative to the substrate. In some embodiments, the dynamic adjusting is based on a desired layer uniformity for a desired layer growth rate. In some embodiments, the orthogonal distance, the lateral distance, or the tilt angle depends on a predetermined material ejection spatial distribution of the material source.

Abstract: In some embodiments, a light emitting structure comprises a layered semiconductor stack comprising a first set of doped layers, a second layer, a light emitting layer positioned between the first set of doped layers and the second layer, and an electrical contact to the first set of doped layers. The first set of doped layers can comprise a first sub-layer, a second sub-layer, and a third sub-layer, wherein the third sub-layer is adjacent to the light emitting layer. The electrical contact can be coupled to the second sub-layer. The first, second and third sub-layers can be doped n-type, and an electrical conductivity of the second sub-layer can be higher than an electrical conductivity of the first and third sub-layers. The first, second and third sub-layers, and the light emitting layer can each comprise a superlattice. The second layer can comprise a chirped superlattice.

Abstract: An optoelectronic semiconductor light emitting device configured to emit light having a wavelength in the range from about 150 nm to about 425 nm is disclosed. In embodiments, the device comprises a substrate having at least one epitaxial semiconductor layer disposed thereon, wherein each of the one or more epitaxial semiconductor layers comprises a metal oxide. At least one of the epitaxial semiconductor layers can include single crystal AxB1-xOn, where: 0<x<1.0; A is Al and/or Ga; and B is Mg, Ni, a rare earth, Er, Gd, Ir, Bi, or Li.

Abstract: An optoelectronic semiconductor light emitting device configured to emit light having a wavelength in the range from about 150 nm to about 425 nm is disclosed. In embodiments, the device comprises a substrate having at least one epitaxial semiconductor layer disposed thereon, wherein each of the one or more epitaxial semiconductor layers comprises a metal oxide. An epitaxial semiconductor layer of the device can include a first single crystal oxide material. The first single crystal oxide material can include: at least one of magnesium, nickel, and zinc; at least one of aluminum and gallium; and oxygen. The first single crystal oxide material can also include a cubic crystal symmetry.

Abstract: In some embodiments, a semiconductor structure includes a first conductivity type region comprising a first superlattice, and an i-type active region adjacent to the first conductivity type region comprising an i-type superlattice. The first conductivity type region can be a p-type region or an n-type region. The first superlattice can be comprised of a plurality of first unit cells comprising a first set of single crystal layers, and the i-type superlattice can be comprised of a plurality of i-type unit cells comprising a second set of single crystal layers. An average alloy content of the plurality of the first unit cells and the i-type unit cells can be constant along a growth direction. A combined thickness of the second set single crystal layers can be thicker than a combined thickness of the first set of single crystal layers.

Abstract: An optoelectronic semiconductor light emitting device configured to emit light having a wavelength in the range from about 150 nm to about 425 nm is disclosed. In embodiments, the device comprises a substrate having at least one epitaxial semiconductor layer disposed thereon, wherein each of the one or more epitaxial semiconductor layers comprises a metal oxide. Also disclosed is an optoelectronic semiconductor device for generating light of a predetermined wavelength comprising a substrate and an optical emission region. The optical emission region has an optical emission region band structure configured for generating light of the predetermined wavelength and comprises one or more epitaxial metal oxide layers supported by the substrate.

Abstract: In some embodiments, a light emitting structure comprises a layered semiconductor stack comprising a first set of doped layers, a second layer, a light emitting layer positioned between the first set of doped layers and the second layer, and an electrical contact to the first set of doped layers. The first set of doped layers can comprise a first sub-layer, a second sub-layer, and a third sub-layer, where the third sub-layer is adjacent to the light emitting layer. The electrical contact to the first set of doped layers can be made to the second sub-layer. The first, second and third sub-layers can be doped n-type, and an electrical conductivity of the second sub-layer can be higher than an electrical conductivity of the first and third sub-layers. In some cases, the second sub-layer can absorb more light emitted from the light emitting layer than the first or third sub-layers.

Abstract: An optoelectronic device comprising a semiconductor structure includes a p-type active region, an n-type active region, and an i-type active region. The semiconductor structure is comprised solely of one or more superlattices, where each superlattice is comprised of a plurality of unit cells. Each unit cell can comprise a layer of GaN and a layer of AlN. In some cases, a combined thickness of the layers comprising the unit cells in the i-type active region is thicker than a combined thickness of the unit cells in the n-type active region, and is thicker than a combined thickness of the unit cells in the p-type active region. The layers in the unit cells in each of the three regions can all have thicknesses that are less than or equal to a critical layer thickness required to maintain elastic strain.

Abstract: Systems and methods for forming semiconductor layers, including oxide-based layers, are disclosed in which a material deposition system has a rotation mechanism that rotates a substrate around a center axis of a substrate deposition plane of the substrate. A material source that supplies a material to the substrate has i) an exit aperture with an exit aperture plane and ii) a predetermined material ejection spatial distribution from the exit aperture plane. The exit aperture is positioned at an orthogonal distance, a lateral distance, and a tilt angle relative to the center axis of the substrate. The system can be configured for either i) minimum values for the orthogonal distance and the lateral distance to achieve a desired layer deposition uniformity using a set tilt angle, or ii) the tilt angle to achieve the desired layer deposition uniformity using a set orthogonal distance and a set lateral distance.

Abstract: An optoelectronic device comprising a semiconductor structure includes a p-type active region, an n-type active region, and an i-type active region. The semiconductor structure is comprised solely of one or more superlattices, where each superlattice is comprised of a plurality of unit cells. Each unit cell can comprise a layer of GaN and a layer of AlN. In some cases, a combined thickness of the layers comprising the unit cells in the i-type active region is thicker than a combined thickness of the unit cells in the n-type active region, and is thicker than a combined thickness of the unit cells in the p-type active region. The layers in the unit cells in each of the three regions can all have thicknesses that are less than or equal to a critical layer thickness required to maintain elastic strain.

Abstract: Semiconductor structures and methods for forming those semiconductor structures are disclosed. For example, a semiconductor structure with a p-type superlattice region, an i-type superlattice region, and an n-type superlattice region is disclosed. The semiconductor structure can have a polar crystal structure with a growth axis that is substantially parallel to a spontaneous polarization axis of the polar crystal structure. In some cases, there are no abrupt changes in polarisation at interfaces between each region. At least one of the p-type superlattice region, the i-type superlattice region and the n-type superlattice region can comprise a plurality of unit cells exhibiting a monotonic change in composition from a wider band gap (WBG) material to a narrower band gap (NBG) material or from a NBG material to a WBG material along the growth axis to induce p-type or n-type conductivity.

Abstract: A method for manufacturing a light emitting device can include providing a substrate; forming a first active layer with a first electrical polarity; forming a light emitting region configured to emit light with a target wavelength between 200 nm and 300 nm; forming a second active layer with a second electrical polarity; forming a first electrical contact layer, optionally comprising a first optical reflector; removing a portion of the first electrical contact layer, the second active layer, the light emitting region, and the first active layer to form a plurality of mesas; and forming a second electrical contact layer. Each mesa can include a mesa width smaller than 10 times the target wavelength that confines the emitted light from the light emitting region to fewer than 10 transverse modes, or a mesa width smaller than twice a current spreading length of the light emitting device.