Patents Assigned to Silicon Graphics, Inc.
  • Publication number: 20070106850
    Abstract: A method and apparatus for maintaining data coherency in a computer system having a plurality of nodes forms a directory by grouping the nodes into a plurality of hierarchical groups of two or more levels. The method and apparatus also 1) set the directory to have data relating to a first set of groups within a first level, and 2) determine if a requesting node requesting data is a member of one of the first set of groups. The directory then is set to have data relating to a second group of nodes if the requesting node is determined not to be a member of the first set of groups within the first level. The second group of nodes is in a higher level than the first level.
    Type: Application
    Filed: November 7, 2005
    Publication date: May 10, 2007
    Applicant: Silicon Graphics, Inc.
    Inventors: Donglai Dai, Randal Passint
  • Patent number: 7212204
    Abstract: A method is disclosed for culling an object database in a graphics processing system. In one embodiment, the method comprises encoding per-object parameters and culling parameters. The per-object parameters are encoded in texture format thereby creating at least one per-object texture containing the encoded per-object parameters. Next, a fragment program used in a fragment processor of the GPU is optionally updated. The updated fragment program embodies a culling operation. A polygon is then rendered, wherein the rendering step includes per-fragment operations. During the per-fragment operations, the updated fragment program is executed. The culling operation embodied therein (i) accesses the culling parameter, (ii) samples the per-object textures, and (iii) produces cull results for a set of database objects. In this fashion, the fragment processor in the GPU is leveraged to perform computationally intensive culling operations.
    Type: Grant
    Filed: January 27, 2005
    Date of Patent: May 1, 2007
    Assignee: Silicon Graphics, Inc.
    Inventor: Paolo Farinelli
  • Publication number: 20070085816
    Abstract: A system and method are described herein for controlling the white balance and providing gamma correction without compromising gray-scale dynamic range in a flat panel liquid crystal display (LCD). According to one embodiment of the present invention, the flat panel LCD includes electronic circuitry for coupling to a host computer to receive a white-balance adjustment control signal, and electronic circuitry for receiving image data to be rendered on the flat panel LCD. Further, the flat panel LCD of one embodiment is configured for coupling to a color-sensing device to receive optical characteristics data of the flat panel LCD detected by the color-sensing device. The white balance adjustment mechanisms include the provision of two or more light sources of differing color temperature, whose brightness can be independently varied (and distributed through a light distribution mechanism) to adjust color temperature without altering the grayscale resolution of the RGB colors.
    Type: Application
    Filed: November 14, 2006
    Publication date: April 19, 2007
    Applicant: Silicon Graphics, Inc.
    Inventors: Daniel Evanicky, Oscar Medina
  • Publication number: 20070080716
    Abstract: An apparatus for controlling a hot plug bus slot on a bus has an input for receiving a set of float signals (i.e., the set may have one or more float signals), and a driver having an output electrically couplable with the bus. The apparatus also has float logic operatively coupled with the input. The float logic is responsive to the set of float signals to cause the output to float at a high impedance in response to receipt of the set of float signals.
    Type: Application
    Filed: September 26, 2005
    Publication date: April 12, 2007
    Applicant: Silicon Graphics, Inc.
    Inventors: Bruce Strangfeld, Thomas McGee
  • Patent number: 7197589
    Abstract: A computer system (10) includes a bus controller (12), a bus (14), a plurality of processing devices (16) and a plurality of enabling switches (18). Each enabling switch (18) corresponds to a separate one of the processing devices (16). Each processing device (16) sends an access request (24) to arbitration logic (22) in the bus controller (12), requesting access to the bus (14). The arbitration logic (22) selects one of the access requests (24) according to a priority protocol. The arbitration logic (22) generates a control signal (20) associated with the selected access request (24). The control signal (20) is provided to the enabling switch (18) corresponding to the processing device (16) that sent the selected access request (24). The enabling switch (18) enables access to the bus (14) for the processing device (16) in response to the control signal (20).
    Type: Grant
    Filed: May 21, 1999
    Date of Patent: March 27, 2007
    Assignee: Silicon Graphics, Inc.
    Inventors: Martin M. Deneroff, Steven C. Miller
  • Patent number: 7181589
    Abstract: An address translation unit generates a physical address for access to a memory from a virtual address using either a translation lookaside buffer or a segmentation buffer. If the virtual address falls within a predetermined range, the address translation unit will use the segmentation buffer to generate the physical address. Upon generation of the physical address, the memory will either receive data from or provide data to a processor in accordance with the instructions being processed by the processor.
    Type: Grant
    Filed: April 30, 2004
    Date of Patent: February 20, 2007
    Assignee: Silicon Graphics, Inc.
    Inventors: Steven C. Miller, Martin M. Deneroff, Curt F. Schimmel, John Carter, Lixin Zhang, Michael Parker
  • Patent number: 7174437
    Abstract: In one embodiment, an apparatus includes a requester node to transmit a request for data in a memory. The apparatus also includes a service node that includes the memory. The service node receives the request for the data, wherein the service node is to set a congestion flag in response to the request sent back to the requester node upon determining that access to the data is congested. The requester node is to freeze priority updates for the data upon receipt of the congestion flag.
    Type: Grant
    Filed: October 16, 2003
    Date of Patent: February 6, 2007
    Assignee: Silicon Graphics, Inc.
    Inventor: Tomasz Kaczynski
  • Publication number: 20070018990
    Abstract: A plurality of vertex or fragment processors on a graphics processor perform computations. Each vertex or fragment processor is capable of executing a separate program to compute a specific result. A combiner manages the combination of the results from the respective processors, and produces a final transformed vertex or pixel value. The vertex or fragment processors and the combiner can be programmable to modify their operations. As such, the vertex or fragment processors can operate in a parallel or serial configuration, or both. The combiner manages and resolves the operations of the serial and/or parallel configurations. A synchronization barrier enables the combiner to perform data-dependency analysis to determine the timing and ordering of the respective processors' execution. A transformation module can include one or more programmable vertex processors that transforms three-dimensional geometric data into fragments.
    Type: Application
    Filed: July 19, 2005
    Publication date: January 25, 2007
    Applicant: Silicon Graphics, Inc.
    Inventor: David Shreiner
  • Patent number: 7167523
    Abstract: A method and apparatus for providing efficient and accurate electronic data transmission of information on a data bus in the presence of noise. Data signals are received on a plurality of input lines by a spacial derivative encoder. The spacial derivative encoder encodes the signals and transmits them to a receiver having a spacial derivative decoder. The spacial derivative decoder then decodes the signals. Minimal overhead is required as for n input lines only n+1 lines are needed to transmit each of the encoded signals.
    Type: Grant
    Filed: June 13, 2002
    Date of Patent: January 23, 2007
    Assignee: Silicon Graphics, Inc.
    Inventor: Daniel C. Mansur
  • Patent number: 7168049
    Abstract: A system and method for allocating computing resources. The system obtains a current set of connections from the matrix switch and then renders a display which reflects the current state of the connections. Source and destination ports are displayed as icons with each icon bearing a label that describes the corresponding source or destination. In some embodiments, a user clicks on a source icon and drags it onto a destination icon to route a particular source to a destination. Dragging a source icon off of a destination icon breaks the connection between the source and destination. The display uses a variety of icons, colors, and grouping schemes to indicate other attributes of the ports, such information regarding X Server configuration, physical location of destination devices, and user login sessions.
    Type: Grant
    Filed: June 18, 2002
    Date of Patent: January 23, 2007
    Assignee: Silicon Graphics, Inc.
    Inventor: Brian Andrew Day
  • Patent number: 7158132
    Abstract: A method and apparatus for processing a primitive (for potential display as a part of a graphical image on a display device) cause attribute data to be received by a graphics processor as a function of whether the primitive is capable of being viewable in the graphical image on the display device. Before taking that action, however, the method and apparatus assemble the primitive as a function of its positional data, and then determine if the primitive is capable of being viewable in the graphical image on the display device.
    Type: Grant
    Filed: November 18, 2003
    Date of Patent: January 2, 2007
    Assignee: Silicon Graphics, Inc.
    Inventors: Stephen Moffitt, Eng Lim Goh
  • Patent number: 7140024
    Abstract: A system and method for managing graphics applications include the capability to manage the conveyance of graphics data from an aware graphics application to a plurality of graphics pipes and to manage the conveyance of graphics data from an unaware graphics application to a plurality of graphics pipes. The system and method also include the capability to coherently manage the windows for aware and unaware applications.
    Type: Grant
    Filed: July 29, 2002
    Date of Patent: November 21, 2006
    Assignee: Silicon Graphics, Inc.
    Inventors: Alpana R. Kaulgud, William J. Feth, Christophe Winkler
  • Patent number: 7138989
    Abstract: A display is capable of displaying images in response to signals of a plurality of signal formats. The display includes a controller that is coupled to a plurality of image data interfaces. When the plurality of image data interfaces are simultaneously operating, the controller selects one of the plurality of image data interfaces according to preference variables associated with each of the plurality of image data interfaces. Each of the preference variables may indicate a relative priority of an image data signal format associated with the corresponding image data interface. In addition, each of the preference variables may indicate one or more performance metrics associated with the quality of image data signals received from the corresponding image data interface.
    Type: Grant
    Filed: July 25, 2003
    Date of Patent: November 21, 2006
    Assignee: Silicon Graphics, Inc.
    Inventors: Jonathan D. Mendelson, Oscar I. Medina, Susan R. Poniatowski
  • Patent number: 7136076
    Abstract: A system and method are described herein for controlling the white balance and providing gamma correction without compromising gray-scale dynamic range in a flat panel liquid crystal display (LCD). According to one embodiment of the present invention, the flat panel LCD includes electronic circuitry for coupling to a host computer to receive a white-balance adjustment control signal, and electronic circuitry for receiving image data to be rendered on the flat panel LCD. Further, the flat panel LCD of one embodiment is configured for coupling to a color-sensing device to receive optical characteristics data of the flat panel LCD detected by the color-sensing device. The white balance adjustment mechanisms include the provision of two or more light sources of differing color temperature, whose brightness can be independently varied (and distributed through a light distribution mechanism) to adjust color temperature without altering the grayscale resolution of the RGB colors.
    Type: Grant
    Filed: August 25, 2003
    Date of Patent: November 14, 2006
    Assignee: Silicon Graphics, Inc.
    Inventors: Daniel E. Evanicky, Oscar Ivan Medina
  • Publication number: 20060250772
    Abstract: A liquid cooled heat sink for electronic circuit boards is described. A heat sink base includes a liquid cooling arrangement to remove heat from the base. An arrangement of cooling fins extends from the base, and at least one surface of each fin includes a thermal interface layer. The arrangement is adapted so that the fins fit between parallel electronic circuit boards such that for each circuit board, a thermal contact layer of a fin contacts multiple components on the circuit board so as to conduct heat from the components into the fin, which in turn transfers heat to the heat sink base.
    Type: Application
    Filed: May 4, 2005
    Publication date: November 9, 2006
    Applicant: Silicon Graphics, Inc.
    Inventors: Richard Salmonson, Scott Robinson, Timothy McCann, David Collins
  • Patent number: 7124505
    Abstract: A cable connector backshell assembly for high frequency applications requiring reduced electromagnetic emissions. Aspects include providing sufficient physical spacing and electrical isolation between the signal conductors and the housing to meet EMI standards for HIPPI-6400 connector assemblies. One embodiment includes spring preloading of the electrical connector. One embodiment includes a longitudinally floating connector.
    Type: Grant
    Filed: July 24, 2002
    Date of Patent: October 24, 2006
    Assignee: Silicon Graphics, Inc.
    Inventors: Duane Friesen, Val Mandrusov
  • Publication number: 20060227245
    Abstract: Multiple media devices are synchronized in a multi-media system having a computer system, a plurality of media devices, and a display system. Each media device to be synchronized receives a front-end synchronization signal that periodically increments a front-end counter. The front-end counter represents an unadjusted system time (UST). The media device obtains a frame of data to be displayed from a computer system. The media device also receives a back-end synchronization signal that periodically increments a back-end counter each time a frame of data is to be displayed. The back-end counter represents a media stream count (MSC). UST and MSC data are periodically transmitted to the computer system for analysis and use by a synchronization algorithm. Specifically, UST is transmitted to the computer system each time a frame of data is obtained, and a UST/MSC pair is transmitted to the computer system each time a frame of data is displayed.
    Type: Application
    Filed: April 11, 2005
    Publication date: October 12, 2006
    Applicant: Silicon Graphics, Inc.
    Inventors: Michael Poimboeuf, Francis Bernard, Kevin Smith, Parkson Wong, Todd Stock, William Lawson
  • Patent number: 7120906
    Abstract: A method and computer program product, within an optimizing compiler, for precise feedback data generation and updating. The method and computer program uses instrumentation and annotation of frequency values to allow feedback data to stay current during the multiple optimizations that the program code undergoes during compilation. Global propagation of known precise feedback values are used to replace approximate and unavailable values, and global verification of feedback data after optimization to detect discrepancies is employed. The method and computer program also provides improved instrumentation to anticipate cloning when code is cloned during ceratin compiler optimizations and handles inlined procedures. The result is compiled executables with improved SPECint benchmarks.
    Type: Grant
    Filed: April 28, 2000
    Date of Patent: October 10, 2006
    Assignee: Silicon Graphics, Inc.
    Inventors: David L. Stephenson, Raymond Lo, Sun Chan, Wilson Ho, Chandrasekhar Murthy
  • Patent number: 7100018
    Abstract: A system and method for encoding page size information has been described herein. In one embodiment, the method includes determining whether a virtual address is stored in a translation lookaside buffer (TLB), the TLB including a plurality of entries, wherein the entries include a minimum virtual page number bit string and a variable bit string. In one embodiment the method also includes determining whether the first bit string matches the minimum virtual page number bit string of one of the entries. In one embodiment, if the first bit string matches the minimum virtual page number bit string of one of the entries, the method includes decoding a page size stored in the variable portion of the matching entry and a 1-bit field associated with the matching entry, wherein the decoding determines a set of bits of the variable bit string.
    Type: Grant
    Filed: July 31, 2003
    Date of Patent: August 29, 2006
    Assignee: Silicon Graphics, Inc.
    Inventors: David Zhang, Mahdi Seddighnezhad
  • Patent number: 7092983
    Abstract: A computerized method for remotely rendering a render job includes receiving a render job submitted by a client at a first rendering site, the render job associated with at least one file stored at the first rendering site. The file stores information necessary to render the render job. The method also includes transferring the render job from the first rendering site to a second rendering site, the second site remote from the first site. The method further includes transmitting a copy of the associated file from the first rendering site to the second rendering site, storing the copy of the associated file at the second rendering site in a secure location inaccessible to entities other than the client, and rendering the render job by one or more render servers at the second rendering site.
    Type: Grant
    Filed: June 30, 2000
    Date of Patent: August 15, 2006
    Assignee: Silicon Graphics, Inc.
    Inventor: D'Arey M. Tyrrell, III