Abstract: A system, method, and computer program product are provided for remote rendering of computer graphics. The system includes a graphics application program resident at a remote server. The graphics application is invoked by a user or process located at a client. The invoked graphics application proceeds to issue graphics instructions. The graphics instructions are received by a remote rendering control system. Given that the client and server differ with respect to graphics context and image processing capability, the remote rendering control system modifies the graphics instructions in order to accommodate these differences. The modified graphics instructions are sent to graphics rendering resources, which produce one or more rendered images. Data representing the rendered images is written to one or more frame buffers. The remote rendering control system then reads this image data from the frame buffers. The image data is transmitted to the client for display or processing.

Abstract: The present invention is a system that grids original data, maps the data at the grid locations to height values at corresponding landscape image pixel locations and renders the landscape pixels into a three-dimensional (3D) landscape image. The landscape pixels can have arbitrary shapes and can be augmented with additional 3D information from the original data, such as an offset providing additional information, or generated from processing of the original data, such as to alert when a threshold is exceeded, or added for other purposes such as to point out a feature. The pixels can also convey additional information from the original data using other pixel characteristics such as texture, color, transparency, etc.

Abstract: This application describes a system that captures 3D geometry commands from a first 3D graphics process and stores them in a shared memory. A second 3D environment process creates a 3D display environment using a display and display hardware. A third process obtains the 3D commands and supplies them to the hardware to place 3D objects in the 3D environment. The result is a fused display environment where 3D objects are displayed along with other display elements. Input events in the environment are analyzed and mapped to the 3D graphics process or the environment where they affect corresponding processing.

Abstract: A method is disclosed for culling an object database in a graphics processing system. In one embodiment, the method comprises encoding per-object parameters and culling parameters. The per-object parameters are encoded in texture format thereby creating at least one per-object texture containing the encoded per-object parameters. Next, a fragment program used in a fragment processor of the GPU is optionally updated. The updated fragment program embodies a culling operation. A polygon is then rendered, wherein the rendering step includes per-fragment operations. During the per-fragment operations, the updated fragment program is executed. The culling operation embodied therein (i) accesses the culling parameter, (ii) samples the per-object textures, and (iii) produces cull results for a set of database objects. In this fashion, the fragment processor in the GPU is leveraged to perform computationally intensive culling operations.

Abstract: A system that, at a process checkpoint, pauses the process to copy the system state for the process and then copies pages of the process in memory to disk storage while the process continues to run. When a write to a page by the process is to occur that requires a translation from a virtual address to a physical address the write is intercepted. The page that is being modified is duplicated and then the process is allowed to modify the page and continue. The duplicate page is then stored as part of the checkpoint copy.

Abstract: The present invention is directed toward a communications channel comprising a link level protocol, a driver, a receiver, and a canceller/equalizer. The link level protocol provides logic for DC-free signal encoding and recovery as well as supporting many features including CRC error detection and message resend to accommodate infrequent bit errors across the medium. The canceller/equalizer provides equalization for destabilized data signals and also provides simultaneous bi-directional data transfer. The receiver provides bit deskewing by removing synchronization error, or skewing, between data signals. The driver provides impedance controlling by monitoring the characteristics of the communications medium, like voltage or temperature, and providing a matching output impedance in the signal driver so that fewer distortions occur while the data travels across the communications medium.

Abstract: Apparatus, methods, data structures, and systems are provided for subdividing input data associated with a first software program into job quanta, wherein each job quantum is operable to be executed by a separate software program residing on a different processing element from the first software program. The first software program and the separate software program execute substantially in parallel and output data associated with the executions of the programs are assembled into a single coherent presentation or results data. Moreover, the software programs may be threaded or non-threaded.

Abstract: A cpu-set type multiprocessor system allows a cpu of a cpu-set that has a hardware exception to disable itself and notify the system. The system assigns processes of the cpu-set that include the problem cpu to another cpu-set. The disabling of the problem cpu and transfer of the related processes to another cpu-set allows the system to failsoft so that other cpu-sets the multiprocessor system can continue to run and a recovery of the processes being run on the problem cpu-set occurs.

Abstract: A method for communicating video data is provided that includes generating a plurality of error correction code bits and positioning the error correction code bits in a stream of image data such that the stream of image data is encoded. The stream of image data may then be received and encoded in order to convert the stream of image data into a digital visual interface (DVI) format. The stream of image data may then be decoded such that the stream of image data may be displayed in the DVI format. The stream of image data may then be received and checked for one or more errors using the error correction code bits.

Abstract: The present invention is a system that receives data in different formats from different devices/applications in the format native to the devices/applications and fuses the data into a common shared audio/video collaborative environment including a composite display showing the data from the different sources in different areas of the display and composite audio. The common environment is presented to users who can be at remote locations. The users are allowed to supply a control input for the different device data sources and the control input is mapped back to the source, thereby controlling the source. The location of the control input on the remote display is mapped to the storage area for that portion of the display and the control data is transmitted to the corresponding device/application.

Abstract: A modular computer system includes at least two processing functional modules each including a processing unit adapted to process data and adapted to input/output data to other functional modules through at least two ports with each port including a plurality of data lines. At least one routing functional module is adapted to route data and adapted to input/output data to other functional modules through at least two ports with each port including a plurality of data lines. At least one input or output functional module is adapted to input or output data and adapted to input/output data to other functional modules through at least one port including a plurality of data lines. Each processing, routing and input or output functional module includes a local controller adapted to control the local operation of the associated functional module, wherein the local controller is adapted to input and output control information over control lines connected to the respective ports of its functional module.

Abstract: A method and apparatus for maintaining data coherency in a computer system having a plurality of nodes forms a directory by grouping the nodes into a plurality of hierarchical groups of two or more levels. The method and apparatus also 1) set the directory to have data relating to a first set of groups within a first level, and 2) determine if a requesting node requesting data is a member of one of the first set of groups. The directory then is set to have data relating to a second group of nodes if the requesting node is determined not to be a member of the first set of groups within the first level. The second group of nodes is in a higher level than the first level.

Abstract: A method is disclosed for culling an object database in a graphics processing system. In one embodiment, the method comprises encoding per-object parameters and culling parameters. The per-object parameters are encoded in texture format thereby creating at least one per-object texture containing the encoded per-object parameters. Next, a fragment program used in a fragment processor of the GPU is optionally updated. The updated fragment program embodies a culling operation. A polygon is then rendered, wherein the rendering step includes per-fragment operations. During the per-fragment operations, the updated fragment program is executed. The culling operation embodied therein (i) accesses the culling parameter, (ii) samples the per-object textures, and (iii) produces cull results for a set of database objects. In this fashion, the fragment processor in the GPU is leveraged to perform computationally intensive culling operations.

Abstract: A system and method are described herein for controlling the white balance and providing gamma correction without compromising gray-scale dynamic range in a flat panel liquid crystal display (LCD). According to one embodiment of the present invention, the flat panel LCD includes electronic circuitry for coupling to a host computer to receive a white-balance adjustment control signal, and electronic circuitry for receiving image data to be rendered on the flat panel LCD. Further, the flat panel LCD of one embodiment is configured for coupling to a color-sensing device to receive optical characteristics data of the flat panel LCD detected by the color-sensing device. The white balance adjustment mechanisms include the provision of two or more light sources of differing color temperature, whose brightness can be independently varied (and distributed through a light distribution mechanism) to adjust color temperature without altering the grayscale resolution of the RGB colors.

Abstract: An apparatus for controlling a hot plug bus slot on a bus has an input for receiving a set of float signals (i.e., the set may have one or more float signals), and a driver having an output electrically couplable with the bus. The apparatus also has float logic operatively coupled with the input. The float logic is responsive to the set of float signals to cause the output to float at a high impedance in response to receipt of the set of float signals.

Abstract: A computer system (10) includes a bus controller (12), a bus (14), a plurality of processing devices (16) and a plurality of enabling switches (18). Each enabling switch (18) corresponds to a separate one of the processing devices (16). Each processing device (16) sends an access request (24) to arbitration logic (22) in the bus controller (12), requesting access to the bus (14). The arbitration logic (22) selects one of the access requests (24) according to a priority protocol. The arbitration logic (22) generates a control signal (20) associated with the selected access request (24). The control signal (20) is provided to the enabling switch (18) corresponding to the processing device (16) that sent the selected access request (24). The enabling switch (18) enables access to the bus (14) for the processing device (16) in response to the control signal (20).

Abstract: An address translation unit generates a physical address for access to a memory from a virtual address using either a translation lookaside buffer or a segmentation buffer. If the virtual address falls within a predetermined range, the address translation unit will use the segmentation buffer to generate the physical address. Upon generation of the physical address, the memory will either receive data from or provide data to a processor in accordance with the instructions being processed by the processor.

Abstract: In one embodiment, an apparatus includes a requester node to transmit a request for data in a memory. The apparatus also includes a service node that includes the memory. The service node receives the request for the data, wherein the service node is to set a congestion flag in response to the request sent back to the requester node upon determining that access to the data is congested. The requester node is to freeze priority updates for the data upon receipt of the congestion flag.

Abstract: A plurality of vertex or fragment processors on a graphics processor perform computations. Each vertex or fragment processor is capable of executing a separate program to compute a specific result. A combiner manages the combination of the results from the respective processors, and produces a final transformed vertex or pixel value. The vertex or fragment processors and the combiner can be programmable to modify their operations. As such, the vertex or fragment processors can operate in a parallel or serial configuration, or both. The combiner manages and resolves the operations of the serial and/or parallel configurations. A synchronization barrier enables the combiner to perform data-dependency analysis to determine the timing and ordering of the respective processors' execution. A transformation module can include one or more programmable vertex processors that transforms three-dimensional geometric data into fragments.

Abstract: A method and apparatus for providing efficient and accurate electronic data transmission of information on a data bus in the presence of noise. Data signals are received on a plurality of input lines by a spacial derivative encoder. The spacial derivative encoder encodes the signals and transmits them to a receiver having a spacial derivative decoder. The spacial derivative decoder then decodes the signals. Minimal overhead is required as for n input lines only n+1 lines are needed to transmit each of the encoded signals.