Abstract: A method and system for resolving virtual addresses using a page size tag are described herein. In one embodiment, the method comprises translating a virtual memory address into physical memory address. According to the method, the translating includes producing a first page size tag and choosing an entry in a translation lookaside buffer, wherein the entry stores a second page size tag and a page frame number. The method also includes comparing the first page size tag with the second page size tag. The method also includes using the page frame number to form the physical memory address, if the first page size tag is less than or equal to the second page size tag.

Abstract: A modular computing system that includes an enclosure, a rack mounted inside the enclosure and a plurality of modular bricks. The modular bricks each include electronic components and are supported by the rack. The computing system further includes a floor tile supporting the enclosure. The floor tile includes a plurality of fans that exchange air with each of the modular bricks to cool the electronic components in each modular brick.

Abstract: A method is disclosed for culling an object database in a graphics processing system. In one embodiment, the method comprises encoding per-object parameters and culling parameters. The per-object parameters are encoded in texture format thereby creating at least one per-object texture containing the encoded per-object parameters. Next, a fragment program used in a fragment processor of the GPU is optionally updated. The updated fragment program embodies a culling operation. A polygon is then rendered, wherein the rendering step includes per-fragment operations. During the per-fragment operations, the updated fragment program is executed. The culling operation embodied therein (i) accesses the culling parameter, (ii) samples the per-object textures, and (iii) produces cull results for a set of database objects. In this fashion, the fragment processor in the GPU is leveraged to perform computationally intensive culling operations.

Abstract: A processor capable of executing prefetching instructions containing hint fields is provided. The hint fields contain a first portion which enables the selection of a destination indicator for refill operations, and a second portion which identifies a destination.

Abstract: A method and system for managing memory in a multiprocessor system includes defining the plurality of processor coherence domains within a system coherence domain of the multiprocessor system. The processor coherence domains each include a plurality of processors and a processor memory. Shared access to data in the processor memory of each processor coherence domain is provided only to elements of the multiprocessor system within the processor coherence domain. Non-shared access to data in the processor memory of each processor coherence domain is provided to elements of the multiprocessor system within and outside of the processor coherence domain.

Abstract: A compact flat panel color calibration system includes a lens prism optic able to pass a narrow, perpendicular, and uniform cone angle of incoming light to a spectrally non-selective photodetector. The calibration system also includes a microprocessor operable to determine the luminance of the display based upon the information gathered by the photodetector. A software module included in the calibration system is then operable to process the luminance information in order to adjust the flat panel display.

Abstract: The present invention provides an improved system and method for rendering shadows in a computer graphics system. Textures representing the area of influence resulting from a combination of light sources and shadow casters are pre-computed. Scenes are then rendered using the pre-computed textures. A first step entails generating sets of directions and associated pre-computed textures for each light source and shadow caster pair in a simulation frame. Next, a first scene in the simulation is rendered. During this step one or more of the pre-computed textures are used to darken the area of influence or shadow portion of the scene.

Abstract: A computerized method for rendering images includes receiving a render job having at least one render frame and an associated job profile and inserting the render job into a job queue. The method also includes advancing the render job in the job queue as other render jobs are removed from the job queue, distributing the render frames via a communications medium to at least one of the plurality of render servers based at least in part on the job profile, and rendering the render frames. The method also includes forwarding the rendered render frames to a network storage system.

Abstract: A system and method for generating sequences of triggered events and for generating global interrupts in a clustered computer graphics system is provided. In a sender-receiver dichotomy, one node is deemed the sender and the others act as receivers. The sender determines trigger values for each of the nodes in the system in order to achieve a particular operation sequence. In addition, a synchronization signal generator is provided to synchronize a timing signal between the sender and receiver nodes. Further, the sender designates one or more receiver nodes and causes them to turn on an interrupt enable register. In this way, the receiver nodes are able to be interrupted by the sender.

Abstract: The present invention provides for a method of and apparatus for compressing and uncompressing image data. According to one embodiment of the present invention, the method of compressing a color cell comprises the steps of: defining at least four luminance levels of the color cell; generating a bitmask for the color cell, the bitmask having a plurality of entries each corresponding to a respective one of the pixels, each of the entries for storing data identifying one of the luminance levels associated with a corresponding one of the pixels; calculating a first average color of pixels associated with a first one of the luminance levels; calculating a second average color of pixels associated with a second one of the luminance levels; and storing the bitmask in association with the first average color and the second average color.

Abstract: A system, method and computer program product is provided for interactive user navigation in a real-time 3D simulation. An assembly builder permits a user to build customized physics-based assemblies for user navigation in a variety of virtual environments. These assemblies are stored in a library and are then accessed by a navigation run-time module that runs in conjunction with, or as a part of, a visual run-time application. The navigation run-time module receives high-level user goal requests via a simple and intuitive user interface, converts them into a series of tasks, and then selects the appropriate assembly or assemblies to perform each task. As a result, complex navigation may be achieved. Once selected, an assembly provides a physics-based eye-point model for user navigation. Collisions between the assembly and objects in the simulation are resolved using a real-time physics engine, thus ensuring smooth, cinematic-style eye-point modeling in addition to real-time control.

Abstract: Compositors are identified in a manner that defines the position of the compositor in the compositor tree. Each compositor has its own “unique compositor identifier”. Starting at the most downstream compositor, it transmits its unique compositor identifier to all upstream compositors directly coupled to it. The upstream compositors receive the unique compositor identifier from the most downstream compositor. Each of the upstream compositors appends its unique compositor identifier to the unique compositor identifier received from the most downstream compositor to produce a “compositor tree compositor identifier”. The compositor tree compositor identifier identifies both the compositor and its position in the compositor tree. This enables an application to detect the structure of the compositor tree so that the application can determine a desired tiling configuration that exploits the structure of the compositor tree.

Abstract: A system and method of reducing skew between a plurality of signals transmitted with a transmit clock is described. Skew is detected between the received transmit clock and each of received data signals. Delay is added to the clock or to one or more of the plurality of data signals to compensate for the detected skew. Each of the plurality of delayed signals is compared to a reference signal to detect changes in the skew. The delay added to each of the plurality of delayed signals is updated to adapt to changes in the detected skew.

Abstract: A method and system for spatially compositing digital video images with a tile pattern library. Spatial compositing uses a graphics pipeline to render a portion (tile) of each overall frame of digital video images. This reduces the amount of data that each processor must act on and increases the rate at which an overall frame is rendered. Optimization of spatial compositing depends on balancing the processing load among the different pipelines. The processing load typically is a direct function of the size of a given tile and an inverse function of the rendering complexity for objects within this tile. Load balancing strives to measure these variables and adjust, from frame to frame, the number, sizes, and positions of the tiles. The cost of this approach is the necessity to communicate, in conjunction with each frame, the number, sizes, and positions of the tiles.

Abstract: A system and method for generating sequences of triggered events and for generating global interrupts in a clustered computer graphics system. In a sender-receiver dichotomy, one node is deemed the sender and the others act as receivers. The sender determines trigger values for each of the nodes in the system in order to achieve a particular operation sequence. In addition, a synchronization signal generator is provided to synchronize a timing signal between the sender and receiver nodes. Further, the sender designates one or more receiver nodes and causes them to turn on an interrupt enable register. In this way, the receiver nodes are able to be interrupted by the sender.

Abstract: The present invention provides texture roaming via dimension elevation. A degree elevated texture is used to contain level of detail (LOD) levels (or tiles) of a clip-map across a degree elevated coordinate space. For example, a three-dimensional (3D) texture is used for two-dimensional (2D) clip-mapping, a four-dimensional (4D) texture is used for 3D clip-mapping, and a 2D texture is used for one-dimensional (1D) clip-mapping. Once the levels of a clip-map are placed in an extra dimension coordinate space, the extra dimension texture coordinate value can be computed based on clip-mapping rules.

Abstract: A display is capable of displaying images in response to differently formatted signals. The display includes a switch that enables a user to select among a plurality of signal formats. The switch has a first setting that corresponds to a first of the plurality of signal formats and a second setting that corresponds to a second of the plurality of signal formats. The display also includes a memory module that receives requests from a channel and transmits a response associated with the setting of said switch.

Abstract: A method and system for communicating to a sender an availability of receiving a new message includes providing buffers having at least one corresponding slot for storing a message and providing a credit signal that communicates to the sender only when all of the buffers have at least one of the corresponding slot available for storing a new message. Each of the buffers is monitored for whether at least one of the corresponding slots is available for storing the new message. A corresponding receiver counter is provided for each of the buffers. Each receiver counter is decremented when all of the buffers have at least one corresponding slot available for storing the new message. Each of the buffers is configured to receive a corresponding particular message type. The particular message type of the new message is determined. The new message is loaded into the corresponding slot of one of the buffers which is configured for receiving the particular message type of the new message.

Abstract: An integrated circuit (10) includes a central processing unit (12), an instruction cache (14), a data cache (16), and a trace recorder. The central processing unit (12) interacts with the instruction cache (14) and the data cache (16) in order to execute instructions. Information passed between the central processing unit (12), the instruction cache (14), and the data cache (16) not normally available for external analysis may be captured by the trace recorder (20) in response to various triggering events. The information captured by the trace recorder (20) may subsequently be provided to external test equipment in order to analyze the operation of the central processing unit (12) for failure correction.

Abstract: One or more fragment programs are executed on a graphics processor to generate the vertices of a subdivision curve or subdivision surface (using an arbitrary subdivision scheme) into a floating point texture. A plurality of faces are simultaneously processed during each subdivision iteration by using a super buffer that contains the vertices, their neighbors, and information about each face. Following the subdivision iterations, the texture is mapped as a vertex array (or a readback is performed), and the subdivided faces are rendered as complex curves or surfaces.