Abstract: The present invention provides for a method of and apparatus for compressing and uncompressing image data. According to one embodiment of the present invention, the method of compressing a color cell comprises the steps of: defining at least four luminance levels of the color cell; generating a bitmask for the color cell, the bitmask having a plurality of entries each corresponding to a respective one of the pixels, each of the entries for storing data identifying one of the luminance levels associated with a corresponding one of the pixels; calculating a first average color of pixels associated with a first one of the luminance levels; calculating a second average color of pixels associated with a second one of the luminance levels; and storing the bitmask in association with the first average color and the second average color.

Abstract: A system, method and computer program product is provided for interactive user navigation in a real-time 3D simulation. An assembly builder permits a user to build customized physics-based assemblies for user navigation in a variety of virtual environments. These assemblies are stored in a library and are then accessed by a navigation run-time module that runs in conjunction with, or as a part of, a visual run-time application. The navigation run-time module receives high-level user goal requests via a simple and intuitive user interface, converts them into a series of tasks, and then selects the appropriate assembly or assemblies to perform each task. As a result, complex navigation may be achieved. Once selected, an assembly provides a physics-based eye-point model for user navigation. Collisions between the assembly and objects in the simulation are resolved using a real-time physics engine, thus ensuring smooth, cinematic-style eye-point modeling in addition to real-time control.

Abstract: Compositors are identified in a manner that defines the position of the compositor in the compositor tree. Each compositor has its own “unique compositor identifier”. Starting at the most downstream compositor, it transmits its unique compositor identifier to all upstream compositors directly coupled to it. The upstream compositors receive the unique compositor identifier from the most downstream compositor. Each of the upstream compositors appends its unique compositor identifier to the unique compositor identifier received from the most downstream compositor to produce a “compositor tree compositor identifier”. The compositor tree compositor identifier identifies both the compositor and its position in the compositor tree. This enables an application to detect the structure of the compositor tree so that the application can determine a desired tiling configuration that exploits the structure of the compositor tree.

Abstract: A system and method of reducing skew between a plurality of signals transmitted with a transmit clock is described. Skew is detected between the received transmit clock and each of received data signals. Delay is added to the clock or to one or more of the plurality of data signals to compensate for the detected skew. Each of the plurality of delayed signals is compared to a reference signal to detect changes in the skew. The delay added to each of the plurality of delayed signals is updated to adapt to changes in the detected skew.

Abstract: A method and system for spatially compositing digital video images with a tile pattern library. Spatial compositing uses a graphics pipeline to render a portion (tile) of each overall frame of digital video images. This reduces the amount of data that each processor must act on and increases the rate at which an overall frame is rendered. Optimization of spatial compositing depends on balancing the processing load among the different pipelines. The processing load typically is a direct function of the size of a given tile and an inverse function of the rendering complexity for objects within this tile. Load balancing strives to measure these variables and adjust, from frame to frame, the number, sizes, and positions of the tiles. The cost of this approach is the necessity to communicate, in conjunction with each frame, the number, sizes, and positions of the tiles.

Abstract: A system and method for generating sequences of triggered events and for generating global interrupts in a clustered computer graphics system. In a sender-receiver dichotomy, one node is deemed the sender and the others act as receivers. The sender determines trigger values for each of the nodes in the system in order to achieve a particular operation sequence. In addition, a synchronization signal generator is provided to synchronize a timing signal between the sender and receiver nodes. Further, the sender designates one or more receiver nodes and causes them to turn on an interrupt enable register. In this way, the receiver nodes are able to be interrupted by the sender.

Abstract: The present invention provides texture roaming via dimension elevation. A degree elevated texture is used to contain level of detail (LOD) levels (or tiles) of a clip-map across a degree elevated coordinate space. For example, a three-dimensional (3D) texture is used for two-dimensional (2D) clip-mapping, a four-dimensional (4D) texture is used for 3D clip-mapping, and a 2D texture is used for one-dimensional (1D) clip-mapping. Once the levels of a clip-map are placed in an extra dimension coordinate space, the extra dimension texture coordinate value can be computed based on clip-mapping rules.

Abstract: A display is capable of displaying images in response to differently formatted signals. The display includes a switch that enables a user to select among a plurality of signal formats. The switch has a first setting that corresponds to a first of the plurality of signal formats and a second setting that corresponds to a second of the plurality of signal formats. The display also includes a memory module that receives requests from a channel and transmits a response associated with the setting of said switch.

Abstract: An integrated circuit (10) includes a central processing unit (12), an instruction cache (14), a data cache (16), and a trace recorder. The central processing unit (12) interacts with the instruction cache (14) and the data cache (16) in order to execute instructions. Information passed between the central processing unit (12), the instruction cache (14), and the data cache (16) not normally available for external analysis may be captured by the trace recorder (20) in response to various triggering events. The information captured by the trace recorder (20) may subsequently be provided to external test equipment in order to analyze the operation of the central processing unit (12) for failure correction.

Abstract: A method and system for communicating to a sender an availability of receiving a new message includes providing buffers having at least one corresponding slot for storing a message and providing a credit signal that communicates to the sender only when all of the buffers have at least one of the corresponding slot available for storing a new message. Each of the buffers is monitored for whether at least one of the corresponding slots is available for storing the new message. A corresponding receiver counter is provided for each of the buffers. Each receiver counter is decremented when all of the buffers have at least one corresponding slot available for storing the new message. Each of the buffers is configured to receive a corresponding particular message type. The particular message type of the new message is determined. The new message is loaded into the corresponding slot of one of the buffers which is configured for receiving the particular message type of the new message.

Abstract: One or more fragment programs are executed on a graphics processor to generate the vertices of a subdivision curve or subdivision surface (using an arbitrary subdivision scheme) into a floating point texture. A plurality of faces are simultaneously processed during each subdivision iteration by using a super buffer that contains the vertices, their neighbors, and information about each face. Following the subdivision iterations, the texture is mapped as a vertex array (or a readback is performed), and the subdivided faces are rendered as complex curves or surfaces.

Abstract: The present invention is a system and method that facilitates consistency maintenance and recovery from a system or process crash with valid data. A data consistency maintenance and recovery system and method of the present invention utilizes a dual page configuration and locking process to store and track data. A primary page is utilized as the primary data storage location and a mirror page operates as copy of the primary page except during certain stages of data manipulation (e.g., a write operation). In one embodiment of the present invention, a process can not perform a read operation if the page is locked or a write operation if the process did not lock the page. Read operations read information from unlocked primary pages. Write operations access, lock and update a mirror page, then access, lock and update a primary page. Page accesses are tracked (e.g., counted). Then a write process unlocks and syncs the primary page to disk as well as the mirror page.

Abstract: A system and method for generating a image, where the image comprises both a graphical user interface (GUI) and a subject graphics image. A first graphics pipeline renders the subject graphics image. A second graphics pipeline renders the GUI graphics data. A compositor then composites together the rendered subject graphics data that is produced by the first graphics pipeline, and the rendered GUI graphics data that is produced by the second graphics pipeline.

Abstract: A switched router for transmitting packetized data concurrently between a plurality of devices coupled to the switched router. The devices are coupled to the I/O ports of the switched router. The switched router is then programmed to route packets of data from various source ports to several destination ports. Different packets may be transmitted concurrently through the switched router. The packets are comprised of a command word containing information corresponding to packet routing, data format, size, and transaction identification. Furthermore, the command word may include a destination identification number for routing the packet to a destination device, a source identification number used by a destination device to send back responses, a transaction number to tag requests that require a response, and a packet type value indicating a particular type of packet.

Abstract: A system for approximating a least recently used (LRU) algorithm for memory replacement in a cache memory. In one system example, the cache memory comprises memory blocks allocated into sets of N memory blocks. The N memory blocks are allocated as M super-ways of N/M memory blocks where N is greater than M. An index identifies the set of N memory blocks. A super-way hit/replacement tracking state machine tracks hits and replacements to each super-way and maintains state corresponding to an order of hits and replacements for each super-way where the super-ways are ordered from the MRU to the LRU. Storage for the state bits is associated with each index entry where the state bits include code bits associated with a memory block to be replaced within a LRU super-way. LRU logic is coupled to the super-way hit/replacement tracking state machine to select an LRU super-way as a function of the super-way hit and replacement history.

Abstract: A system and method for managing graphics applications include the capability to receive graphics data from an unaware graphics application and convey the graphics data to at least one of a plurality of graphics pipes having different display directions. The system and method further include the capability to modify the graphics data to account for non-planar display of the graphics data.

Abstract: A multiprocessor system and method includes a processing sub-system having a plurality of processors and a processor memory system. A scalable network is operable to couple the processing sub-system to an input/output (I/O) sub-system. The I/O sub-system includes a plurality of I/O interfaces. Each I/O interface has a local cache and is operable to couple a peripheral device to the multiprocessor system and to store copies of data from the processor memory system in the local cache for use by the peripheral device. A coherence domain for the multiprocessor system includes the processors and processor memory system of the processing sub-system and the local caches of the I/O sub-system.

Abstract: A system and method for interconnecting a plurality of processing element nodes within a scalable multiprocessor system is provided. Each processing element node includes at least one processor and memory. A scalable interconnect network includes physical communication links interconnecting the processing element nodes in a cluster. A first set of routers in the scalable interconnect network route messages between the plurality of processing element nodes. One or more metarouters in the scalable interconnect network route messages between the first set of routers so that each one of the routers in a first cluster is connected to all other clusters through one or more metarouters.

Abstract: A toolkit for developing user-interfaces for a system administration program. The toolkit has a server-side application-programming interface (API). The server-side has task-registry files that each describe a task group. The toolkit also has a client-side API. A developer can customize product-specific properties files for a specific product and write code that calls the server-side and client-side APIs to create a graphical user interface for the specific product.

Abstract: A cluster of computer system nodes share direct read/write access to storage devices via a storage area network using a cluster filesystem. Version information about subsystems is acquired by a leader node when forming a cluster membership and distributed to all nodes in the cluster to enable proper messaging during operation. Access to files on the storage devices is arbitrated by the cluster filesystem using tokens. Upon detection of a change in location of the metadata server, client nodes waiting for a token are interrupted to check on the status of at least one of data and node availability. The cluster operating system maintains consistency of a mirrored data volume by automatically ensuring replication of a mirror leg while continuing to accept access requests to the mirrored data volume.