Patents Assigned to Silicon Graphics
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Patent number: 5835729Abstract: A method and arrangement for separating interleaved luminance and chrominance color space components data in a single data stream with minimum CPU intervention is provided. In the separating circuit, the separating circuit receives as input a series of graphics/video image data composed of interleaved luminance and chrominance color space components at successive clock cycles. The separating circuit directs selected bytes of the graphics/video image data representing the luminance color space component to a first path wherein luminance component data received at two successive clock cycles are combined. Likewise, selected bytes of the graphics/video image data representing the chrominance color space component are directed to a second path wherein chrominance component data received at two successive clock cycles are combined. Then, the combined luminance and chrominance component data are output alternately.Type: GrantFiled: September 13, 1996Date of Patent: November 10, 1998Assignee: Silicon Graphics, Inc.Inventors: Henry P. Moreton, Michael L. Fuccio, Mark W. Troeller, Charles F. Tuffli, III, David K. Barnett
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Patent number: 5835133Abstract: A mechanism and method for recording stereo video with standard camera system electronics and a uniquely adapted optical assembly is disclosed. The optical assembly comprises left and right optical channels disposed to capture and project separate left and right images onto a single image sensor such that the boundary between the projected images is sharply delineated with no substantial overlap or gap. The viewpoints of the left and right optical channels are separated by a distance, d, such that the captured images are differentiated to produce a stereo image pair. By proper disposition of the left and right optical channels, stereo image pairs exhibiting full stereo overlap without keystone distortion are obtained. One image of the stereo pair is produced for visualization by the left eye and the other image is produced for visualization by the right eye. Alternatively, the images can be interrogated by a computer system for generating three dimensional position data.Type: GrantFiled: January 23, 1996Date of Patent: November 10, 1998Assignee: Silicon Graphics, Inc.Inventors: Henry P. Moreton, Bryan E. Loucks
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Patent number: 5835092Abstract: Software implementing a display technique called "miniviews." Miniviews provide a single viewing mechanism for information from a variety of sources and keep supplemental and related information within easy reach by a user without interrupting the flow of a main information concept. Miniviews are displayed when predetermined portions of the surrounding browser is expanded and can be displayed in any order as predetermined by the author, depending on the portions of the surrounding browser expanded by the user. Miniviews reference the original copy of the information displayed therein, such that if the information at the single location is changed, information displayed in the miniview is also changed. A miniview of information attempts to duplicate the appearance of the native browser for that information. At the same time, where a native browser allows the user to range freely through a certain type of information, miniviews only allow a predetermined amount of information from given source to be displayed.Type: GrantFiled: April 9, 1996Date of Patent: November 10, 1998Assignee: Silicon Graphics, Inc.Inventors: Dana L. Boudreau, Ellen C. Campbell, Kirsten L. Jones, Michael L. Shields
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Patent number: 5831620Abstract: A system and computer-based method for performing real-time mirror reflection of objects in a scene using a computer graphics system having a stencil buffer. The scene includes a background and a plurality of mirrors, and the stencil buffer comprises bits with initial values. A first level reflection mask is generated in the stencil buffer for the plurality of mirrors in the scene. Using the first level reflection mask, second level mirror reflections are determined, followed by first level mirror reflections, for each mirror in the scene. The first and second level mirror reflections are then drawn. Finally, the un-mirrored portions of the scene are drawn.Type: GrantFiled: July 2, 1996Date of Patent: November 3, 1998Assignee: Silicon Graphics IncorporatedInventor: John J. Kichury, Jr.
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Patent number: 5831697Abstract: A flat panel display screen apparatus with optical junction and removable backlighting assembly. An optical junction is formed between a permanently housed light source within a display assembly and a removable light pipe when inserted into the display assembly. The optical junction is formed from a reflective film attached along the long axis of the light source and extends past a side of the light source to cover a gap between the light source and the light pipe. Another reflective strip is placed along and extends past an edge of the light pipe to bridge the gap. The reflective material is used to reflect stray light into the light pipe.Type: GrantFiled: June 12, 1997Date of Patent: November 3, 1998Assignee: Silicon Graphics, Inc.Inventors: Daniel E. Evanicky, Leroy Bertrand Keely, Steven Siefert
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Patent number: 5829512Abstract: A heatsink for dissipating heat from electronic components, such as integrated circuits, on a circuit board. The heatsink is formed from metal foil and comprises a series of coplanar base portions interposed with transverse fins. The heatsink can be constructed from a length of metal foil which is folded to form the base portions and transverse fins. A base layer comprising, for example, an additional strip of sheet metal material, has adhesive on both sides and is affixed to the base portions of the folded foil on one side and the surface of the electronic component using the adhesive on the other side. The foil or sheet material forming the base portions, fins and base layer of the heatsink are relatively thin and flexible such that lengths of the heatsink can be manufactured and coiled into rolls for transportation and storage. A portion of the heatsink can then be cut to length from the roll thereof and applied to a row of a plurality of components.Type: GrantFiled: August 29, 1995Date of Patent: November 3, 1998Assignee: Silicon Graphics, Inc.Inventor: Mark August
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Patent number: 5832306Abstract: A computer system and method using an acknowledging triggered forwarding mechanism for managing the receipt of an external block data response from an external agent. The mechanism consists of an incoming buffer and control logic. The incoming buffer connects internal memory units, such as a load store unit (LSU), cache, and instruction fetch unit (IFU) to an external agent. An external block data response sent by the external agent is stored in an entry partition in the incoming buffer until the validity of the data can be verified. Control logic connects the incoming buffer and the external agent. An external agent sends an external completion response to the control logic to report the status of the data in the incoming buffer. The data in the incoming buffer is forwarded to the internal memory units only if the control logic receives an acknowledge response from the external agent.Type: GrantFiled: October 18, 1995Date of Patent: November 3, 1998Assignee: Silicon Graphics, Inc.Inventor: Randal Gordon Martin
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Patent number: 5826922Abstract: A rotary latch assembly which allows for simple, inexpensive and reliable attachment of a computer bezel to a computer housing. Latches disposed on each side of the bezel engage openings in the computer housing so as to secure the bezel to the computer housing. The latches are attached to rails which includes gears. A knob which includes rotary gears extends through an opening in the bezel. The rotary gears engage the gears of both of the rails such that the latches may be moved within a limited range by rotating the knob. Thus, the bezel may be removed by rotating the knob such that the latches move inward, thereby disengaging the latches from the openings in the computer housing.Type: GrantFiled: March 13, 1997Date of Patent: October 27, 1998Assignee: Silicon Graphics, Inc.Inventor: Glenn Alan Wernig
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Patent number: 5825238Abstract: The present invention comprises an active shunt filter for filtering a power supply for noise sensitive devices. The active shunt filter includes a transistor and an op amp. A first resistor is coupled between the emitter of the transistor and a first power supply. A second resistor is coupled between the collector of the transistor and a ground. A third resistor is coupled between the base of the transistor and the output of the op amp. The output of the op amp controls the impedance of the transistor. The op amp is coupled to receive power from a second power supply. The negative input of the op amp is coupled to the emitter. The positive input of the op amp is coupled to the first power supply via a fourth resistor. A fifth resistor couples the positive input of the op amp to ground. A capacitor is also coupled between the positive input of the op amp and ground.Type: GrantFiled: January 27, 1997Date of Patent: October 20, 1998Assignee: Silicon Graphics, Inc.Inventors: Michael K. Poimboeuf, Jeff DiNapoli, Gerald L. Brainard
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Collaborative work environment supporting three-dimensional objects and multiple remote participants
Patent number: 5821925Abstract: A collaborative work environment supports manipulating an object defined by a three-dimensional model by multiple remote participants. A three-dimensional model of the object is able to be translated, rotated and scaled in a work area of a whiteboard associated with the collaborative work environment. Each of the remote participants is able to view, manipulate, and mark-up the three-dimensional model of the object so that the remote participants can work collaboratively together.Type: GrantFiled: January 26, 1996Date of Patent: October 13, 1998Assignee: Silicon Graphics, Inc.Inventors: Richard Carey, Christopher F. Marrin, David C. Mott -
Patent number: 5822381Abstract: A clock system for a distributed multiprocessor system includes a plurality of local clock circuits and a distribution network. The distribution network includes a plurality of interconnected routers. Each local clock circuit is associated with a processing node of the multiprocessor system. Each local clock circuit generates a global clock source signal, provides the global clock source signal to the distribution network, receives a global clock signal back from the distribution network, and generates a global time value based on a local clock signal and the global clock signal. The router is part of the distribution network of the multiprocessor system. The router receives the global clock source signals from each of the local clock circuits, selects one of the global clock source signals as the global clock signal and provides the global clock signal to the distribution network for distribution to each of the local clock circuits.Type: GrantFiled: May 5, 1995Date of Patent: October 13, 1998Assignee: Silicon Graphics, Inc.Inventors: David M. Parry, Charles E. Narad, Daniel E. Lenoski
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Patent number: 5819017Abstract: In a computer system for creating images of three-dimensional objects, an apparatus and method for processing depth values representing the relative depths of the objects. The depth values are transformed according to projections in order to give the appearance of depth when the objects are displayed on a two-dimensional computer screen. These transformed depth values are then interpolated using N bits of precision. Next, the depth values are encoded into a format whereby the depth values have less than N bits. These encoded depth values are stored into memory. In displaying the objects, the encoded depth values are read from memory and compared to determine the relative depths of the objects.Type: GrantFiled: August 22, 1995Date of Patent: October 6, 1998Assignee: Silicon Graphics, Inc.Inventors: Kurt Akeley, James Foran
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Patent number: 5817997Abstract: A switch and plunger mechanism which allows for simple, inexpensive and reliable actuation of a switch is disclosed. A plunger having two flanges and a plunger pin is disposed in an opening within a computer housing which includes angled surfaces. When the plunger is pushed in, the flanges press against the tapered surfaces so as to deflect each of the flanges inwardly. Continued movement of the plunger into the engaged position moves the plunger pin such that it engages the switch. As the plunger moves into the engaged position, changing contact surfaces between the plunger and the surfaces of the plunger receptacle causes an audible and tactile snap to be emitted. The movement of the plunger into the fully depressed position deflects the flanges so as to store potential energy. When the finger pressure is released from the plunger, the stored energy is released so as to straighten the flanges and push the plunger pin back into the fully extended position.Type: GrantFiled: January 24, 1997Date of Patent: October 6, 1998Assignee: Silicon Graphics, Inc.Inventor: Glenn Alan Wernig
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Patent number: 5818452Abstract: A system and method for deforming objects uses delta free-form deformations (DFFD). The DFFD computes a delta vector based on a conventional free-form deformation (FFD) and an original vertex. Multiple delta vectors can be computed and combined for each vertex. Because delta vectors are independent from each other, various operations such as rotations and translations in addition to multiple overlapping deformations are applied to the vertex with superior results over the conventional FFD.Type: GrantFiled: August 7, 1995Date of Patent: October 6, 1998Assignee: Silicon Graphics IncorporatedInventors: James R. Atkinson, Barbara M. Balents
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Patent number: 5818613Abstract: A system and method for converting a color represented in a first color space to the color represented in a second color space uses a constant hue algorithm. The constant hue algorithm is used to compensate invalid colors in the second color space obtained as a result of the conversion. The constant hue algorithm determines a compensation factor that, in effect, blends the invalid color with pure grey until the invalid color becomes a valid color in the second color space. The compensation factor is optionally stored with the valid color in the second color space so that the original color in the first color space can be subsequently recovered.Type: GrantFiled: December 4, 1995Date of Patent: October 6, 1998Assignee: Silicon Graphics, Inc.Inventors: Anthony Masterson, Robert A. Williams, Edward Goldberg, Charles Jerian
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Patent number: 5819019Abstract: A system and method for resource recovery in a distributed system uses a resource audit service to monitor the status of a client that receives a resource from a service that allocates the resource. The allocating service registers a callback with the resource audit service identifying the client. The resource audit service subsequently monitors the status of the client. When the resource audit service determines that the client has failed, the resource audit service performs the callback to the allocating service indicating the failure of the client. Upon receiving the callback, the allocating service is able to recover the resource from the client.Type: GrantFiled: December 1, 1995Date of Patent: October 6, 1998Assignee: Silicon Graphics, Inc.Inventor: Michael N. Nelson
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Patent number: 5818250Abstract: A method of testing a speed of a semiconductor chip. A test time interval is specified. A test oscillator is fabricated as part of the semiconductor under test. The test oscillator contains elements that simulate a critical path of the semiconductor chip. Hence, the test oscillator's frequency is sensitive to process variations. The number of cycles of the oscillator occurring during the test time interval is counted. Based upon this count value, the speed of the semiconductor chip under test is determined.Type: GrantFiled: July 3, 1996Date of Patent: October 6, 1998Assignee: Silicon Graphics, Inc.Inventors: Norman Kung-Po Yeung, Edward Tonguk Pak, Chia-Chi Chao, James Euisik Yoon
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Patent number: 5818433Abstract: A graphics memory apparatus and methods for the organization, storage and playback of graphics data for display purposes. The image data and overlay data (and/or other graphics data) are organized and stored in the graphics memory in an interleaved fashion so that only one type of graphics data is stored at any one memory address (pixel data or overlay data or other graphics data) and so that preferably full memory capacity is utilized for the area of graphics memory employed. As an example, in a system for displaying eight bits of color image data and two bits of overlay, the overlay data is interleaved with the image data so that four consecutive address locations will contain image data, with preceding or following address location containing the associated overlay data. Therefore, such organization can result in graphics memory efficiency, reduced bandwidth requirements therefor and increased speed with which the contents or portions thereof may be loaded, altered, etc.Type: GrantFiled: September 5, 1996Date of Patent: October 6, 1998Assignee: Silicon Graphics, Inc.Inventor: Robert Sherburne
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Patent number: 5815686Abstract: A method and a system for address space translation. The present invention is implemented on a computer system having a microprocessor with a translation look aside buffer (TLB). The address space translation system of the present invention translates an emulated virtual address space into a physical address space. The system receives a virtual address from a process running on the system. The system compares the TLB with the virtual page number of the virtual address and returns a physical page number from the TLB when there is a match in the TLB with the virtual page number. When there is not a match, the system determines whether the virtual address is an emulated virtual address or a native virtual address. If the virtual address is an emulated virtual address, the system translates the emulated virtual address to a corresponding physical address. The system then stores the virtual page number from the emulated virtual address and the corresponding physical page number in the TLB.Type: GrantFiled: September 12, 1996Date of Patent: September 29, 1998Assignee: Silicon Graphics, Inc.Inventors: William J. Earl, Wayne Stuart Mesard
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Patent number: 5815162Abstract: Described herein are a system and method for drawing high-quality, mathematically perfect or near-perfect anti-aliased lines by using a modified integer Bresenham line-drawing algorithm that yields optimally accurate coverage values. These coverage values are derived from the Bresenham algorithm itself without the computational expense of an arithmetic division at each pixel. The Bresenham algorithm generates pixel coordinates and coverage values of a line by iterating the line's minor axis coordinate with subpixel precision.Type: GrantFiled: April 19, 1996Date of Patent: September 29, 1998Assignee: Silicon Graphics, Inc.Inventor: Marshall P. Levine