Abstract: A processor-inclusive memory module (PIMM) is disclosed. In one embodiment of the present invention, the PIMM includes a printed circuit board having first and second opposing surfaces. The printed circuit board also has an address line formed therein. A first SRAM is mounted on the first surface of the printed circuit board. The present PIMM is further comprised of a second SRAM mounted on the second surface of the printed circuit board. The second SRAM is mounted on the second surface of the printed circuit board directly opposite the first SRAM mounted on the first surface of the printed circuit board. The first and second SRAMs are coupled to the address line by respective cache buses. A processor is also mounted on the first surface of the printed circuit board, and is coupled to the address line. In one embodiment of the invention, a heat sink is thermally coupled to the processor. The processor has a plurality of contact pads disposed thereon.

Abstract: A computer controlled graphics system for processing an image using full spectral representations. An object in an image has an associated full spectral surface reflectance function. Each illumination source is represented by a light vector whose components represent the weights of predetermined basis functions, so that said illumination vector represents a light source in full spectral representation. A plurality of sensors each has an associated sensor response function. A user may select, either directly or indirectly such as through a graphics program, the surface reflectance function, each light source, and the sensor response functions. At a point on an object, the color processing system determines a surface matrix responsive to the surface reflectance function at said point, the plurality of predetermined basis functions, and the plurality of sensor response functions.

Abstract: A heat sink with undulating fins is provided. The heat sink according to this invention includes a thermally conductive base plate having a top surface and a plurality of thermally conductive fins. The fins extend upwardly from the top surface. Each fin is integral with the base plate and has an undulating surface. The fin surfaces of adjacent fins define a space for passing a cooling fluid between them.

Abstract: In a computer graphics system, a semiconductor chip used in performing texture mapping. Textures are input to the semiconductor chip. These textures are stored in a main memory. Cache memory is used to accelerate the reading and writing of texels. A memory controller controls the data transfers between the main memory and the cache memory. Also included within the same semiconductor chip is an interpolator. The interpolator produces an output texel by interpolating from textures stored in memory. The interpolated texel value is output by the semiconductor chip, thereby minimizing transmission bandwidth as well as redundant storage of texture maps in a multi-processor environment.

Abstract: An apparatus for generating a reflection from a three-dimensional environment map. The apparatus includes a reflection vector generator which receives an eye vector and a normal vector neither of which need be normalized. This reflection vector generator generates a reflection vector without vector normalization. The reflection vector generator then couples to a decoder to supply the generated reflection vector. The decoder, in turn, determines a location where the reflection vector indexes the selected 2-dimensional map which forms part of the environment map.

Abstract: A latch/mask mechanism that is located between the sense amplifiers of a DRAM and the data bus. The latch/mask mechanism decouples the data bus from the sense amplifiers and permits innovative, time saving functionality during read and write operations. During a write operation, the latch can receive only those byte(s) or a row of bytes to be written. Corresponding mask bits are set to indicate those bytes to be written. Logic in the device transfers only those bytes in the row to be written to the sense amplifiers for writing to memory, leaving the data of remaining bytes in memory intact. Read operations are rendered more efficient by enabling logic, coupled to column select logic, to automatically transfer from the latch the byte selected by the column select logic and the adjacent byte. This time saving feature is particularly useful for computer graphics applications which utilize linear interpolation processes.

Abstract: A method of invalidating a line in a designated cache in each level of a multiple level, multiple cache memory system. Each line of the cache memory system includes a tag field, a data field, and a bit indicative of the validity of the line. The method provides a software invalidate instruction which bypasses any address translation mechanism. Included in the software invalidate instruction is a first field to identify within which multiple cache the line is to be avoided. A target address is generated to index each level of the cache memory system. The state of the bit is changed in accordance with the address and the invalidate instruction.

Abstract: A system and method for restoring bits of pixels prior to display where the original bits of the pixels were truncated compares each pixel to its neighbors to determine the relative value of each pixel as compared to its neighbors. First, the truncated pixel is shifted. That is, the remaining bits of the pixel are shifted to the left and additional bits are added in the least significant bit positions. Next, the pixel is compared to its neighbors to determine their relative values. For each neighbor that is greater than the pixel in question, the truncated shifted pixel is incremented by one. Similarly, for each neighbor that is less than the pixel in question, the truncated shifted pixel is decremented by one. Once the pixel is evaluated relative to its neighboring pixels, determination of the restored pixel is complete. The restored pixel can then be displayed.

Abstract: A pipeline processor, when processing a branch instruction, initiates fetching of both the target and fall-through streams prior to execution of the branch instruction such that the number of pipeline cycles between completion of execution of the branch instruction and initiation of processing of the head instruction of the target or fall-through stream is less than the minimum number of pipeline cycles between fetching of an instruction and the execution of the instruction. At least one otherwise wasted pipeline cycle is saved by early instruction fetching and storing in a prefetch register. In some cases, two or more otherwise wasted cycles can be saved.

Abstract: A back-lit flat panel display subsystem for direct viewing as a monitor and having overhead projection capability. The display subsystem contains a removable door assembly which provides for back-lighting when configured for direct viewing. When the door assembly is removed, the active matrix LCD is semi-transparent and can be placed over (viewing surface down) the imaging screen of an overhead projector such that the LCD color image can be thus projected. The lamps that provide the back-lighting remain within the display subsystem when the door is removed so as to not disturb the power supply lines to the lamps and a unique optical junction is provided between the lamps and a light pipe within the door. The display subsystem contains a sensor detecting door presence and simultaneously shuts off the lamps and reverses the display image (to right to left) upon door removal and turns on the lamps upon door insertion and displays the image from left to right.

Abstract: A computer-implemented method and apparatus allowing a user to select a data transformation for converting input data to output data without having to perform complicated programming. An interactive graphic display provider menu display options which enable a user to generate input and output graphic display templates by selecting data items such as scalars, arrays, lattices, and sets from a data palette. The user then identifies a selected data transformation by making assignments between data items in the input template and the output template. A user interface manager passes information regarding the assignments to a processor which generates a data transform program based on the assignment information. A data chopping module then executes the data transform program to convert input data.

Abstract: A method for selecting a three-dimensional object in a three-dimensional environment improves a speed and efficiency of a lassoing technique. The method reduces the number of objects that have to be rendered into images in order to determine whether the object is included within an area selected by the lasso. The method selects objects intersected by the lasso using ray picking. These selected objects are not rendered into images. The method determines those objects whose bounding boxes do not intersect a bounding box of the area selected by the lasso. These objects are also not rendered into images. The method renders the remaining objects into images to determine which are included with the area selected by the lasso.

Abstract: A system and method for conditionally recompiling a compilation unit having a plurality of source code modules operates by selecting one of the source code modules, and determining whether it is necessary to generate a new condensed representation of the selected source code module. A new condensed representation of the selected source code module is generated if such generation is determined as being necessary. Changes between the new condensed representation of the selected source code module and an old condensed representation of the selected source code module are identified. Each of these changes is classified as either a compatible change or an incompatible change. An incompatible change is a change that requires recompilation of the compilation unit. A compatible change is a change that does not require recompilation of the compilation unit. The compilation unit is recompiled if any of the changes is classified as being an incompatible change.

Abstract: A system that combines a radial marking menu portion with a linear menu portion in a single menu display. Item selection in the linear portion is performed by location selection using a pointing device. Item selection in the marker portion is determined by the pattern of a stroke made by the pointing device with the system ignoring linear menu items across which the stroke completely passes.

Abstract: A high memory capacity DIMM for use in a directory-based, distributed shared memory multiprocessor computer system includes a data memory for storing data and a state memory for storing state or directory information corresponding to at least a portion of the data. The DIMM allows the data and the state information to be accessed independently. The DIMM is configured for use in a DIMM pair. In the DIMM pair, a first DIMM includes a first data memory having first and second memory bank portions for storing data, and a first state memory configured to store state information corresponding to data stored in a first memory bank. A second DIMM includes a second data memory having third and fourth memory bank portions for storing data, and a second state memory configured to store state information corresponding to data stored in a second memory bank. The first memory bank is formed from the first memory bank portion and the third memory bank portion.

Abstract: An image processing system that receives polygonal image data at the direction of a processor and develops antialiased image data for display on a raster scanned display. In particular, the image system includes a scan convertor for converting the polygonal image data into pixel data, which includes pixel screen coordinates and at least one color value for each polygon covered pixel of the pixel data and a supersample coverage mask indicating an extent of polygon coverage within each polygon covered pixel The image system also includes a raster system having at least one image processor for receiving the pixel data for each pixel, for developing a region mask based on the supersample coverage mask, and for storing the color value in association with the region mask as anitialiased display data in an image memory in communication with the image processor based on the pixel screen coordinates.

Abstract: A vector routing scheme provides an effective method for exploring nodes in a multi-processor computer system consisting of an inter-connection network of nodes connected by edges. The object of this exploration is to determine the configuration of the network to facilitate internode communications. Any node in the network can systematically build a connectivity graph of the network indicating the nodes of the network and the connections to those nodes. This is accomplished by sending vector-routed packets cross the network in various specified directions from an originating node. During this transmission, as the vector-routed packets are sent from the originating node to a target device, the packets gather information about the network, and specifically about each router through which they are muted. The packets are then returned to the originating node with the gathered configuration information. This configuration information is complied to build the connectivity graph of the network.

Abstract: An apparatus in a computer system for handling data transfer between a first data processing system and a second data processing system is described. The apparatus includes a buffer for storing data received from the first system at a first data transfer rate and then transferred to the second system at a second data transfer rate. The buffer generates a first indication signal when substantially full and a second indication signal when substantially empty. A first counter counts a first predetermined time interval when receiving the first indication signal, and generates a third indication signal when reaching the first predetermined time interval. The first counter stops counting and returns to an initial state when not receiving the first indication signal. A second counter counts a second predetermined time interval when receiving the second indication signal, and generates a fourth indication signal when reaching the second predetermined time interval.

Abstract: A multiprocessor system having a plurality of requestors, a memory and memory directory controller employing directory-based coherence. The system implements a method to detect dropping of clean-exclusive data. Only one intervention message is permitted to target an exclusive object held by a first requestor, wherein the intervention message is caused by a second requestor. The system detects whether the first requestor has an outstanding writeback for the object targeted by the intervention message, as well as whether the first requestor has a clean-exclusive, dirty-exclusive or invalid copy of the object targeted by the intervention message. A clean-exclusive copy of the object has been dropped when no outstanding writeback is detected and the first requestor has the object in the invalid state.

Abstract: A computer-based system and method for displaying a workspace of greater effective area than that of the display screen using a four-dimensional graphical user interface employing real-time texture mapping. According to the present invention, the user selects a number of workspaces to be displayed. Each selected workspaces is then texture mapped to a polygonal surface. Then the surfaces are displayed at orientations to form a polyhedron with a workspace on each face. Each face may be translucent, so that workspaces otherwise hidden by that face are visible. The polyhedron rotates under the user's control so that each face is presented to the user. It is this combination of a three-dimensional figure with real-time rotation and texture mapping that gives this "Four-Dimensional Graphical User Interface" its name.