Abstract: A substrate used in a semiconductor device. The substrate includes a first wiring layer, a second wiring layer, and an interconnection-wiring layer. The first wiring layer includes a plurality of first pads, and the second wiring layer includes a plurality of second pads. The interconnection-wiring layer is set between the first and second wiring layer. In this case, at least one of the second pads that does not electrically connect to anyone of the first pads electrically connects to the interconnection-wiring layer. In another case, a shielding portion, which electrically connects the interconnection-wiring layer, is provided around the second pad that doesn't electrically connect to anyone of the first pads. Furthermore, this invention also discloses a semiconductor device including the substrate.

Abstract: A rate control method with region of interesting support, which coding macroblocks in a current picture with different priority. The rate control method calculates a weighted macroblock activity according to the priority and a macroblock activity and a picture activity for the current picture according to the weighted macroblock activity. Then, the method allocates a bit budget for each macroblock according to the priority and calculates an estimated complexity for the current picture according to a complexity of a previously coded picture, an activity of the previously coded picture and the weighted macroblock activity. The method also calculates an estimated quantizer scale according to the estimated complexity and the bit budget, an initial virtual buffer occupancy according to an reaction factor and the estimated quantizer scale and a macroblock quantizer scale according to a virtual buffer occupancy of a previously coded macroblock, the priority and the reaction factor.

Abstract: An apparatus and a method of controlling clock phase alignment with a dual loop of a hybrid phase and time domain for clock source synchronization in electronic devices are described. The coarse calibration unit generates a plurality of output signals, the output signals having a plurality of phase intervals therebetween. A predetermined phase angle is divided by the number of the output signals to generate one of the phase intervals. The first fine calibration unit connected to the coarse calibration unit delays the output signals generated from the coarse calibration unit by coupling a programmable delay circuit to adjust the phase of a feedback signal toward the phase of a reference signal. The phase detector connected to the first fine calibration unit is used to detect a phase difference between the reference and the feedback signal and outputting an indicating signal corresponding to the phase difference between the reference and the feedback signal.

Abstract: A method for PCI ExpressPower Management using a PCI PM mechanism in a computer system. The computer system includes a PCI PME (Power Management Event) controller and a PCI Express Root Complex. The method includes converting a plurality of PM_PME packets generated by the PCI Express Root Complex into a Pseudo-PME signal, a first PM_PME packet of the plurality of PM_PME packets asserting the Pseudo-PME signal. A Pseudo-PME line electrically connected with a PME input of the PCI PME controller and the PCI Express Root Complex is provided for transmitting the Pseudo-PME signal to the PCI PME controller. The PME input receives PME signals generated by PCI-compliant devices through a PCI Bus of the computer system. The method further includes de-asserting the Pseudo-PME signal. The de-assertion of the Pseudo-PME signal follows the assertion of the Pseudo-PME signal by a predetermined time interval.

Abstract: A method for PCI Express Power Management using a PCI PM mechanism in a computer system. The computer system includes a PCI PME (Power Management Event) controller and a PCI Express Root Complex. The method includes converting a Beacon signal generated by the PCI Express Root Complex into a Pseudo-PME signal, the Beacon signal asserting the Pseudo-PME signal. A Pseudo-PME line electrically connected with an PME input of the PCI PME controller and the PCI Express Root Complex is provided for transmitting the Pseudo-PME signal to the PCI PME controller. The PME input receives PME signals generated by PCI-compliant devices through a PCI Bus of the computer system. Before the computer system is under the control of an operating system, the Pseudo-PME signal is de-asserted.

Abstract: An ESD protection circuit is disclosed. The ESD protection circuit includes a stacked MOS circuit, and a trigger current generator. The object of the stacked MOS circuit is to be the first releasing path of the ESD current; the object of the trigger current generator is to generate the trigger current to turn on the stacked MOS circuit, and then the stacked MOS circuit would be the first releasing path of the ESD current.

Abstract: An electrostatic discharge protection circuit. The electrostatic discharge (ESD) circuit utilizes inductors and resistors added to sources of multiple fingers of the NMOS transistor, which is triggered by some feedback circuit uniformly. When under an ESD zapping, a finger MOS transistor is trigger initially to snapback region owing to its layout or other causes, a voltage drop across the inductor or the resistor connected to the source of the finger MOS transistor is occurred and presented to gates of the other finger MOS transistors by the feedback circuit. Thus, the other finger MOS transistors are turned on.

Abstract: A frequency synchronization apparatus and method for OFDM systems. The frequency synchronization apparatus is comprised of a digital mixer, a first synchronizer and a second synchronizer. The digital mixer acquires a baseband signal by means of a local frequency and adjusts the local frequency in response to an integer frequency offset and a fractional frequency offset. The first synchronizer takes a sequence of received samples derived from the baseband signal in a time domain to estimate the fractional frequency offset. The fractional frequency offset is fed back to the digital mixer. After that, the second synchronizer takes a sequence of demodulated symbols derived from the baseband signal in a frequency domain. The second synchronizer yields the integer frequency offset through a coarse search stage and a fine search stage. Then, the integer frequency offset is fed back to the digital mixer.

Abstract: A total activity measure for a current picture to be encoded in a set of consecutive pictures of a video sequence is calculated first. Based on the total activity measure of the current picture and an activity-to-complexity ratio of a previously encoded picture of the same type in the set of consecutive pictures, a complexity measure of the current picture is estimated. With the estimated complexity measure of the current picture, an instantaneous complexity measure for the set of consecutive pictures is updated. A target bit budget is allocated to the current picture depending on the estimated complexity measure and the instantaneous complexity measure. The current picture is encoded according to the target bit budget, and the activity-to-complexity ratio for the current picture is computed based on the total activity, actual bits consumed by the current picture, and the average quantization step size of the current picture.

Abstract: A method for a 3:2 pull-down film source detection. First, a source is received. Then, field differences of two fields of the same type in the source and an average field difference according to the field difference corresponding to at least one prior field in the source are calculated. The source is established as a 3:2 pull-down film source by checking whether a 3:2 pull-down signature is in the source according to the field difference and the average field difference, and a bad editing point is detected according to an interlaced frame information of the source.

Abstract: An apparatus for controlling a stereo video display with non-stereo video source includes a memory, a read/write controller and a motion analyzer. The memory stores a current frame, a previous frame of the current frame, and a next frame for the current frame that is in preparation. The current frame and the previous frame are for a dextral image and a sinistral image of a stereoscopic image respectively. The read/write controller controls the addresses to write the current frame and the next frame into the memory, and the reading order of the current frame and the previous frame.

Abstract: A packaging structure and an assembly method are disclosed. A packaging structure includes a substrate, a die, conductive wires, and conductively filled material. The substrate includes a conductive structure, and the conductive wires are insulator-coated. The die is mounted on the substrate, and the conductive wires are connected between the die and the conductive structure. The conductively filled material is formed among the conductive wires. In the assembly method, the die is firstly mounted on the substrate, followed by connecting the conductive wires between the die and the conductive structure, and finally forming the conductively filled material among the conductive wires.

Abstract: A TV decoder. The decoder comprises a converter producing a plurality of first bits by sampling a base-band TV signal within a sampling period, and transmitting the first bits in groups, wherein the first bits in each one of the groups undergo parallel transmission through a plurality of first signals, and a demodulator receives the first bits and produces a plurality of second bits controlling the first signals, wherein the second bits are sequentially transmitted through a second signal input to the converter.

Abstract: Voltage fluctuations, especially due to a resonant effect of a power distribution system, result in serious timing skews in a high-speed digital system. Adding extra resistive loadings for coupling out the noise into external terminations will reduce a quality factor of the power distribution system, which will effectively minimize the noise accumulation. The external coupled resistive terminators are preferably formed on positions of a microstrip resonator where relatively high noise fluctuations occur. Each of the external coupled resistive terminators may be formed of a resistor, a transmission line with a resistor at one end, a lossy transmission line with an open circuit at one end, or a quarter-wavelength lossy transmission line. Simulation results indicate that the maximum voltage fluctuations are suppressed from 750 mV to 150 mV at a resonant frequency and about 50% for an overall range of the operating frequencies.

Abstract: A load board for packaged IC testing. The load board with predetermined testing circuit thereon has bonding pad areas on its surface. A plurality of bonding pads is formed on the bonding pad areas, each of which is disposed corresponding to a lead of a packaged IC for testing connection, such as a quad flat packaged IC (QFP), a dual inline packaged IC (DIP) or a small outline packaged IC (SOP). The bonding pads on the load board connect the leads of the testing IC directly during IC testing, thus the conventional test socket between a conventional load board and a packaged IC is omitted.

Abstract: The invention provides a method and an apparatus for dithering, and inversely dithering an image. The apparatus makes use of a pixel address and a pixel data to locate a dither reference value from a dither matrix and use the dither reference value to convert an original pixel data having N bits into a dithered pixel data having M bits (N>M). On the other hand, the apparatus for performing an inversely dithering process makes use of the pixel address and the dithered pixel data (M bits) to locate a dither reference value from a dither matrix. Then, the dither reference value is employed to perform an inversely dithering process to recover the dithered pixel data into original pixel data.

Abstract: A method for scaling a digital picture to generate a scaled picture including following steps:(a) scaling a portion of the digital picture instead of the whole digital picture in a first direction; (b) scaling part of the data produced in step (a) in a second direction; and (c) repeating steps (a) and (b) to form the scaled picture.

Abstract: An ESD protection circuit with tunable gate-bias coupled between a first and second pads for receiving power supply voltages. The ESD protection circuit includes a diode, a resistor coupled between the cathode of the diode and the first pad, a capacitor coupled between the cathode of the diode and the second pad, a first transistor of a first conductivity type having a gate coupled to the cathode of the diode, a drain coupled to the anode of the diode and a source coupled to the second pad, a second transistor of a second conductivity type having a gate coupled to the cathode of the diode, a drain coupled to the anode of the diode and a source coupled to the first pad, and a third transistor of the first conductivity type having a gate coupled to the anode of the diode, a drain coupled to the first pad and a source coupled to the second pad.

Abstract: A method and apparatus for improving bandwidth for depth information communication in a computer graphics system. In operation, a decoder checks a type table associated with a collection of pixels in a memory unit in response to a request for depth information with respect to the collection of pixels. If the type table indicates that the depth information with respect to the collection of pixels has been encoded previously, the decoder computes depth values corresponding to the collection of pixels for each visible polygon in accordance with respective sets of plane parameters in a parameter record associated with a plane pattern, and reconstructs the depth information from the depth values for each visible polygon in accordance with the plane pattern. When the collection of pixels is modified by a new polygon, an encoder updates the plane pattern, the parameter record, and the type table in the memory unit.

Abstract: A method for a 3:2 pull-down film source detection. First, a source is received. Then, field differences of two fields of the same type in the source and an average field difference according to the field difference corresponding to at least one prior field in the source are calculated. The source is established as a 3:2 pull-down film source by checking whether a 3:2 pull-down signature is in the source according to the field difference and the average field difference, and a bad editing point is detected according to an interlaced frame information of the source.